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? 1999 mos integrated circuit mc-458cb647 8m-word by 64-bit synchronous dynamic ram module unbuffered type data sheet document no. m14279ej4v0ds00 (4th edition) date published september 2000 ns cp(k) printed in japan the information in this document is subject to change without notice. before using this document, please confirm that this is the latest version. not all devices/types available in every country. please check with local nec representative for availability and additional information. the mark ? ? ? ? shows major revised points. description the mc-458cb647efa, mc-458cb647pfa and mc-458cb647xfa are 8,388,608 words by 64 bits synchronous dynamic ram module on which 4 pieces of 128m sdram: m pd45128163 are assembled. this module provides high density and large quantities of memory in a small space without utilizing the surface- mounting technology on the printed circuit board. decoupling capacitors are mounted on power supply line for noise reduction. features 8,388,608 words by 64 bits organization clock frequency and access time from clk part number /cas latency clock frequency access time from clk (max.) (max.) mc-458cb647efa-a75 cl = 3 133 mhz 5.4 ns cl = 2 100 mhz 6.0 ns mc-458cb647pfa-a75 cl = 3 133 mhz 5.4 ns cl = 2 100 mhz 6.0 ns MC-458CB647XFA-A75 cl = 3 133 mhz 5.4 ns cl = 2 100 mhz 6.0 ns fully synchronous dynamic ram, with all signals referenced to a positive clock edge pulsed interface possible to assert random column address in every cycle quad internal banks controlled by ba0 and ba1 (bank select) programmable burst-length (1, 2, 4, 8 and full page) programmable wrap sequence (sequential / interleave) programmable /cas latency (2, 3) automatic precharge and controlled precharge cbr (auto) refresh and self refresh all dqs have 10 w 10 % of series resistor single 3.3 v 0.3 v power supply lvttl compatible 4,096 refresh cycles /64 ms burst termination by burst stop command and precharge command 168-pin dual in-line memory module (pin pitch = 1.27 mm) unbuffered type serial pd h h
data sheet m14279ej4v0ds00 2 mc-458cb647 ordering information part number clock frequency package mounted devices (max.) mc-458cb647efa-a75 133 mhz 168-pin dual in-line memory module 4 pieces of m pd45128163g5 (rev. e) (socket type) (10.16 mm (400) tsop (ii)) mc-458cb647pfa-a75 edge connector : gold plated 4 pieces of m pd45128163g5 (rev. p) 25.4 mm height (10.16 mm (400) tsop (ii)) MC-458CB647XFA-A75 4 pieces of m pd45128163g5 (rev. x) (10.16 mm (400) tsop (ii)) h
data sheet m14279ej4v0ds00 3 mc-458cb647 pin configuration 168-pin dual in-line memory module socket type (edge connector: gold plated) 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 v ss dq32 dq33 dq34 dq35 vcc dq36 dq37 dq38 dq39 dq40 v ss dq41 dq42 dq43 dq44 dq45 vcc nc v ss nc nc vcc /cas dqmb4 dqmb5 nc /ras v ss a1 a3 a5 a7 a9 ba0 (a13) a11 vcc clk1 nc v ss cke0 nc dqmb6 dqmb7 nc vcc nc nc nc nc v ss dq48 dq49 dq50 dq51 vcc dq52 nc nc nc v ss dq53 dq54 dq55 v ss dq56 dq57 dq58 dq59 vcc dq60 dq61 dq62 dq63 v ss clk3 nc sa0 sa1 sa2 vcc 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 v ss dq0 dq1 dq2 dq3 vcc dq4 dq5 dq6 dq7 dq8 v ss dq9 dq10 dq11 dq12 dq13 vcc dq14 dq15 nc nc v ss nc nc vcc /we dqmb0 dqmb1 /cs0 nc v ss a0 a2 a4 a6 a8 a10 ba1 (a12) vcc vcc clk0 v ss nc /cs2 dqmb2 dqmb3 nc vcc nc nc nc nc v ss dq16 dq17 dq18 dq19 vcc dq20 nc nc nc v ss dq21 dq22 dq23 v ss dq24 dq25 dq26 dq27 vcc dq28 dq29 dq30 dq31 v ss clk2 nc wp sda scl vcc dq46 dq47 nc a0 - a11 : address inputs [row: a0 - a11, column: a0 - a8] ba0 (a13), ba1 (a12) : sdram bank select dq0 - dq63 : data inputs/outputs clk0 - clk3 : clock input cke0 : clock enable input /cs0, /cs2 : chip select input /ras : row address strobe /cas : column address strobe /we : write enable dqmb0 - dqmb7 : dq mask enable sa0 - sa2 : address input for eeprom sda : serial data i/o for pd scl : clock input for pd v cc : power supply v ss : ground wp : write protect nc : no connection / indicates active low signal.
data sheet m14279ej4v0ds00 4 mc-458cb647 block diagram /cs0 d1 /cs dq 0 dq 1 dq 2 dq 3 dq 4 dq 5 dq 6 dq 7 d2 dq 8 dq 9 dq 10 dq 11 dq 12 dq 13 dq 14 dq 15 dq 0 dq 1 dq 2 dq 3 dq 4 dq 5 dq 6 dq 7 d5 dq 1 dq 2 dq 3 dq 4 dq 5 dq 6 dq 7 dq 0 dqmb 0 dqmb 1 dqmb 3 dqmb 2 dqmb 5 ldqm /cs2 dqmb 7 dqmb 4 dqmb 6 /cs /cs udqm ldqm udqm ldqm udqm ldqm udqm dq 8 dq 9 dq 10 dq 11 dq 12 dq 13 dq 14 dq 15 dq 8 dq 9 dq 10 dq 11 dq 12 dq 13 dq 14 dq 15 dq 8 dq 9 dq 10 dq 11 dq 12 dq 13 dq 14 dq 15 dq 7 dq 6 dq 5 dq 4 dq 3 dq 2 dq 1 dq 0 dq 32 dq 33 dq 34 dq 35 dq 36 dq 38 dq 37 dq 39 dq40 dq41 dq42 dq43 dq44 dq45 dq46 dq47 dq15 dq14 dq13 dq12 dq11 dq10 dq9 dq8 dq48 dq49 dq50 dq51 dq52 dq53 dq54 dq55 dq16 dq17 dq18 dq19 dq20 dq21 dq22 dq23 dq56 dq57 dq58 dq59 dq60 dq61 dq62 dq63 dq31 dq30 dq29 dq28 dq27 dq26 dq25 dq24 /we d4 dq 1 dq 2 dq 3 dq 4 dq 5 dq 6 dq 7 dq 0 /cs /we /we /we /we a0 - a11 a0 - a11 : d1, d2, d4, d5 ba0 a13 : d1, d2, d4, d5 ba1 a12 : d1, d2, d4, d5 serial pd scl sda a0 a1 a2 sa0 sa1 sa2 wp 47 k w /ras /ras : d1, d2, d4, d5 /cas /cas : d1, d2, d4, d5 cke0 cke : d1, d2, d4, d5 v cc d1, d2, d4, d5 d1, d2, d4, d5 ss v c clk1, clk3 clk2 clk : d4, d5 clk0 clk : d1, d2 c c c remarks 1. the value of all resistors is 10 w except wp. 2. d1, d2, d4, d5 : m pd45128163 (2m words 16 bits 4 banks) h h h
data sheet m14279ej4v0ds00 5 mc-458cb647 electrical specifications all voltages are referenced to v ss (gnd). after power up, wait more than 100 m s and then, execute power on sequence and cbr (auto) refresh before proper device operation is achieved. absolute maximum ratings parameter symbol condition rating unit voltage on power supply pin relative to gnd v cc C0.5 to +4.6 v voltage on input pin relative to gnd v t C0.5 to +4.6 v short circuit output current i o 50 ma power dissipation p d 4w operating ambient temperature t a 0 to 70 c storage temperature t stg C55 to +125 c caution exposing the device to stress above those listed in absolute maximum ratings could cause permanent damage. the device is not meant to be operated under conditions outside the limits described in the operational section of this specification. exposure to absolute maximum rating conditions for extended periods may affect device reliability. recommended operating conditions parameter symbol condition min. typ. max. unit supply voltage v cc 3.0 3.3 3.6 v high level input voltage v ih 2.0 v cc + 0.3 v low level input voltage v il - 0.3 +0.8 v operating ambient temperature t a 070 c capacitance (t a = 25 c, f = 1 mhz) parameter symbol test condition min. typ. max. unit input capacitance c i1 a0 - a11, ba0(a13), ba1(a12), /ras, /cas, /we 15 40 pf c i2 clk0, clk2 20 40 c i3 cke0 15 40 c i4 /cs0, /cs2 10 20 c i5 dqmb0 - dqmb7 3 13 data input/output capacitance c i/o dq0 - dq63 4 13 pf h
data sheet m14279ej4v0ds00 6 mc-458cb647 dc characteristics (recommended operating conditions unless otherwise noted) parameter symbol test condition min. max. unit notes operating current i cc1 burst length = 1 /cas latency = 2 440 ma 1 t rc 3 t rc(min.) , i o = 0 ma /cas latency = 3 460 precharge standby current in i cc2 p cke v il(max.) , t ck = 15 ns 4 ma power down mode i cc2 ps cke v il(max.) , t ck = 4 precharge standby current in i cc2 ncke 3 v ih(min.) , t ck = 15 ns, /cs 3 v ih(min.) ,80ma non power down mode input signals are changed one time during 30 ns. i cc2 ns cke 3 v ih(min.) , t ck = , input signals are stable. 32 active standby current in i cc3 p cke v il(max.) , t ck = 15 ns 20 ma power down mode i cc3 ps cke v il(max.) , t ck = 16 active standby current in i cc3 ncke 3 v ih(min.) , t ck = 15 ns, /cs 3 v ih(min.) , 120 ma non power down mode input signals are changed one time during 30 ns. i cc3 ns cke 3 v ih(min.) , t ck = , input signals are stable. 80 operating current i cc4 t ck 3 t ck(min.) , i o = 0 ma /cas latency = 2 580 ma 2 (burst mode) /cas latency = 3 740 cbr (auto) refresh current i cc5 t rc 3 t rc(min.) /cas latency = 2 920 ma 3 /cas latency = 3 960 self refresh current i cc6 cke 0.2 v8ma input leakage current i i(l) v i = 0 to 3.6 v, all other pins not under test = 0 v C4 +4 m a output leakage current i o(l) d out is disabled, v o = 0 to 3.6 v C1.5 +1.5 m a high level output voltage v oh i o = C4.0 ma 2.4 v low level output voltage v ol i o = +4.0 ma 0.4 v notes 1. i cc1 depends on output loading and cycle rates. specified values are obtained with the output open. in addition to this, i cc1 is measured on condition that addresses are changed only one time during t ck (min.) . 2 .i cc4 depends on output loading and cycle rates. specified values are obtained with the output open. in addition to this, i cc4 is measured on condition that addresses are changed only one time during t ck (min.) . 3 .i cc5 is measured on condition that addresses are changed only one time during t ck (min.) .
data sheet m14279ej4v0ds00 7 mc-458cb647 ac characteristics (recommended operating conditions unless otherwise noted) test conditions parameter value unit ac high level input voltage / low level input voltage 2.4 / 0.4 v input timing measurement reference level 1.4 v transition time (input rise and fall time) 1 ns output timing measurement reference level 1.4 v t ck t ch t cl 2.4 v 1.4 v 0.4 v clk 2.4 v 1.4 v 0.4 v input t setup t hold output t ac t oh
data sheet m14279ej4v0ds00 8 mc-458cb647 synchronous characteristics parameter symbol -a75 unit note min. max. clock cycle time /cas latency = 3 t ck3 7.5 (133 mhz) ns /cas latency = 2 t ck2 10 (100 mhz) ns access time from clk /cas latency = 3 t ac3 5.4 ns 1 /cas latency = 2 t ac2 6.0 ns 1 clk high level width t ch 2.5 ns clk low level width t cl 2.5 ns data-out hold time t oh 3.0 ns 1 data-out low-impedance time t lz 0ns data-out high-impedance time /cas latency = 3 t hz3 3.0 5.4 ns /cas latency = 2 t hz2 3.0 6.0 ns data-in setup time t ds 1.5 ns data-in hold time t dh 0.8 ns address setup time t as 1.5 ns address hold time t ah 0.8 ns cke setup time t cks 1.5 ns cke hold time t ckh 0.8 ns cke setup time (power down exit) t cksp 1.5 ns command (/cs0, /cs2, /ras, /cas, /we, t cms 1.5 ns dqmb0 - dqmb7) setup time command (/cs0, /cs2, /ras, /cas, /we, t cmh 0.8 ns dqmb0 - dqmb7) hold time note 1. output load output z = 50 w 50 pf remark these specifications are applied to the monolithic device.
data sheet m14279ej4v0ds00 9 mc-458cb647 asynchronous characteristics parameter symbol -a75 unit note min. max. act to ref/act command period (operation) t rc 67.5 ns ref to ref/act command period (refresh) t rc1 67.5 ns act to pre command period t ras 45 120,000 ns pre to act command period t rp 20 ns delay time act to read/write command t rcd 20 ns act(one) to act(another) command period t rrd 15 ns data-in to pre command period t dpl 8ns data-in to act(ref) command /cas latency = 3 t dal3 1clk+22.5 ns 1 period (auto precharge) /cas latency = 2 t dal2 1clk+20 ns 1 mode register set cycle time t rsc 2clk transition time t t 0.5 30 ns refresh time (4,096 refresh cycles) t ref 64 ms note this device can satisfy the t dal3 spec of 1clk+20 ns for up to and including 125 mhz operation.
data sheet m14279ej4v0ds00 10 mc-458cb647 serial pd (1/2) byte no. function described hex bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 notes 0defines the number of bytes written into80h10000000 128 bytes serial pd memory 1 total number of bytes of serial pd memory 08h 0 0001000 256 bytes 2 fundamental memory type 04h 0 0000100sdram 3number of rows 0ch0000110012 rows 4number of columns 09h000010019 columns 5 number of banks 01h 0 00000011 bank 6data width 40h0100000064 bits 7 data width (continued) 00h 0 00000000 8 voltage interface 01h 0 0000001lvttl 9cl = 3 cycle time 75h011101017.5 ns 10cl = 3 access time 54h010101005.4 ns 11dimm configuration type 00h00000000non-parity 12refresh rate/type 80h10000000normal 13sdram width 10h00010000 16 14error checking sdram width 00h00000000none 15minimum clock delay 01h000000011 clock 16 burst length supported 8fh 1 00011111, 2, 4, 8, f 17number of banks on each sdram 04h000001004 banks 18 /cas latency supported 06h 0 00001102,3 19 /cs latency supported 01h 0 00000010 20 /we latency supported 01h 0 00000010 21 sdram module attributes 00h 0 0000000 22 sdram device attributes : general 0eh 0 0001110 23cl = 2 cycle time a0h1010000010 ns 24cl = 2 access time 60h011000006 ns 25-26 00h00000000 27 t rp(min.) 14h0001010020 ns 28 t rrd(min.) 0fh0000111115 ns 29 t rcd(min.) 14h0001010020 ns 30 t ras(min.) 2dh0010110145 ns 31 module bank density 10h 0 001000064m bytes
data sheet m14279ej4v0ds00 11 mc-458cb647 (2/2) byte no. function described hex bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 notes 32 command and address signal input 15h 0 00101011.5 ns setup time 33 command and address signal input 08h 0 00010000.8 ns hold time 34 data signal input setup time 15h 0 00101011.5 ns 35 data signal input hold time 08h 0 00010000.8 ns 36-61 00h00000000 62spd revision 12h000100101.2 63 checksum for bytes 0 - 62 a6h 1 0100110 64-71 manufactures jedec id code 72 manufacturing location 73-90 manufactures p/n 91-92 revision code 93-94 manufacturing date 95-98 assembly serial number 99-125 mfg specific 126 intel specification frequency 64h 0 1100100 127 intel specification /cas latency support a5h 1 0100101 timing chart refer to the synchronous dram module timing chart information (m13348e) .
data sheet m14279ej4v0ds00 12 mc-458cb647 package drawing 168-pin dual in-line module (socket type) item millimeters a 133.35 a1 133.35 0.13 w 1.00 0.05 x 2.54 0.10 y 3.00 min. b 11.43 n 2.80 max. p 1.00 q r2.0 r 4.00 0.10 g 6.35 c 36.83 d 6.35 d1 2.00 d2 3.125 e 54.61 h 1.27 (t.p.) i 8.89 m2 19.78 j 24.495 k 42.18 l 17.78 m 25.4 0.13 t 1.27 0.10 u 4.0 min. v 0.20 0.15 s 3.00 m1 5.62 m168s-50a103 z 3.00 min. f m1(area b) y r m2(area a) j h d q t u detail of a part detail of b part d2 p d1 x v a (optional holes) s w n a(area b) b c k b g i a1(area a) e z m l
data sheet m14279ej4v0ds00 13 mc-458cb647 [ memo ]
data sheet m14279ej4v0ds00 14 mc-458cb647 [ memo ]
data sheet m14279ej4v0ds00 15 mc-458cb647 notes for cmos devices 1 precaution against esd for semiconductors note: strong electric field, when exposed to a mos device, can cause destruction of the gate oxide and ultimately degrade the device operation. steps must be taken to stop generation of static electricity as much as possible, and quickly dissipate it once, when it has occurred. environmental control must be adequate. when it is dry, humidifier should be used. it is recommended to avoid using insulators that easily build static electricity. semiconductor devices must be stored and transported in an anti-static container, static shielding bag or conductive material. all test and measurement tools including work bench and floor should be grounded. the operator should be grounded using wrist strap. semiconductor devices must not be touched with bare hands. similar precautions need to be taken for pw boards with semiconductor devices on it. 2 handling of unused input pins for cmos note: no connection for cmos device inputs can be cause of malfunction. if no connection is provided to the input pins, it is possible that an internal input level may be generated due to noise, etc., hence causing malfunction. cmos devices behave differently than bipolar or nmos devices. input levels of cmos devices must be fixed high or low by using a pull-up or pull-down circuitry. each unused pin should be connected to v dd or gnd with a resistor, if it is considered to have a possibility of being an output pin. all handling related to the unused pins must be judged device by device and related specifications governing the devices. 3 status before initialization of mos devices note: power-on does not necessarily define initial status of mos device. production process of mos does not define the initial operation status of the device. immediately after the power source is turned on, the devices with reset function have not yet been initialized. hence, power-on does not guarantee out-pin levels, i/o settings or contents of registers. device is not initialized until the reset signal is received. reset operation must be executed immediately after power-on for devices having reset function.
mc-458cb647 caution for handling memory modules when handling or inserting memory modules, be sure not to touch any components on the modules, such as the memory ic, chip capacitors and chip resistors. it is necessary to avoid undue mechanical stress on these components to prevent damaging them. when re-packing memory modules, be sure the modules are not touching each other. modules in contact with other modules may cause excessive mechanical stress, which may damage the modules. m8e 00. 4 the information in this document is current as of september, 2000. the information is subject to change without notice. for actual design-in, refer to the latest publications of nec's data sheets or data books, etc., for the most up-to-date specifications of nec semiconductor products. not all products and/or types are available in every country. please check with an nec sales representative for availability and additional information. no part of this document may be copied or reproduced in any form or by any means without prior written consent of nec. nec assumes no responsibility for any errors that may appear in this document. nec does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from the use of nec semiconductor products listed in this document or any other liability arising from the use of such products. no license, express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of nec or others. descriptions of circuits, software and other related information in this document are provided for illustrative purposes in semiconductor product operation and application examples. the incorporation of these circuits, software and information in the design of customer's equipment shall be done under the full responsibility of customer. nec assumes no responsibility for any losses incurred by customers or third parties arising from the use of these circuits, software and information. while nec endeavours to enhance the quality, reliability and safety of nec semiconductor products, customers agree and acknowledge that the possibility of defects thereof cannot be eliminated entirely. to minimize risks of damage to property or injury (including death) to persons arising from defects in nec semiconductor products, customers must incorporate sufficient safety measures in their design, such as redundancy, fire-containment, and anti-failure features. nec semiconductor products are classified into the following three quality grades: "standard", "special" and "specific". the "specific" quality grade applies only to semiconductor products developed based on a customer-designated "quality assurance program" for a specific application. the recommended applications of a semiconductor product depend on its quality grade, as indicated below. customers must check the quality grade of each semiconductor product before using it in a particular application. "standard": computers, office equipment, communications equipment, test and measurement equipment, audio and visual equipment, home electronic appliances, machine tools, personal electronic equipment and industrial robots "special": transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life support) "specific": aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems and medical equipment for life support, etc. the quality grade of nec semiconductor products is "standard" unless otherwise expressly specified in nec's data sheets or data books, etc. if customers wish to use nec semiconductor products in applications not intended by nec, they must contact an nec sales representative in advance to determine nec's willingness to support a given application. (note) (1) "nec" as used in this statement means nec corporation and also includes its majority-owned subsidiaries. (2) "nec semiconductor products" means any semiconductor product developed or manufactured by or for nec (as defined above).

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