sc1102 synchronous dc/dc controller for distributed power supply applications ? 2000 semtech corp. 652 mitchell road newbury park ca 91320 preliminary - february 29, 2000 1 description the sc1102 is a low-cost, full featured, synchronous voltage-mode controller designed for use in single ended power supply applications where efficiency is of primary concern. synchronous operation allows for the elimination of heat sinks in many applications. the sc1102 is ideal for implementing dc/dc converters needed to power advanced microprocessors in low cost systems, or in distributed power applications where efficiency is important. internal level-shift, high- side drive circuitry, and preset shoot-thru control, al- lows the use of inexpensive n-channel power switches. sc1102 features include temperature compensated voltage reference, triangle wave oscillator and current sense comparator circuitry. power good signaling, shutdown, and over voltage protection are also pro- vided. the sc1102 operates at a fixed 200khz, providing an optimum compromise between efficiency, external component size, and cost. features ? 1.265v reference available ? synchronous operation ? over current fault monitor ? on-chip power good and ovp functions ? small size with minimum external components ? soft start ? r ds(on) current sensing applications ? microprocessor core supply ? low cost synchronous applications ? voltage regulator modules (vrm) tel:805-498-2111 fax:805-498-3804 web:http:// www.semtech.com device (1) package temp. range (t j ) sc1102cs so-14 0 - 125c ordering information note: (1) add suffix ?tr? for tape and reel. application circuit figure 1. typical distributed power supply vcc 1 pwrgd 2 ovp 3 ocset 4 phase 5 drvh 6 pgnd 7 drvl 8 bstl 9 bsth 10 sense 11 vref 12 ss/shdn 13 gnd 14 u1 sc1102 q1 irlr3103/hs q2 irlr3103/hs r6 2.7 r5 3.9 r3 10 l1 4uh c10 1500/6.3 c11 1500/6.3 c12 1500/6.3v c13 1500/6.3v c8 1500/6.3v c6 1500/6.3v c7 1500/6.3v c9 0.1 r2 5.1k r4 1k c2 0.1 c3 0.1 c1 0.1 r1 1k pwrgd ovp shdn vref +12v + _ + _ c4 1.0 vin +5v vout +3.3v* c14 0.1 gnd r7 127 r8 205* note: * ) vout = 1.265 x (1+r8/r7) c5 1500/6.3v
sc1102 synchronous dc/dc controller for distributed power supply applications ? 2000 semtech corp. 652 mitchell road newbury park ca 91320 preliminary - february 29, 2000 2 note: (1) specification refers to application circuit (figure 1.). electrical characteristics unless specified: v cc = 4.75v to 12.6v; gnd = pgnd = 0v; fb = v o ; v bstl = 12v; v bsth-phase = 12v; t j = 25 o c parameter conditions min typ max units power supply supply voltage v cc 4.2 12.6 v supply current en = v cc 8ma line regulation v o = 2.5v 0.5 % error amplifier gain (aol) 35 db input bias 58a oscillator oscillator frequency 180 200 220 khz oscillator max duty cycle 90 95 % mosfet drivers dh sink/source current bst h - dh = 4.5v, dh - phase = 2v 1 a dl sink/source current bst l - dl = 4.5v, dl - pgnd l = 2v 1 a protection ovp threshold voltage 20 % ovp source current v ovp = 3v 10 ma power good threshold 90 110 % dead time 45 100 ns over current set isource v ocset = 4.5v 180 200 220 a absolute maximum ratings parameter symbol maximum units v cc , bstl to gnd v in -0.3 to 14 v pgnd to gnd 0.5 v phase to gnd -0.3 to 18 v bsth to phase 14 v thermal resistance junction to case jc 45 c/w thermal resistance junction to ambient ja 115 c/w operating temperature range t a 0 to 70 c storage temperature range t stg -65 to +150 c lead temperature (soldering) 10 sec t lead 300 c
sc1102 synchronous dc/dc controller for distributed power supply applications ? 2000 semtech corp. 652 mitchell road newbury park ca 91320 preliminary - february 29, 2000 3 electrical characteristics (cont) unless specified: v cc = 4.75v to 12.6v; gnd = pgnd = 0v; fb = v o ; v bstl = 12v; v bsth-phase = 12v; t j = 25 o c parameter conditions min typ max units reference reference voltage 1.252 1.265 1.278 v accuracy -1 +1 % soft start charge current v ss = 1.5v 8.0 10 12 a discharge current v ss = 1.5v 1.3 2 2.4 a block diagram pin configuration top view (14-pin soic)
sc1102 synchronous dc/dc controller for distributed power supply applications ? 2000 semtech corp. 652 mitchell road newbury park ca 91320 preliminary - february 29, 2000 4 note: (1) all logic level inputs and outputs are open collector ttl compatible. pin description pin # pin name pin function 1 vcc chip supply voltage 2 pwrgd logic high indicates correct output voltage 3 ovp over voltage protection. 4 ocset sets the converter overcurrent trip point 5 phase input from the phase node between the mosfet?s 6 dh high side driver output 7 pgnd power ground 8 dl low side driver output 9 bstl bootstrap, low side driver. 10 bsth bootstrap, high side driver. 11 sense voltage sense input 12 vref buffered band gap voltage reference. 13 ss/shdn soft start. a capacitor to ground sets the slow start time. 14 gnd signal ground characteristic curves sc1102 voltage regulation, vin=5v -2% -1% 0% 1% 2% 0123456789101112 current, a 3.3v 2.5v 2.0v 1.3v sc1102 effiency, vin=5v 60% 70% 80% 90% 100% 0123456789101112 current, a 3.3v 2.5v 2.0v 1.3v
sc1102 synchronous dc/dc controller for distributed power supply applications ? 2000 semtech corp. 652 mitchell road newbury park ca 91320 preliminary - february 29, 2000 5 gate drive waveforms output ripple voltage ch1: top fet ch2: bottom fet ch1: vo_rpl ch1: vo_rpl ch1: top fet ch2: bottom fet 1. v in = 5v; v o = 3.3v; i out = 12a 2. v in = 5v; v out = 1.3v; i out = 12a
sc1102 synchronous dc/dc controller for distributed power supply applications ? 2000 semtech corp. 652 mitchell road newbury park ca 91320 preliminary - february 29, 2000 6 hiccup mode start up ch1: vin ch2: vss ch3: top gate ch4: vout vin = 5v vout = 3.3v iout = 2a vbst = 12v ch1: vin ch2: vss ch3: top gate ch4: vout vin = 5v vout = 3.3v vbst = 12v iout = s.c.
sc1102 synchronous dc/dc controller for distributed power supply applications ? 2000 semtech corp. 652 mitchell road newbury park ca 91320 preliminary - february 29, 2000 7 theory of operation synchronous buck converter primary v core power is provided by a synchronous, voltage-mode pulse width modulated (pwm) controller. this section has all the features required to build a high efficiency synchronous buck converter, including ?power good? flag, shut-down, and cycle-by-cycle cur- rent limit. the output voltage of the synchronous converter is set and controlled by the output of the error amplifier. the external resistive divider reference voltage is derived from an internal trimmed-bandgap voltage reference (see fig. 1). the inverting input of the error amplifier receives its voltage from the sense pin. the internal oscillator uses an on-chip capacitor and trimmed precision current sources to set the oscillation frequency to 200khz. the triangular output of the os- cillator sets the reference voltage at the inverting input of the comparator. the non-inverting input of the com- parator receives it?s input voltage from the error ampli- fier. when the oscillator output voltage drops below the error amplifier output voltage, the comparator output goes high. this pulls dl low, turning off the low-side fet, and dh is pulled high, turning on the high-side fet (once the cross-current control allows it). when the oscillator voltage rises back above the error ampli- fier output voltage, the comparator output goes low. this pulls dh low, turning off the high-side fet, and dl is pulled high, turning on the low-side fet (once the cross-current control allows it). as sense increases, the output voltage of the error amplifier decreases. this causes a reduction in the on- time of the high-side mosfet connected to dh, hence lowering the output voltage. under voltage lockout the under voltage lockout circuit of the sc1102 as- sures that the high-side mosfet driver outputs re- main in the off state whenever the supply voltage drops below set parameters. lockout occurs if v cc falls below 4.1v. normal operation resumes once v cc rises above 4.2v. over-voltage protection the over-voltage protection pin (ovp) is high only when the voltage at sense is 20% higher than the tar- get value programmed by the external resistor divider. the ovp pin is internally connected to a pnp?s collector. power good the power good function is to confirm that the regula- tor outputs are within +/-10% of the programmed level. pwrgd remains high as long as this condition is met. pwrgd is connected to an internal open col- lector npn transistor. soft start initially, ss/shdn sources 10a of current to charge an external capacitor. the outputs of the error ampli- fiers are clamped to a voltage proportional to the volt- age on ss/shdn. this limits the on-time of the high- side mosfets, thus leading to a controlled ramp-up of the output voltages. r ds(on) current limiting the current limit threshold is set by connecting an external resistor from the v cc supply to ocset. the voltage drop across this resistor is due to the 200a internal sink sets the voltage at the pin. this voltage is compared to the voltage at the phase node. this comparison is made only when the high-side drive is high to avoid false current limit triggering due to un- contributing measurements from the mosfet?s off- voltage. when the voltage at phase is less than the voltage at ocset, an overcurrent condition occurs and the soft start cycle is initiated. the synchronous switcher turns off and ss/shdn starts to sink 2a. when ss/shdn reaches 0.8v, it then starts to source 10a and a new cycle begins. hiccup mode during power up, the ss/shdn pin is internally pulled low until vcc reaches the undervoltage lock- out level of 4.2v. once v cc has reached 4.2v, the ss/shdn pin is released and begins to source 10a of current to the external soft-start capacitor. as the soft-start voltage rises, the output of the internal error amplifier is clamped to this voltage. when the error signal reaches the level of the internal triangular os- cillator, which swings from 1v to 2v at a fixed fre- quency of 200 khz, switching occurs. as the error signal crosses over the oscillator signal, the duty cy- cle of the pwm signal continues to increase until the output comes into regulation. if an over-current con- dition has not occurred the soft-start voltage will con- tinue to rise and level off at about 2.2v.
sc1102 synchronous dc/dc controller for distributed power supply applications ? 2000 semtech corp. 652 mitchell road newbury park ca 91320 preliminary - february 29, 2000 8 theory of operation (con?t) an over-current condition occurs when the high-side drive is turned on, but the phase node does not reach the voltage level set at the ocset pin. the phase node is sampled only once per cycle during the valley of the triangular oscillator. once an over-current occurs, the high-side drive is turned off and the low- side drive turns on and the ss/shdn pin begins to sink 2ua. the soft-start voltage will begin to decrease as the 2ua of current discharges the external capaci- tor. when the soft-start voltage reaches 0.8v, the ss/ shdn pin will begin to source 10ua and begin to charge the external capacitor causing the soft-start voltage to rise again. again, when the soft-start volt- age reaches the level of the internal oscillator, switch- ing will occur. if the over-current condition is no longer present, nor- mal operation will continue. if the over-current condi- tion is still present, the ss/shdn pin will again begin to sink 2ua. this cycle will continue indefinitely until the over-current condition is removed. in conclusion, below is shown a ?12v application cir- cuit? which has a bsth voltage derived by bootstrap- ping input voltage to the phase node through diode d1. this circuit is very useful in cases where only input power of 12v is available. vcc 1 pwrgd 2 ovp 3 ocset 4 phase 5 drvh 6 pgnd 7 drvl 8 bstl 9 bsth 10 sense 11 vref 12 ss/shdn 13 gnd 14 u1 sc1102 q1 stp40ne q2 stp40ne r6 3.3 r5 3.9 d3 sbl1030ct r3 10 l1** 4uh d1 1n4148 c9 0.1 c10 1500/6.3 c11 1500/6.3 c12 1500/6.3v c13 1500/6.3v c4 820/16v c1 820/16v c2 820/16v c3 820/16v c5 0.1 r1 1k r4 1k c7 1.0 c8 0.22 c6 0.01 r2 1.5k pwrgd ovp shdn vref + _ + _ vin 12v vout +2.50 @ 15a c14 0.1 r7 127 r8* 124 note: * vout = 1.265 x (1+r8/r7) +5v d2 1n4148 ** l1: kool"u" p.n.77224a7, 9ts. #16awg application circuit 12v application circuit with bootstrapped bsth
sc1102 synchronous dc/dc controller for distributed power supply applications ? 2000 semtech corp. 652 mitchell road newbury park ca 91320 preliminary - february 29, 2000 9 outline drawing so-14 ecn00-893
|
