cmos 8-bit single chip microcomputer description the cxp87500 is a cmos 8-bit single chip micro- computer of piggyback/evaluator combined type, which is developed for evaluating the function of the cxp87532/87540. features a wide instruction set (213 instructions) which covers various types of data ?16-bit operation/multiplication and division/ boolean bit operation instructions minimum instruction cycle 326ns at 12.288mhz operation applicable eprom lcc type 27c512 (maximum 40kbytes are available) incorporated ram capacity 1344bytes peripheral functions ?arithmetic coprocessor signed multiplication and division, signed sum of products. high speed execution of many bits shift rotation operation ?a/d converter 8-bit, 8-channel, successive approximation method (conversion time of 13 s/12.288mhz) incorporated 3-stage fifo for a/d conversion data ?serial interface incorporated buffer ram (auto transfer for 1 to 128bytes), 2-channel ?timer 8-bit timer 8-bit timer/counter 19-bit time base timer ?high precision timing pattern generator ppg 11-pin, 32-stage programmable ?pwm output 12-bit, 2-channel (repetitive frequency 48khz) 8-bit, 3-channel (repetitive frequency 48khz) ?servo input control capstan fg, drum fg/pg, reel fg input ?frc capture unit incorporated 28-bit and 8-stage fifo interruption 12 factors, 12 vectors, multi-interruption possible standby mode sleep/stop package 100-pin ceramic pqfp note) mask option depends on the type of the cxp87500. refer to the products list for details. structure silicon gate cmos ic ?1 e93x12b81-ps sony reserves the right to change products and specifications without prior notice. this information does not convey any licens e by any implication or otherwise under any patents or other right. application circuits shown, if any, are typical examples illustr ating the operation of the devices. sony cannot assume responsibility for any problems arising out of the use of these circuits. cxp87500 piggyback/ evaluator type 100 pin pqfp (ceramic) qfp supported lqfp supported
? 2 cxp87500 pin assignment in piggyback mode (qfp package) note) 1. nc (pin 90) is always connected to v dd . 2. v ss (pins 41 and 88) are both connected to gnd. 3. mp (pin 39) is always connected to gnd. p b 5 / p p o 5 p b 4 / p p o 4 p b 3 / p p o 3 p b 2 / p p o 2 p b 1 / p p o 1 p b 0 / p p o 0 p c 7 p c 6 p c 5 p c 4 p c 3 p c 2 p c 1 p c 0 p d 7 p d 6 p d 5 p d 4 p d 3 p d 2 p d 1 p d 0 p i 7 p i 6 p i 5 p i 4 p i 3 p i 2 p i 1 p i 0 p e 6 / p w m 4 p e 7 / s w p p k 0 / r f d t p k 1 / m c l k p k 2 p k 3 p g 0 / e x i 0 p g 1 / e x i 1 p g 2 / d r e f p g 3 / d p g p g 4 / d f g p g 5 / c f g p g 6 / r f g 0 p g 7 / r f g 1 p f 0 / a n 0 p f 1 / a n 1 p f 2 / a n 2 p f 3 / a n 3 p f 4 / a n 4 p f 5 / a n 5 p f 6 / a n 6 p f 7 / a n 7 a v d d a v r e f a v s s s c k 0 s o 0 s i 0 c s 0 p h 0 / s c k 1 p j 7 p j 6 p j 5 p j 4 p j 3 p j 2 p j 1 p j 0 m p r s t v s s x t a l e x t a l p h 7 p h 6 p h 5 p h 4 p h 3 / c s 1 / i n t 1 p h 2 / s i 1 p h 1 / s o 1 p b 6 / p p o 6 p b 7 / p p o 7 p a 0 / p p o 8 p a 1 / p p o 9 p a 2 / p p o 1 0 p a 3 / p r o u t p a 4 / a t f s 1 p a 5 / a t f s 3 p a 6 / a r e a p a 7 / a t f s 2 n c v d d v s s n m i p e 0 / i n t 0 p e 1 / e c / i n t 2 p e 2 / p w m 0 p e 3 / p w m 1 p e 4 / p w m 2 p e 5 / p w m 3 a 8 a 9 a 1 1 n c o e a 1 0 c e d 7 d 6 a 6 a 5 a 4 a 3 a 2 a 1 a 0 n c d 0 a 7 a 1 2 a 1 5 n c v d d a 1 4 a 1 3 d 1 d 2 g n d n c d 3 d 4 d 5 2 3 4 5 6 7 8 9 1 0 1 1 1 2 1 3 1 4 1 5 1 6 1 7 1 8 1 9 2 0 2 1 2 2 2 3 2 4 2 5 2 6 2 7 2 8 2 9 3 0 3 1 3 2 1 2 3 4 5 6 7 8 9 1 0 1 1 1 2 1 3 1 4 1 5 1 6 1 7 1 8 1 9 2 0 2 1 2 2 2 3 2 4 2 5 2 6 2 7 2 8 2 9 3 0 1 4 0 3 9 3 8 3 7 3 6 3 5 3 4 3 1 3 2 3 3 4 1 4 2 4 3 4 4 4 5 4 6 4 7 4 8 5 0 5 1 5 2 5 3 5 4 5 5 5 6 5 7 5 8 5 9 6 0 7 0 6 9 6 8 6 7 6 3 6 4 6 5 6 6 6 1 6 2 7 1 7 2 7 3 7 4 7 5 7 6 7 7 7 8 7 9 8 0 8 1 8 2 8 3 8 4 8 8 8 7 8 6 8 5 8 9 9 0 1 0 0 9 9 9 8 9 7 9 6 9 5 9 4 9 1 9 2 9 3 4 9
? 3 cxp87500 pin assignment in piggyback mode (lqfp package) note) 1. nc (pin 88) is always connected to v dd . 2. v ss (pins 39 and 86) are both connected to gnd. 3. mp (pin 37) is always connected to gnd. a a p e 6 / p w m 4 p e 7 / s w p p k 0 / r f d t p k 1 / m c l k p k 2 p k 3 p g 0 / e x i 0 p g 1 / e x i 1 p g 2 / d r e f p g 3 / d p g p g 4 / d f g p g 5 / c f g p g 6 / r f g 0 p g 7 / r f g 1 p f 0 / a n 0 p f 1 / a n 1 p f 2 / a n 2 p f 3 / a n 3 p f 4 / a n 4 p f 5 / a n 5 p f 6 / a n 6 p f 7 / a n 7 a v d d a v r e f a v s s p b 3 / p p o 3 p b 2 / p p o 2 p b 1 / p p o 1 p b 0 / p p o 0 p c 7 p c 6 p c 5 p c 4 p c 3 p c 2 p c 1 p c 0 p d 7 p d 6 p d 5 p d 4 p d 3 p d 2 p d 1 p d 0 p i 7 p i 6 p i 5 p b 6 / p p o 6 p b 7 / p p o 7 p a 0 / p p o 8 p a 1 / p p o 9 p a 2 / p p o 1 0 p a 3 / p r o u t p a 4 / a t f s 1 p a 5 / a t f s 3 p a 6 / a r e a p a 7 / a t f s 2 n c v d d v s s n m i p e 0 / i n t 0 p e 1 / e c / i n t 2 p e 2 / p w m 0 p e 3 / p w m 1 p e 4 / p w m 2 p e 5 / p w m 3 p j 2 p j 1 p j 0 m p r s t v s s x t a l e x t a l p h 7 p h 6 p h 5 p h 4 p h 3 / c s 1 / i n t 1 p h 2 / s i 1 p h 1 / s o 1 p j 7 p j 6 p j 5 p j 4 p j 3 p i 4 p i 3 p i 2 p i 1 p i 0 p h 0 / s c k 1 c s 0 s o 0 s i 0 p b 4 / p p o 4 p b 5 / p p o 5 s c k 0 2 3 4 5 6 7 8 9 1 0 1 1 1 2 1 3 1 4 1 5 1 6 1 7 1 8 1 9 2 0 2 1 2 2 2 3 2 4 2 5 1 2 6 2 7 2 8 2 9 3 0 3 3 5 0 4 0 3 9 3 8 3 7 3 6 3 5 3 4 3 1 3 2 4 1 4 2 4 3 4 4 4 5 4 6 4 7 4 8 4 9 5 1 5 2 5 3 5 4 5 5 5 6 5 7 5 8 5 9 6 0 7 0 6 9 6 8 6 7 6 3 6 4 6 5 6 6 6 1 6 2 7 1 7 2 7 3 7 4 7 5 7 6 7 7 7 8 7 9 8 0 8 1 8 2 8 3 8 4 8 8 8 7 8 6 8 5 8 9 9 0 1 0 0 9 9 9 8 9 7 9 6 9 5 9 4 9 1 9 2 9 3 2 3 4 5 6 7 8 9 1 0 1 1 1 2 1 3 1 4 1 1 5 1 6 1 7 1 8 1 9 2 0 2 1 2 2 2 3 2 4 2 5 2 6 2 7 2 8 a 1 5 a 1 2 a 7 a 6 a 5 a 4 a 3 a 2 a 1 a 0 d 0 d 1 d 2 g n d v d d a 1 4 a 1 3 a 8 a 9 a 1 1 o e a 1 0 c e d 7 d 6 d 5 d 4 d 3
? 4 cxp87500 pin assignment in evaluator mode (qfp package) note) 1. nc (pin 90) is always connected to v dd . 2. v ss (pins 41 and 88) are both connected to gnd. 3. mp (pin 39) is always connected to gnd. p b 5 / p p o 5 p b 4 / p p o 4 p b 3 / p p o 3 p b 2 / p p o 2 p b 1 / p p o 1 p b 0 / p p o 0 p c 7 p c 6 p c 5 p c 4 p c 3 p c 2 p c 1 p c 0 p d 7 p d 6 p d 5 p d 4 p d 3 p d 2 p d 1 p d 0 p i 7 p i 6 p i 5 p i 4 p i 3 p i 2 p i 1 p i 0 p e 6 / p w m 4 p e 7 / s w p p k 0 / r f d t p k 1 / m c l k p k 2 p k 3 p g 0 / e x i 0 p g 1 / e x i 1 p g 2 / d r e f p g 3 / d p g p g 4 / d f g p g 5 / c f g p g 6 / r f g 0 p g 7 / r f g 1 p f 0 / a n 0 p f 1 / a n 1 p f 2 / a n 2 p f 3 / a n 3 p f 4 / a n 4 p f 5 / a n 5 p f 6 / a n 6 p f 7 / a n 7 a v d d a v r e f a v s s s c k 0 s o 0 s i 0 c s 0 p h 0 / s c k 1 p j 7 p j 6 p j 5 p j 4 p j 3 p j 2 p j 1 p j 0 m p r s t v s s x t a l e x t a l p h 7 p h 6 p h 5 p h 4 p h 3 / c s 1 / i n t 1 p h 2 / s i 1 p h 1 / s o 1 p b 6 / p p o 6 p b 7 / p p o 7 p a 0 / p p o 8 p a 1 / p p o 9 p a 2 / p p o 1 0 p a 3 / p r o u t p a 4 / a t f s 1 p a 5 / a t f s 3 p a 6 / a r e a p a 7 / a t f s 2 n c v d d v s s n m i p e 0 / i n t 0 p e 1 / e c / i n t 2 p e 2 / p w m 0 p e 3 / p w m 1 p e 4 / p w m 2 p e 5 / p w m 3 2 3 4 5 6 7 8 9 1 0 1 1 1 2 1 3 1 4 1 5 1 6 1 7 1 8 1 9 2 0 2 1 2 2 2 3 2 4 2 5 2 6 2 7 2 8 2 9 3 0 1 4 0 3 9 3 8 3 7 3 6 3 5 3 4 3 1 3 2 3 3 4 1 4 2 4 3 4 4 4 5 4 6 4 7 4 8 5 0 5 1 5 2 5 3 5 4 5 5 5 6 5 7 5 8 5 9 6 0 7 0 6 9 6 8 6 7 6 3 6 4 6 5 6 6 6 1 6 2 7 1 7 2 7 3 7 4 7 5 7 6 7 7 7 8 7 9 8 0 8 1 8 2 8 3 8 4 8 8 8 7 8 6 8 5 8 9 9 0 1 0 0 9 9 9 8 9 7 9 6 9 5 9 4 9 1 9 2 9 3 4 9 a 8 a 9 a 1 1 n c h a l t a 1 0 e / p i / t m o n a 6 / d 6 a 5 / d 5 a 4 / d 4 a 3 / d 3 a 2 / d 2 a 1 / d 1 a 0 / d 0 n c r d a 7 / d 7 a 1 2 a 1 5 n c v d d a 1 4 a 1 3 w r s y n c g n d n c c 2 c 1 r s t 2 3 4 5 6 7 8 9 1 0 1 1 1 2 1 3 1 4 1 5 1 6 1 7 1 8 1 9 2 0 2 1 2 2 2 3 2 4 2 5 2 6 2 7 2 8 2 9 3 0 3 1 3 2 1
? 5 cxp87500 pin assignment in evaluator mode (lqfp package) note) 1. nc (pin 88) is always connected to v dd . 2. v ss (pins 39 and 86) are both connected to gnd. 3. mp (pin 37) is always connected to gnd. a a p e 6 / p w m 4 p e 7 / s w p p k 0 / r f d t p k 1 / m c l k p k 2 p k 3 p g 0 / e x i 0 p g 1 / e x i 1 p g 2 / d r e f p g 3 / d p g p g 4 / d f g p g 5 / c f g p g 6 / r f g 0 p g 7 / r f g 1 p f 0 / a n 0 p f 1 / a n 1 p f 2 / a n 2 p f 3 / a n 3 p f 4 / a n 4 p f 5 / a n 5 p f 6 / a n 6 p f 7 / a n 7 a v d d a v r e f a v s s p b 3 / p p o 3 p b 2 / p p o 2 p b 1 / p p o 1 p b 0 / p p o 0 p c 7 p c 6 p c 5 p c 4 p c 3 p c 2 p c 1 p c 0 p d 7 p d 6 p d 5 p d 4 p d 3 p d 2 p d 1 p d 0 p i 7 p i 6 p i 5 p b 6 / p p o 6 p b 7 / p p o 7 p a 0 / p p o 8 p a 1 / p p o 9 p a 2 / p p o 1 0 p a 3 / p r o u t p a 4 / a t f s 1 p a 5 / a t f s 3 p a 6 / a r e a p a 7 / a t f s 2 n c v d d v s s n m i p e 0 / i n t 0 p e 1 / e c / i n t 2 p e 2 / p w m 0 p e 3 / p w m 1 p e 4 / p w m 2 p e 5 / p w m 3 p j 2 p j 1 p j 0 m p r s t v s s x t a l e x t a l p h 7 p h 6 p h 5 p h 4 p h 3 / c s 1 / i n t 1 p h 2 / s i 1 p h 1 / s o 1 p j 7 p j 6 p j 5 p j 4 p j 3 p i 4 p i 3 p i 2 p i 1 p i 0 p h 0 / s c k 1 c s 0 s c k 0 s o 0 s i 0 p b 4 / p p o 4 p b 5 / p p o 5 2 3 4 5 6 7 8 9 1 0 1 1 1 2 1 3 1 4 1 5 1 6 1 7 1 8 1 9 2 0 2 1 2 2 2 3 2 4 2 5 1 2 6 2 7 2 8 2 9 3 0 3 3 5 0 4 0 3 9 3 8 3 7 3 6 3 5 3 4 3 1 3 2 4 1 4 2 4 3 4 4 4 5 4 6 4 7 4 8 4 9 5 1 5 2 5 3 5 4 5 5 5 6 5 7 5 8 5 9 6 0 7 0 6 9 6 8 6 7 6 3 6 4 6 5 6 6 6 1 6 2 7 1 7 2 7 3 7 4 7 5 7 6 7 7 7 8 7 9 8 0 8 1 8 2 8 3 8 4 8 8 8 7 8 6 8 5 8 9 9 0 1 0 0 9 9 9 8 9 7 9 6 9 5 9 4 9 1 9 2 9 3 2 3 4 5 6 7 8 9 1 0 1 1 1 2 1 3 1 4 1 1 5 1 6 1 7 1 8 1 9 2 0 2 1 2 2 2 3 2 4 2 5 2 6 2 7 2 8 a 1 5 a 1 2 a 7 / d 7 a 6 / d 6 a 5 / d 5 a 4 / d 4 a 3 / d 3 a 2 / d 2 a 1 / d 1 a 0 / d 0 r d w r s y n c g n d v d d a 1 4 a 1 3 a 8 a 9 a 1 1 h a l t a 1 0 e / p i / t m o n r s t c 1 c 2
? 6 cxp87500 eprom read timing (ta = ?0 to +75 c, v dd = 4.5 to 5.5v, v ss = 0v reference) products list address ? data input delay time address ? data hold time item symbol pin min. max. unit t acc t ih a0 to a15 d0 to d7 a0 to a15 d0 to d7 0 100 ns ns t a c c t i h 0 . 8 v d d 0 . 8 v d d 0 . 2 v d d 0 . 2 v d d i n p u t d a t a a d d r e s s d a t a a 0 t o a 1 5 d 0 t o d 7 products package rom capacity pull-up resistance for reset pin power on reset circuit input circuit format * 1 pg0 to pg7, pk1 pk0 mask optional item 100-pin plastic qfp/lqfp existent/non-existent existent/non-existent cmos schmitt/ttlschmitt buffer amplifier/normal input cxp87540 32kbytes 40kbytes piggyback/evaluator CXP87500-U01Q cxp87500-u01r 100-pin ceramic pqfp eprom 40kbytes existent existent ttl schmitt buffer amplifier cxp87532 * 1 on pk1/mclk pin and pg0/exi0 to pg7/rfg1 pin, the input circuit format of cmos schmitt or ttl schmitt can be selected to every pin. on pk0/rfdt pin, buffer amplifier or normal input circuit format can be selected.
? 7 cxp87500 p i n 1 i n d e x p i n 1 m a r k i n g l c c t y p e e p r o m p i n 1 m a r k i n g p i g g y b a c k m o d e p i g g y b a c k / e v a l u a t o r p r o d u c t e v a l u a t o r m o d e c p u p r o b e n o t e ) n o t e ) e v a l u a t o r c a p s h o u l d b e c o n n e c t e d t o c p u p r o b e . p i g g y b a c k m o d e / e v a l u a t o r m o d e c a n b e s w i t c h e d a s s h o w n b e l o w . e p r o m a d a p t o r p i n 1 m a r k i n g c p u p r o b e f o r l q f p p i n 1 i n d e x
? 8 cxp87500 package outline unit: mm s o n y c o d e e i a j c o d e j e d e c c o d e p a c k a g e s t r u c t u r e p a c k a g e m a t e r i a l l e a d t r e a t m e n t l e a d m a t e r i a l p a c k a g e w e i g h t c e r a m i c g o l d p l a t i n g 4 2 a l l o y 1 0 . 4 4 m a x 0 . 5 0 0 . 2 5 0 . 1 5 0 . 0 2 + 0 . 0 5 3 . 5 7 0 . 3 6 1 8 . 7 1 6 . 3 0 . 2 1 0 0 8 1 3 1 5 0 8 0 5 1 1 3 0 9 . 4 8 1 1 . 6 6 1 5 . 5 8 0 . 2 2 4 . 7 2 2 . 3 0 . 2 5 6 . 0 4 . 5 0 . 3 1 . 2 7 0 . 1 3 1 2 . 0 2 1 4 . 2 2 1 8 . 1 2 0 . 2 p i n n o . 1 i n d e x i n d e x p q f p - 1 0 0 c - l 0 1 a q f p 1 0 0 - c - 0 0 0 0 - a 1 0 0 p i n p q f p ( c e r a m i c ) 8 1 8 0 5 1 1 3 0 1 0 0 5 0 3 1 0 . 3 0 . 0 8 0 . 6 5 0 . 0 5 p i n n o . 1 i n d e x 0 . 7 1 . 0 1 . 3 0 . 3 0 . 4 5 5 . 7 g s o n y c o d e e i a j c o d e j e d e c c o d e p a c k a g e s t r u c t u r e p a c k a g e m a t e r i a l l e a d t r e a t m e n t l e a d m a t e r i a l p a c k a g e w e i g h t c e r a m i c g o l d p l a t i n g 4 2 a l l o y 2 . 2 g p q f p - 1 0 0 c - l 0 2 a q f p 1 0 0 - c - 1 4 1 4 - a 1 0 0 p i n p q f p ( c e r a m i c ) 1 6 . 0 0 . 4 1 4 . 0 0 . 2 1 2 . 8 0 . 2 2 5 1 5 1 7 5 5 0 2 6 7 6 1 0 0 i n d e x 0 . 1 8 0 . 0 3 + 0 . 0 8 0 . 5 0 . 0 5 1 2 . 0 0 . 1 5 1 . 5 3 . 2 0 . 2 0 . 2 0 . 1 3 + 0 . 1 5 0 . 1 2 7 0 . 0 2 + 0 . 0 5 3 . 3 2 6 . 9 0 . 1 8 0 . 0 3 + 0 . 0 8 0 . 5 0 . 0 5 1 2 . 0 0 . 1 5 1 2 . 4 i n d e x 0 . 8 0 . 2
|
