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seiko instruments inc. 1 cmos 2-wire serial eeprom s-24c01b/02b/04b the s-24c01b/02b/04b are series of 2-wire, low power 1k/2k/4k-bit eeproms with a wide operating range. they are organized as 128- word 8-bit, 256-word 8-bit, and 512-word 8-bit, respectively. each is capable of page write, and sequential read. ? pin assignment name pin number function dip, sop msop nc 18 no connection* nc 27 no connection* nc 36 no connection* gnd 45 ground sda 54 serial data input/output scl 63 serial clock input wp 7 2 write protection pin connected to vcc: protection valid connected to gnd: protection invalid v cc 81 power supply ? pin functions ? endurance: 10 6 cycles/word ? data retention: 10 years ? write protection: s-24c01b : 100% s-24c02b/04b : 50% ? s-24c01b: 1 kbits ? s-24c02b: 2 kbits ? s-24c04b: 4 kbits ? features ? low power consumption standby: 1.0 m a max. (v cc =5.5 v) operating: 0.8 ma max. (v cc =5.5 v) 0.3 ma max. (v cc =3.3 v) ? wide operating voltage range 2.0 to 5.5 v ? page write 8 bytes (s-24c01b, s-24c02b) 16 bytes (s-24c04b) ? sequential read capable ? 400khz (v cc =5v 10%) s-24c01bmfn s-24c02bmfn s-24c04bmfn 8pin msop top view 1 2 3 4 8 7 6 5 v cc wp scl sda nc nc nc gnd 8-pin dip top view v cc gnd wp scl nc nc sda nc 1 2 3 4 5 6 7 8 s-24c01bdp-1a s-24c02bdp-1a s-24c04bdp-1a nc nc 8-pin sop top view v cc scl sda nc gnd 6 5 8 7 3 4 1 2 wp s-24c01bfj s-24c02bfj s-24c04bfj figure 1 table 1 * these pins can be connected to either vcc or gnd. rev. 2.2
cmos 2-wire serial eeprom s-24c01b/02b/04b seiko instruments inc. 2 ? ? block diagram ? ? absolute maximum ratings parameter symbol ratings unit power supply voltage v cc -0.3 to +7.0 v input voltage v in -0.3 to v cc +0.3 v output voltage v out -0.3 to v cc v storage temperature under bias t bias -50 to +95 c storage temperature t stg -65 to +150 c fi g ure 2 v cc gn serial clock controller device address comparator address counter y decoder data output ack output controller hi g h-volta g e generator start/stop detector data re g ister eeprom x decoder selector scl sda d in d out r / w load in comp load wp table 2
cmos 2-wire serial eeprom s-24c0 1b/02b/04b seiko instruments inc. 3 ? ? recommended operating conditions table 3 parameter symbol conditions min. typ. max. unit power supply voltage vcc read operation 2.0 -- 5.5 v high level input voltage v ih v cc =2.5 to 5.5v v cc =2.0 to 2.5v 0.7 v cc 0.8 v cc -- -- v cc v cc v v low level input voltage v il v cc =2.5 to 5.5v v cc =2.0 to 2.5v 0.0 0.0 -- -- 0.3 v cc 0.2 v cc v v operating temperature t opr -- -40 -- +85 c ? ? pin capacitance table 4 (ta=25 c, f=1.0 mhz, v cc =5 v) parameter symbol conditions min. typ. max. unit input capacitance c in v in =0 v (scl, wp) -- -- 10 pf input/output capacitance c i / o v i / o =0 v (sda) -- -- 10 pf ? endurance table 5 parameter symbol min. typ. max. unit endurance n w 10 6 -- -- cycles/word
cmos 2-wire serial eeprom s-24c01b/02b/04b seiko instruments inc. 4 ? ? dc electrical characteristics table 6 parameter symbol conditions vcc=4.5 to 5.5 v v cc =2.5 to 4.5 v v cc =2.0 to 2.5 v unit min. typ. max. min. typ. max. min. typ. max. current consumption (read) i cc1 f=100 khz -- -- 0.8* -- -- 0.3 -- -- 0.2 ma current consumption (program) i cc2 f=100 khz -- -- 4.0 -- -- 1.5 -- -- 1.5 ma * f = 400khz table 7 parameter symbol conditions v cc =4.5 v to 5.5 v v cc =2.5 to 4.5 v v cc =2.0 to 2.5 v unit min. typ. max. min. typ. max. min. typ. max. standby current consumption i sb v in =v cc or gnd -- -- 1.0 -- -- 0.6 -- -- 0.4 a input leakage current i li v in =gnd to v cc -- 0.1 1.0 -- 0.1 1.0 -- 0.1 1.0 a output leakage current i lo v out =gnd to v cc -- 0.1 1.0 -- 0.1 1.0 -- 0.1 1.0 a low level output voltage v ol i ol =3.2 ma -- -- 0.4 -- -- 0.4 -- -- -- v i ol =1.5 ma -- -- 0.3 -- -- 0.3 -- -- 0.5 v current address retention voltage v ah -- 1.5 -- 5.5 1.5 -- 4.5 1.5 -- 2.5 v
cmos 2-wire serial eeprom s-24c0 1b/02b/04b seiko instruments inc. 5 ? ? ac electrical characteristics table 9 parameter symbol v cc =4.5v to 5.5v v cc =2.0v to 4.5v unit min. typ. max. min. typ. max. scl clock frequency f scl 0 -- 400 0 -- 100 khz scl clock time l t low 1.0 -- -- 4.7 -- -- m s scl clock time h t high 0.9 -- -- 4.0 -- -- m s sda output delay time t aa 0.1 -- 0.9 0.1 -- 3.5 m s sda output hold time t dh 50 -- -- 100 -- -- ns start condition setup time t su.sta 0.6 -- -- 4.7 -- -- m s start condition hold time t hd.sta 0.6 -- -- 4.0 -- -- m s data input setup time t su.dat 100 -- -- 200 -- -- ns data input hold time t hd.dat 0 -- -- 0 -- -- ns stop condition setup time t su.sto 0.6 -- -- 4.7 -- -- m s scl sda rising time t r -- -- 0.3 -- -- 1.0 m s scl sda falling time t f -- -- 0.3 -- -- 0.3 m s bus release time t buf 1.3 -- -- 4.7 -- -- m s noise suppression time t i -- -- 50 -- -- 100 ns input pulse voltage 0.1 v cc to 0.9 v cc input pulse rising/falling time 20 ns output judgment voltage 0.5 v cc output load 100 pf+ pullup resistance 1.0 k w ? table 8 measurement conditions v cc r=1.0k sda c=100pf fi g ure 3 output load circuit figure 4 bus timing scl sda in sda out t buf t r t su.sto t su.dat t hd.dat t dh t aa t high t low t hd.sta t su.sta t f
cmos 2-wire serial eeprom s-24c01b/02b/04b seiko instruments inc. 6 table 10 item symbol min. typ. max. unit write time t wr -- 4.0 10.0 ms ? ? pin functions 1. sda (serial data input/output) pin the sda pin is used for bilateral transmission of serial data. it consists of a signal input pin and an nch open-drain transistor output pin. usually pull up the sda line via resistance to the v cc , and use it with other open-drain or open-collector output devices connected in a wired or configuration. 2. scl (serial clock input) pin the scl pin is used for serial clock input. it is capable of processing signals at the rising and falling edges of the scl clock input signal. make sure the rising time and falling time conform to the specifications. 3. wp pin the wp pin is used for write protection. when there is no need for write protection, connect the pin to the gnd; when there is a need for write protection, connect the pin to the vcc. please refer application note s-24c series eeproms tips, tricks & traps for equivalent circuit of each pin. figure 5 write cycle scl sda d0 write data acknowledge stop condition start condition t wr
cmos 2-wire serial eeprom s-24c0 1b/02b/04b seiko instruments inc. 7 ? operation 1. start condition when the scl line is h the sda line changes from h to l. this allows the device to go to the start condition. all operations begin from the start condition. 2. stop condition when the scl line is h the sda line changes from l to h. this allows the device to go to the stop condition. when the device receives the stop condition signal during a read sequence, the read operation is interrupted, and the device goes to standby mode. when the device receives the stop condition signal during write sequence, the retrieval of write data is halted, and the eeprom initiates rewrite. 3. data transmission changing the sda line while the scl line is l allows the data to be transmitted. a start or stop condition is recognized when the sda line changes while the scl line is h. figure 6 start/stop conditions t su.sta t hd.sta t su.sto start condition stop condition scl sda figure 7 data transmission timing t su.dat t hd.dat scl sda
cmos 2-wire serial eeprom s-24c01b/02b/04b seiko instruments inc. 8 4. acknowledgment the unit of data transmission is 8 bits. by turning the sda line l the slave device mounted on the system bus which receives the data during the 9th clock cycle outputs the acknowledgment signal verifying the data reception. when the eeprom is rewriting, the device does not output the acknowledgment signal. 5. device addressing to perform data communications, the master device mounted on the system outputs the start condition signal to the slave device. next, the master device outputs 7-bit length device address and a 1-bit length read/write instruction code onto the sda bus. upper 4 bits of the device address are called the device code, and set to 1010. successive 3 bits are dont care bits. when the comparison results match, the slave device outputs the acknowledgment signal during the 9th clock cycle. in the s-24c04a, 7th bit becomes p0. p0 is a page address bit and is equivalent to an additional uppermost bit of the word address. accordingly, when p0=0, the former half area corresponding to 2 kbits (addresses from 000h to 0ffh) in the entire memory are selected; when p0=1, the latter half area corresponding to 2 kbits (addresses from 100h to 1ffh) in all areas of the memory are selected. figure 8 acknowledgment output timing 1 8 9 acknow- ledgment output t aa t dh start condition scl (eeprom sda (master output) sda (eeprom output) figure 9 device address dont care 1 0 1 0 x x x r/w device code s-24c01b s-24c02b msb lsb lsb 1 0 1 0 x x x r/w 1 0 1 0 x x p0 r/w s-24c04b msb device code dont care page address
cmos 2-wire serial eeprom s-24c0 1b/02b/04b seiko instruments inc. 9 6. write 6.1 byte write when the eeprom receives a 7-bit length device address and a 1-bit read/write instruction code 0, following the start condition signal, it outputs the acknowledgment signal. next, when the eeprom receives an 8-bit length word address, it outputs the acknowledgment signal. after the eeprom receives 8-bit write data and outputs the acknowledgment signal, it receives the stop condition signal. next, the eeprom at the specified memory address starts to rewrite. when the eeprom is rewriting, all operations are prohibited and the acknowledgment signal is not output. 6.2 page write up to 8 bytes per page can be written in the s-24c01b and s-24c02b. up to 16 bytes per page can be written in the s-24c04b. basic data transmission procedures are the same as those in the byte write. however, when the eeprom receives 8-bit write data which corresponds to the page size, the page can be written. when the eeprom receives a 7-bit length device address and a 1-bit read/write instruction code 0, following the start condition signal, it outputs the acknowledgment signal. when the eeprom receives an 8-bit length word address, it outputs the acknowledgment signal. after the eeprom receives 8-bit write data and outputs the acknowledgment signal, it receives 8-bit write data corresponding to the next word address, and outputs the acknowledgment signal. the eeprom repeats reception of 8-bit write data and output of the acknowledgment signal in succession. it is capable of receiving write data corresponding to the maximum page size. when the eeprom receives the stop condition signal, it starts to rewrite, corresponding to the size of the page, on which write data, starting from the specified memory address, is received. figure 10 byte write s t a r t 1 0 1 0 w r i t e s t o p device address word address data r / w m s b sda line adr inc (address increment) x x p0 w7 w6 w5 w4 w3 w2 w1 w0 d7 d6 d5 d4 d3 d2 d1 d0 a c k l s b a c k a c k 0 w7 is optional in the s-24c01b. p0 is dont care in the s-24c01b/02b.
cmos 2-wire serial eeprom s-24c01b/02b/04b seiko instruments inc. 10 in the s-24c01b or s-24c02b, the lower 3 bits of the word address are automatically incremented each when the eeprom receives 8-bit write data. even if the write data exceeds 8 bytes, the upper 5 bits at the word address remain unchanged, the lower 3 bits are rolled over and overwritten. in the s-24c04b, the lower 4 bits at the word address are automatically incremented each when the eeprom receives 8 bit write data. even when the write data exceeds 16 bytes, the upper 4 bits of the word address and page address p0 remain unchanged, and the lower 4 bits are rolled over and overwritten. 6.3 acknowledgment polling acknowledgment polling is used to know when the rewriting of the eeprom is finished. after the eeprom receives the stop condition signal and once it starts to rewrite, all operations are prohibited. also, the eeprom cannot respond to the signal transmitted by the master device. accordingly, the master device transmits the start condition signal and the device address read/write instruction code to the eeprom (namely, the slave device) to detect the response of the slave device. this allows users to know when the rewriting of the eeprom is finished. that is, if the slave device does not output the acknowledgment signal, it means that the eeprom is rewriting; when the slave device outputs the acknowledgment signal, you can know that rewriting has been completed. it is recommended to use read instruction 1 for the read/write instruction code transmitted by the master device. 6.4 write protection the s-24c01b/02b/04b are capable of protecting the memory. when the wp pin is connected to v cc , writing to all memory area is prohibite in the s-24c01b, writing to 50% of the latter half of memory area is prohibited in the s-24c02b and s-24c04b. (prohibited adress are 080h to 0ffh in the s-24c02b; 100h to 1ffh in the s-24c04b) even when writing is prohibited, since the controller inside the ic is operating, the response to the signal transmitted by the master device is not available during the time of writing (t wr ). when the wp pin is connected to gnd, the write protection becomes invalid, and writing in all memory area becomes available. however, when there is no need for using write protection, always connect the wp pin to gnd. figure 11 page write s t a r t 1 0 1 0 w r i t e s t o p device addres word address (n) data (n) r / w m s b sda line adr inc x x p0 w7 w6 w5 w4 w3 w2 w1 w0 d7 d6 d5 d4 d3 d2 d1 d0 a c k l s b a c k a c k 0 d7 d0 d7 d0 adr inc a c k adr inc a c k data (n+1) data (n+x) w7 is optional in the s-24c01b. p0 is dont care in the s-24c01b/02b.
cmos 2-wire serial eeprom s-24c0 1b/02b/04b seiko instruments inc. 11 7. read 7.1 current address read the eeprom is capable of storing the last accessed memory address during both writing and reading. the memory address is stored as long as the power voltage is more than the retention voltage v ah . accordingly, when the master device recognizes the position of the address pointer inside the eeprom, data can be read from the memory address of the current address pointer without assigning a word address. this is called current address read. current address read is explained for when the address counter inside the eeprom is an n address. when the eeprom receives a 7-bit length device address and a 1-bit read/write instruction code 1, following the start condition signal, it outputs the acknowledgment signal. however, in the s-24c04b, page address p0 becomes invalid, and the memory address of the current address pointer becomes valid. next, 8-bit length data at an n address is output from the eeprom, in synchronization with the scl clock. the address counter is incremented at the falling edge of the scl clock by which the 8th bit of data is output, and the address counter goes to address n+1. the master device does not output the acknowledgment signal and transmits the stop condition signal to finish reading. for recognition of the address pointer inside the eeprom, take into consideration the following: the memory address counter inside the eeprom is automatically incremented for every falling edge of the scl clock by which the 8th bit of data is output during the time of reading. during the time of writing, upper bits of the memory address (upper 5 bits of the word address in the s-24c01b and s-24c02b; upper 4 bits of the word address and page address p0 in the s-24c04b) are left unchanged and are not incremented. figure 12 current address read s t a r t 1 0 1 0 r e a d s t o p device addres r / w m s b sda line adr inc x x p0 d7 d6 d5 d4 d3 d2 d1 d0 a c k l s b 1 data no ack from master device (p0 is dont care in the s-24c01b/02b)
cmos 2-wire serial eeprom s-24c01b/02b/04b seiko instruments inc. 12 7.2 random read random read is a mode used when the data is read from arbitrary memory addresses. to load a memory address into the address counter inside the eeprom, first perform a dummy write according to the following procedures: when the eeprom receives a 7-bit length device address and a 1-bit read/write instruction code 0, following the start condition signal, it outputs the acknowledgment signal. next, the eeprom receives an 8-bit length word address and outputs the acknowledgment signal. last, the memory address is loaded into the address counter of the eeprom. the eeprom receives the write data during byte or page writing. however, data reception is not performed during dummy write. the memory address is loaded into the memory address counter inside the eeprom during dummy write. after that, the master device can read the data starting from the arbitrary memory address by transmitting a new start condition signal and performing the same operation as that in the current read. that is, when the eeprom receives a 7-bit length device address and a 1-bit read/write instruction code 1, following the start condition signal, it outputs the acknowledgment signal. next, 8-bit length data is output from the eeprom, in synchronization with the scl clock. the master device does not output an acknowledgment signal and transmits the stop condition signal to finish reading. figure 13 random read s t a r t 1 0 1 0 w r i t e s t o p device addres word address (n) r / w m s b sda line x x p0 w7 w6 w5 w4 w3 w2 w1 w0 a c k l s b a c k a c k 0 1 0 1 0 x x p0 1 d7 d6 d5 d4 d3 d2 d1 d0 data (n) dummy write device addres r e a d no ack from master device adr s t a r t w7 is optional in the s-24c01b. p0 is dont care in the s-24c01b/02b.
cmos 2-wire serial eeprom s-24c0 1b/02b/04b seiko instruments inc. 13 7.3 sequential read when the eeprom receives a 7-bit length device address and a 1-bit read/write instruction code 1 in both current and random read operations, following the start condition signal, it outputs the acknowledgment signal. when 8-bit length data is output from the eeprom, in synchronization with the scl clock, the memory address counter inside the eeprom is automatically incremented at the falling edge of the scl clock, by which the 8th data is output. when the master device transmits the acknowledgment signal, the next memory address data is output. when the master device transmits the acknowledgment signal, the memory address counter inside the eeprom is incremented and read data in succession. this is called sequential read. when the master device does not output an acknowledgement signal and transmits the stop condition signal, the read operation is finished. data can be read in the sequential read mode in succession. when the memory address counter reaches the last word address, it rolls over to the first memory address. figure 14 sequential read r e a d s t o p device addres r / w adr inc d7 d0 a c k a c k a c k 1 d7 d0 adr inc a c k adr inc sda line data (n) d7 d0 d7 d0 data (n+1) data (n+2) data (n+x) no ack from master device adr inc
cmos 2-wire serial eeprom s-24c01b/02b/04b seiko instruments inc. 14 8. address increment timing the address increment timing is as follows. see figures 15 and 16. during reading operation, the memory address counter is automatically incremented at the falling edge of the scl clock (the 8th read data is output). during writing operation, the memory address counter is also automatically incremented at the falling edge of the scl clock when the 8th bit write data is fetched. figure 15 address increment timing during reading scl sda r / w=1 address increment 891 89 d7 output d0 output ack output figure 16 address increment timing during writing scl sda r / w=0 891 89 d7 input d0 input ack output ack output address increment purchase of i 2 c components of seiko instruments inc. conveys a license under the philips i 2 c patent rights to use these components in an i 2 c system, provided that the system conforms to the i 2 c standard specification as defined by philips. please note that any product or system incorporating this ic may infringe upon the philips i 2 c bus patent rights depending upon its configuration. in the event that such product or system incorporating the i 2 c bus infringes upon the philips patent rights, seiko instruments inc. shall not bear any responsibility for any matters with regard to and arisin g from such patent infrin g ement.
cmos 2-wire serial eeprom s-24c0 1b/02b/04b seiko instruments inc. 15 ? ordering information s-24c0xb yy - zz - w p code (distincion for package process) none f s 1a taping specification none (for dip) tb package code dp : dip fj : sop mfn : msop product name s-24c01b : 1k bits s-24c02b : 2k bits s-24c04b : 4k bits product name package code taping specification p code package/tape/reel drawings none dp008-a -f dp008-e s-24c01b dp none -s dp008-a dp008-e s-24c02b -1a dp008-c s-24c04b none fj008-d fj -tb -f fj008-e -s fj008-d fj008-e mfn -tb none fn008-a note 1) package dimensions of sops whose package codes are fj and dfj are the same in the range of deviation. 2) please contact an sii local office or a local representative for details.
cmos 2-wire serial eeprom s-24c01b/02b/04b seiko instruments inc. 16 ? characteristics 1. dc characteristics 1.1 current consumption (read) i cc1 -- ambient temperature ta 1.2 current consumption (read) i cc1 -- ambient temperature ta 1.3 current consumption (read) i cc1 -- ambient temperature ta 1.4 current consumption (read) i cc1 -- power supply voltage v cc 1.5 current consumption (read) i cc1 -- power supply voltage v cc 1.6 current consumption (read) i cc1 -- clock frequency fscl 1.7 current consumption (program) i cc2 -- ambient temperature ta 1.8 current consumption (program) i cc2 -- ambient temperature ta ta ( c) 200 100 v cc =5.5 v fscl=100 khz data=0101 0 -40 0 85 icc1 ( m a) ta ( c) 200 100 v cc =3.3 v fscl=100 khz data=0101 0 -40 0 85 icc1 ( m a) ta ( c) 40 20 v cc =1.8 v fscl=100 khz data=0101 0 -40 0 85 icc1 ( m a) 100 50 0 234 56 7 ta=25 c fscl=100 khz data=0101 v cc (v) icc1 ( m a) 200 100 0 23456 7 ta=25 c fscl=400 khz data=0101 v cc (v) 200 100 0 icc1 ( m a) v cc =5.0 v ta=25 c 100k 200k fscl(hz) icc1 ( m a) 300k 400k ta ( c) 1.0 0.5 v cc =5.5 v 0 -40 0 85 icc2 (ma) ta ( c) 1.0 0.5 v cc =3.3 v 0 -40 0 85 icc2 (ma)
cmos 2-wire serial eeprom s-24c0 1b/02b/04b seiko instruments inc. 17 1.10 current consumption (program) i cc2 -- power supply voltage v cc 1.11 standby current consumption i sb -- ambient temperature ta 1.12 input leakage current i li -- ambient temperature ta 1.13 input leakage current i li -- ambient temperature ta 1.14 output leakage current i lo -- ambient temperature ta 1.15 output leakage current i lo -- ambient temperature ta 1.9 current consumption (program) i cc2 -- ambient temperature ta ta ( c) 1.0 0.5 v cc =2.5 v 0 -40 0 85 icc2 (ma) 1.0 0.5 0 23456 7 ta=25 c v cc (v) v cc (v) icc2 (ma) 10 -6 10 -7 10 -8 10 -9 10 -10 v cc =5.5 v 10 -11 ta ( c) -40 0 85 ta ( c) 1.0 0.5 v cc =5.5 v sda, scl, wp=0v 0 -40 0 85 ili ( m a) isb (a) ta ( c) 1.0 0.5 v cc =5.5 v sda=0v 0 -40 0 85 ilo ( m a) ta ( c) 1.0 0.5 0 -40 0 85 v cc =5.5 v sda,scl,wp=5.5v ili ( m a) ta ( c) 1.0 0.5 v cc =5.5 v sda=5.5 v 0 -40 0 85 ilo ( m a) 1.16 low level output voltage v ol -- low level output current i ol 0.2 0.1 0 12345 6 v cc =3.3 v v cc =5 v ta=25 c vol (v)
cmos 2-wire serial eeprom s-24c01b/02b/04b seiko instruments inc. 18 1.21 high input inversion voltage vih -- power supply voltagev cc 1.17 low level output voltage v ol -- ambient temperature ta 1.18 low level output voltage v ol -- ambient temperature ta 1.19 low level output current i ol -- ambient temperature ta 1.20 low level output current i ol -- ambient temperature ta 1.22 high input inversion voltage vih -- ambient temperature ta 1.23 low input inversion voltage vil -- power supply voltagev cc 1.24 low input inversion voltage vil -- ambient temperature ta ta ( c) 0.3 0.2 v cc =4.5 v i ol =3.2 ma -40 0 85 vol (v) 0.1 ta ( c) 0.3 0.2 v cc =1.8 v i ol =100 m a -40 0 85 vol (v) 0.1 ta ( c) 20 10 v cc =4.5 v v ol =0.45 v 0 -40 0 85 iol (ma) ta ( c) 2.0 1.0 v cc =1.8 v v ol =0.1 v 0 -40 0 85 iol (ma) ta=25 c sda, scl, wp 1.0 0 2.0 3.0 vih (v) 1234567 v cc (v) v cc =5.0 v sda, scl, wp 1.0 0 2.0 3.0 vih (v) ta ( c) -40 085 ta=25 c sda, scl, wp 1.0 0 2.0 3.0 vil (v) 1234567 v cc (v) 1.0 0 2.0 3.0 vil (v) ta ( c) -40 085 ta=5.0v sda, scl, wp
cmos 2-wire serial eeprom s-24c0 1b/02b/04b seiko instruments inc. 19 2. ac characteristics 2.1 maximum operating frequency fmax -- power supply voltage v cc 2.2 write time t wr -- power supply voltage v cc 2.3 write time t wr -- ambient temperature ta 2.4 write time t wr -- ambient temperature ta 2.5 sda output delay time t aa -- ambient temperature ta 2.6 sda output delay time t aa -- ambient temperature ta 2.7 data output delay time t aa -- ambient temperature ta 10k 23 4 5 ta=25 c v cc (v) fmax (hz) 1 4 2 23456 7 ta=25 c v cc (v) twr (ms) 1 100k 1m 1 3 ta ( c) 6 4 v cc =4.5 v -40 0 85 2 twr (ms) ta ( c) 6 4 v cc =2.5 v -40 0 85 2 twr (ms) ta ( c) 1.5 1.0 v cc =4.5 v -40 0 85 0.5 taa ( m s) ta ( c) 1.5 1.0 v cc =2.7 v -40 0 85 0.5 taa ( m s) ta ( c) 3.0 2.0 v cc =1.8 v -40 0 85 1.0 taa ( m s)

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both 8-pin dip and 8-pin sop both type a and b markings 990603 24c01b 8-pin msop
the information described herein is subject to change without notice. seiko instruments inc. is not responsible for any problems caused by circuits or diagrams described herein whose related industrial properties, patents, or other rights belong to third parties. the application circuit examples explain typical applications of the products, and do not guarantee the success of any specific mass-production design. when the products described herein are regulated products subject to the wassenaar arrangement or other agreements, they may not be exported without authorization from the appropriate governmental authority. use of the information described herein for other purposes and/or reproduction or copying without the express permission of seiko instruments inc. is strictly prohibited. the products described herein cannot be used as part of any device or equipment affecting the human body, such as exercise equipment, medical equipment, security systems, gas equipment, or any apparatus installed in airplanes and other vehicles, without prior written permission of seiko instruments inc. although seiko instruments inc. exerts the greatest possible effort to ensure high quality and reliability, the failure or malfunction of semiconductor products may occur. the user of these products should therefore give thorough consideration to safety design, including redundancy, fire-prevention measures, and malfunction prevention, to prevent any accidents, fires, or community damage that may ensue.

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