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contents features.............................................................. 1 pin assignment ................................................... 1 block diagram..................................................... 2 instruction set ..................................................... 2 absolute maximum ratings................................. 2 recommended operating conditions ................. 3 dc electrical characteristics............................... 3 endurance........................................................... 3 pin capacitance .................................................. 3 ac electrical characteristics ............................... 4 operation ............................................................ 5 receiving a start-bit ........................................... 7 three-wire interface (di-do direct connection)... 7 dimensions (unit : mm)....................................... 8 ordering information ........................................... 8 charcteristics ...................................................... 9
seiko instruments inc. 1 the s-29430a is high speed, low power 8k-bit serial e 2 prom with a wide operating voltage range. it is organized as 512-word 16-bit. it is capable of sequential read, where addresses are automatically incremented in 16-bit blocks. the instruction code is compatible with the nm93c series. pin assignment cs chip select input sk serial clock input di serial data input do serial data output gnd ground (0 v) v cc power supply test test pin (normally kept open) (can be connected to gnd or vcc) cmos serial e 2 prom s-29430a features low power consumption standby : 1 m a max. operating : 1.2 ma max. (v cc =5.5 v) : 0.4 ma max. (v cc =2.5 v) wide operating voltage range write : 2.5 to 5.5 v read : 1.8 to 5.5 v sequential read capable endurance : 10 5 cycles/word data retention : 10 years cs sk 8-pin sop top view v cc do nc test sk di gnd cs 8-pin dip top view 1 2 3 4 5 6 7 8 v cc nc test gnd di do 6 5 8 7 3 4 1 2 fi g ure 1
cmos serial e 2 prom s-29430a 2 seiko instruments inc. block diagram instruction set table 1 instruction start bit ope code address data read (read data) 1 10 xa 8 to a 0 d 15 to d 0 * write (write data) 1 01 xa 8 to a 0 d 15 to d 0 erase (erase data) 1 11 xa 8 to a 0 ? ewen (program enable) 1 00 11xxxxxxxx ? ewds (program disable) 1 00 00xxxxxxxx ? x : doesnt matter. * : when 16-bit data of the specified address is output, the data of the next address is output. absolute maximum ratings table 2 parameter symbol ratings unit power supply voltage v cc -0.3 to +7.0 v input voltage v in -0.3 to v cc +0.3 v output voltage v out -0.3 to v cc v storage temperature under bias t bias -50 to +95 c storage temperature t stg -65 to +150 c fi g ure 2 memory array data register address decoder mode decode logic clock generator output buffer v cc gnd do di cs sk
cmos serial e 2 prom s-29430a seiko instruments inc. 3 recommended operating conditions table 3 parameter symbol conditions min. typ. max. unit power supply voltage v cc read operation write operation 1.8 2.5 ? ? 5.5 5.5 v v high level input voltage v ih v cc =2.5 to 5.5v v cc =1.8 to 2.5v 0.8 v cc 0.8 v cc ? ? v cc v cc v v low level input voltage v il v cc =2.5 to 5.5v v cc =1.8 to 2.5v 0.0 0.0 ? ? 0.2 v cc 0.15 v cc v v operating temperature t opr -40 ? +85 c dc electrical characteristics endurance table 6 parameter symbol min. typ. max. unit endurance n w 10 5 ?? cycles/word pin capacitance table 7 (ta=25 c, f=1.0 mhz, v cc =5 v) parameter symbol conditions min. typ. max. unit input capacitance c in v in =0 v ?? 8pf output capacitance c out v out =0 v ?? 10 pf v cc =5.0 v 10 % v cc =2.5 to 3.3 v v cc =1.8 to 2.5 v min. typ. max. min. typ. max. min. typ. max. current consumption (read) i cc1 do unloaded ?? 1.2 ?? 0.5 ?? 0.4 ma current consumption (program) i cc2 do unloaded ?? 5.0 ?? 2.0 ??? ma v cc =5.0 v 10 % v cc =2.5 to 4.5 v v cc =1.8 to 2.5 v min. typ. max. min. typ. max. min. typ. max. standby current consumption i sb input: v cc or gnd ?? 1.0 ?? 1.0 ?? 1.0 m a input leakage current i li v in =gnd to v cc ? 0.1 1.0 ? 0.1 1.0 ? 0.1 1.0 m a output leakage current i lo v out =gnd to v cc ? 0.1 1.0 ? 0.1 1.0 ? 0.1 1.0 m a cmos i ol =100 m a ?? 0.1 ?? 0.1 ?? 0.1 v ttl i ol =2.1 ma ?? 0.45 ?????? v cmos v cc =2.5 to 5.5 v : i oh =-100 m a v cc =1.8 to 2.5 v : i oh =-10 m a v cc - 0.7 ?? v cc - 0.7 ?? v cc - 0.3 ?? v ttl, i oh =-400 m a 2.4 ?? ? ?? ? ?? v write enable latch data hold voltage v dh 1.5 ?? 1.5 ?? 1.5 ?? v table 4 table 5 low level output voltage v ol high level output voltage v oh parameter symbol conditions unit parameter symbol conditions unit
cmos serial e 2 prom s-29430a 4 seiko instruments inc. ac electrical characteristics table 8 measuring conditions input pulse voltage 0.1 v cc to 0.9 v cc output reference voltage 0.5 v cc output load 100pf read/write operations read operation parameter symbol v cc =5.0 v 10 % v cc =2.5 to 4.5 v v cc =1.8 to 2.5 v unit min. typ. max. min. typ. max. min. typ. max. cs setup time t css 0.2 ?? 0.4 ?? 1.0 ?? m s cs hold time t csh 0.2 ?? 0.4 ?? 1.0 ?? m s cs setup time (cpu) t css (cpu) 0.2 ?? 0.4 ?? 1.0 ?? m s cs hold time (cpu) t csh (cpu) 0.2 ?? 0.4 ?? 1.0 ?? m s cs deselect time t cds 0.2 ?? 0.2 ?? 0.4 ?? m s data setup time t ds 0.2 ?? 0.4 ?? 0.8 ?? m s data hold time t dh 0.2 ?? 0.4 ?? 0.8 ?? m s 1 data output delay time t pd1 ?? 0.4 ?? 0.8 ?? 2.0 m s 0 data output delay time t pd0 ?? 0.4 ?? 0.8 ?? 2.0 m s clock frequency f sk 0.0 ? 2.0 0.0 ? 0.5 0.0 ? 0.2 mhz clock pulse width t skh , t skl 0.25 ?? 1.0 ?? 2.5 ?? m s output disable time t hz1 , t hz2 0 50 150 0 500 1000 ??? ns output enable time t sv 0 50 150 0 500 1000 ??? ns programming time t pr ? 4.0 10 ? 4.0 10 ??? ms table 9 fi g ure 3 timin g chart valid data valid data t skh t skl t csh t cds t pd0 t pd1 t css t ds di sk do cs t dh input data is retrieved on the rising edge of sk. output data is triggered on the rising edge of sk. t csh ( cpu ) t css ( cpu ) fi g ure 4 timin g chart for t css ( cpu ) and t csh ( cpu ) when cpu is connected sk cs
cmos serial e 2 prom s-29430a seiko instruments inc. 5 operation a 2 a 8 12 47 31 14 d 15 d 15 d 14 d 14 d 13 d 14 hi-z a 8 a 7 a 6 a 5 a 4 a 3 a 2 a 1 a 0 +1 d 13 d 0 d 1 d 2 d 15 0 hi-z a 3 a 4 a 5 a 6 a 7 x 0 1 1 30 29 28 27 26 11 10 9 8 7 6 5 4 3 2 1 46 45 44 43 42 a 8 a 7 a 6 a 5 a 4 a 3 a 2 a 1 a 0 +2 d 13 d 0 d 1 d 2 13 cs sk di do 16 15 a 1 a 0 x : optional figure 5 read timing instructions (in the order of start-bit, instruction, address, and data) are latched to di in synchronization with the rising edge of sk after cs goes high. a start-bit can only be recognized when the high of di is latched at the rising edge of sk after changing cs to high, it is impossible for it to be recognized as long as di is low, even if there are sk pulses after cs goes high. any sk pulses input while di is low before receiving a start-bit are called "dummy clocks." the number of clocks transmitted by the serial interface in a cpu and the number of clocks needed for operation of the serial memory ic can be adjusted by inserting several dummy clocks before a start-bit. instruction finishes when cs goes low, where it must be low between commands during t cds . all input, including di and sk signals, is ignored while cs is low. 1. read the read instruction reads data from a specified address. after a0 is latched at the rising edge of sk, do output changes from a high-impedance state (hi-z) to low level output. 16-bit data is continuously output in synchronization with the rise of sk. when all of the data (d 15 to d 0 ) in the specified address has been read, addresses are automatically incremented and the data in the next address can be read with the input of another sk clock. thus, the data over whole area of the memory can be read by continuously inputting sk clocks as long as cs is high. the last address (an a1 a0 = 1 11) rolls over to the top address (an a1 a0 = 0 00). 2. write (write, erase) there are two write instructions, write, erase. each automatically begins writing to the non-volatile memory when cs goes low at the completion of the specified clock input. the write operation is completed in 10 ms (t pr max.), and the typical write period is less than 5 ms. in the s-29430a series, it is easy to verify the completion of the write operation in order to minimize the write cycle by setting cs toh and checking the do pin after the write operation begins by setting cs to l. verify operations to detect changes in the do output can be executed in succession. one is a change from l to h with cs=h. the other is a change from l to h after setting cs to h and returning cs to l repeatedly. because all sk and di inputs are ignored during the write operation, any input of instruction will also be disregarded. when do outputs high after completion of the write operation or if it is in the high-impedence state (hi-z), the input of instructions is available. even if the do pin remains high, it will enter the high-impedence state upon the recognition of a high of di (start-bit) attached to the rising edge of an sk pulse.
cmos serial e 2 prom s-29430a 6 seiko instruments inc. 2.1 write this instruction writes 16-bit data to a specified address. after changing cs to high, input a start-bit, op-code (write), address, and 16-bit data. if there is a data overflow of more than 16 bits, only the last 16-bits of the data is considered valid. changing cs to low will start the write operation. it is not necessary to make the data "1" before initiating the write operation. 2.2 erase this command erases 16-bit data in a specified address. after changing cs to high, input a start-bit, op-code (erase), and address. it is not necessary to input data. changing cs to low will start the erase operation, which changes every bit of the 16 bit data to "1." 3. write enable (ewen) and write disable (ewds) the ewen instruction puts the s-29430a into write enable mode, which accepts write, erase instructions. the ewds instruction puts the s-29430a into write disable mode, which refuses write, erase instructions. the s-29430a powers on in write disable mode, which protects data against unexpected, erroneous write operations caused by noise and/or cpu malfunctions. it should be kept in write disable mode except when performing write operations. figure 6 write timing t cds t pr busy hi-z t sv verify hi-z cs do t hz1 5 6 7 8 9 10 111213 14 29 d0 ready a7 a6 a5 a4 a3 a2 a1 a0 d15 1 di 234 0 1 x a8 sk figure 7 erase timing t cds t pr busy hi-z t sv verify hi-z cs do t hz1 12 13 a0 ready a7 a6 a5 a4 a3 a2 a1 567891011 1 234 sk di 1 1 x a8 figure 8 ewen/ewds timing 8xs 11=ewen 00=ewds 13 cs 12 11 8 7 6 5 4 3 2 1 sk 10 9 0 di 0
cmos serial e 2 prom s-29430a seiko instruments inc. 7 receiving a start-bit three-wire interface (di-do direct connection) although the normal configuration of a serial interface is a 4-wire interface to cs, sk, di, and do, a 3-wire interface is also a possibility by connecting di and do. however, since there is a possibility that the do output from the serial memory ic will interfere with the data output from the cpu with a 3-wire interface, install a resistor between di and do in order to give preference to data output from the cpu to di (see figure 10). a start-bit can be recognized by latching the high level of di at the rising edge of sk after changing cs to high (start-bit recognition). the write operation begins by inputting the write instruction and setting cs to low. the do pin then outputs low during the write operation and high at its completion by setting cs to high (verify operation). therefore, only after a write operation, in order to accept the next command by having cs go high, the do pin is switched from a state of high-impedance to a state of data output; but if it recognizes a start-bit, the do pin returns to a state of high-impedance (see figure 9). make sure that data output from the cpu does not interfere with the data output from the serial memory ic when you configure a 3-wire interface by connecting di input pin and do output pin. such interference may cause a start- bit fetch problem. fi g ure 9 start bit latchin g timin g hi-z t hz2 sk di cs do figure 10 3-wire interface di sio do cpu s-29430a r : 10 ~ 100 k w
cmos serial e 2 prom s-29430a 8 seiko instruments inc. dimensions (unit : mm) 1. 8-pin dip 2. 8-pin sop ordering information figure 11 1.5 0.4 min. 5 8 4 1 6.5 9.3 (9.6 max. ) 3.1 min. 0.5 0.1 2.54 3.4 0.1 4.5 max. 0.3 + 0.1 - 0.05 7.62 0 ~ 15 1.0 figure 12 1.27 0 min. 0.4 0.1 1.5 0.1 1.7max. 0.15 + 0.1 - 0.05 0.4 4.4 4 5 8 1 5.2 (5.5 max.) 6.2 0.3 s-29430a xx package dp : dip fe : sop
cmos serial e 2 prom s-29430a seiko instruments inc. 9 characteristics 1. dc characteristics 85 ta ( c) 10k 100k f sk (hz) 1m 2m i cc1 (ma) 1.0 0.5 0 i cc1 (ma) 1.0 0.5 0 234567 v cc (v) ta=25 c f sk =1 mhz data=0101 v cc =5.0v ta=25 c -40 0 i cc1 (ma) 1.0 0.5 0 v cc =5.5v f sk =2 mhz data=0101 85 ta ( c) -40 0 i cc1 (ma) 1.0 0.5 0 v cc =3.3v f sk =1mhz data=0101 85 ta ( c) i sb (a) 10 - 6 10 - 10 i cc2 (ma) 4.0 2.0 0 234567 v cc (v) ta=25 c data 00000000 v cc =5.5v -40 0 i cc2 (ma) 4.0 2.0 0 v cc =5.5v data 00000000 85 ta ( c) -40 0 i cc2 (ma) 4.0 2.0 0 v cc =3.3v data 00000000 10 - 7 10 - 8 10 - 9 10 - 11 85 ta ( c) -40 0 1.1 current consumption (read) i cc1 - ambient temperature ta 1.2 current consumption (read) i cc1 - ambient temperature ta 1.3 current consumption (read) i cc1 - power supply voltage vcc 1.4 current consumption (read) i cc1 - clock frequency fsk 1.5 current consumption (program) i cc2 - ambient temperature ta 1.6 current consumption (program) i cc2 - ambient temperature ta 1.7 current consumption (program) i cc2 - power supply voltage v cc 1.8 standby current consumption i sb - ambient temperature ta
cmos serial e 2 prom s-29430a 10 seiko instruments inc. 85 ta ( c) i lo ( m a) 1.0 0.5 0 i lo ( m a) 1.0 0.5 0 -40 0 i li ( m a) 1.0 0.5 0 v cc =5.5v cs, sk, di, test=0v 85 ta ( c) -40 0 i li ( m a) 1.0 0.5 0 v cc =5.5v cs, sk, di, test=5.5v 85 ta ( c) -40 0 v cc =5.5v do=0v 85 ta ( c) -40 0 v cc =5.5v do=5.5v 85 ta ( c) -40 0 v oh (v) 4.4 4.2 v cc =4.5v i oh =-400 m a 4.6 85 ta ( c) -40 0 v oh (v) 2.5 v cc =2.7v i oh =-100 m a 2.7 85 ta ( c) -40 0 v ol (v) 0.2 0.1 v cc =4.5v i ol =2.1ma 0.3 85 ta ( c) -40 0 v ol (v) 0.02 0.01 v cc =1.8v i ol =100 m a 0.03 2.6 1.9 input leakage current i li - ambient temperature ta 1.10 input leakage current i li - ambient temperature ta 1.11 output leakage current i lo - ambient temperature ta 1.12 output leakage current i lo - ambient temperature ta 1.13 high level output voltage v oh - ambient temperature ta 1.14 high level output voltage v oh - ambient temperature ta 1.15 low level output voltage v ol - ambient temperature ta 1.16 low level output voltage v ol - ambient temperature ta
cmos serial e 2 prom s-29430a seiko instruments inc. 11 i oh (ma) -10.0 -5.0 0 85 ta ( c) -40 0 v cc =4.5v v oh =2.4v i oh (ma) -4 -2 0 85 ta ( c) -40 0 v cc =2.7v v oh =2.0v i ol (ma) 20 10 0 85 ta ( c) -40 0 v cc =4.5v v ol =0.45v i ol (ma) 1.0 0.5 0 85 ta ( c) -40 0 v cc =1.8v v ol =0.1v v inv (v) 3.0 1.5 0 1 v cc (v) ta=25 c cs, sk, di 234567 v inv (v) 3.0 2.0 0 85 -40 0 v cc =5.0v cs, sk, di ta ( c) 1.17 high level output current i oh - ambient temperature ta 1.18 high level output current i oh - ambient temperature ta 1.19 low level output current i ol - ambient temperature ta 1.20 low level output current i ol - ambient temperature ta 1.21 input inversion voltage v inv - power supply voltage v cc 1.22 input inversion voltage v inv - ambient temperature ta
cmos serial e 2 prom s-29430a 12 seiko instruments inc. 2. ac characteristics t pr (ms) 4 2 234567 v cc (v) ta=25 c 1 85 ta ( c) -40 0 t pr (ms) 4 2 v cc =5.0v 6 85 ta ( c) -40 0 t pr (ms) 4 2 v cc =3.0v 6 85 ta ( c) -40 0 t pd1 ( m s) 0.2 0.1 0.3 85 ta ( c) -40 0 t pd1 ( m s) 0.4 0.2 0.6 v cc =4.5v data0 ? 1 v cc =2.7v data0 ? 1 85 ta ( c) -40 0 t pd0 ( m s) 0.2 0.1 0.3 85 ta ( c) -40 0 t pd0 ( m s) 0.4 0.2 0.6 v cc =4.5v data1 ? 0 v cc =2.7v data1 ? 0 10k 100k 1m 2m 2345 1 ta=25 c f max (hz) v cc (v) 2.1 maximum operating frequency f max - power supply voltage v cc 2.2 program time t pr - power supply voltage v cc 2.3 program time t pr - ambient temperature ta 2.4 program time t pr - ambient temperature ta 2.5 1 data output delay time t pd1 - ambient temperature ta 2.6 1 data output delay time t pd1 - ambient temperature ta 2.7 0 data output delay time t pd0 - ambient temperature ta 2.8 0 data output delay time t pd0 - ambient temperature ta

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