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obsolete product rev 1.0 6/21/00 characteristics subject to change without notice. 1 of 15 www.xicor.com 4k x20c04 512 x 8 bit nonvolatile static ram features high reliability endurance: 1,000,000 nonvolatile store operations retention: 100 years minimum ? o wer-on recall eeprom data automatically recalled into sram upon power-up lock out inadvertent store operations ? ow power cmos standby: 250? in?ite eeprom array recall, and ram read and write cycles compatible with x2004 description the xicor x20c04 is a 512 x 8 novram featuring a static ram overlaid bit-for-bit with a nonvolatile electri- cally erasable prom (eeprom). the x20c04 is fabri- cated with advanced cmos ?ating gate technology to achieve low power and wide power-supply margin. the x20c04 features the jedec approved pinout for b yte-wide memories, compatible with industry stan- dard rams, roms, eproms, and eeproms. the novram design allows data to be easily transferred from ram to eeprom (store) and eeprom to ram (recall). the store operation is completed in 5ms or less and the recall operation is completed in 5? or less. xicor novrams are designed for unlimited write operations to ram, either from the host or recalls from eeprom, and a minimum 1,000,000 store operations to the eeprom. data retention is speci?d to be g reater than 100 years. block diagram v cc sense row select control logic column select & i/os eeprom array 512 x 8 sram array ce oe we ne a 3 ? 6 i/o 0 ?/o 7 a 0 ? 2 a 7 ? 8 recall store
obsolete product x20c04 characteristics subject to change without notice. 2 of 15 rev 1.0 6/21/00 www.xicor.com pin configuration ne nc a 7 a 6 a 5 a 4 a 3 a 2 a 1 a 0 i/o 0 i/o 1 i/o 2 v ss v cc we nc a 8 nc nc oe nc ce i/o 7 i/o 6 i/o 5 i/o 4 i/o 3 x20c04 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 1 2 3 4 5 6 7 8 9 a 6 nc i/o 0 a 8 nc nc nc oe nc ce i/o 7 i/o 6 nc 4 3 2 1 32 31 30 14 15 16 17 18 19 20 5 6 7 8 9 10 11 12 13 29 28 27 26 25 24 23 22 21 x20c04 (top view) lcc plcc we v cc nc ne nc a 7 a 5 a 4 a 3 a 2 a 1 a 0 i/o 5 i/o 3 nc i/o 2 i/o 1 v ss i/o 4 plastic cerdip pin names pin descriptions addresses (a 0 ? 8 ) the address inputs select an 8-bit memory location during a read or write operation. chip enable (ce ) the chip enable input must be low to enable all read/ write operations. when ce is high, power consump- tion is reduced. output enable (oe ) the output enable input controls the data output buff- ers and is used to initiate read and recall operations. output enable low disables a store operation regard- less of the state of ce , we , or ne . data in/data out (i/o 0 ?/o 7 ) data is written to or read from the x20c04 through the i/o pins. the i/o pins are placed in the high impedance state when either ce or oe is high or when ne is low. write enable (we ) the write enable input controls the writing of data to both the static ram and stores to the eeprom. nonvolatile enable (ne ) the nonvolatile enable input controls all accesses to the eeprom array (store and recall functions). device operation the ce , oe , we and ne inputs control the x20c04 operation. the x20c04 byte-wide novram uses a 2- line control architecture to eliminate bus contention in a system environment. the i/o bus will be in a high impedance state when either oe or ce is high, or when ne is low. symbol description a 0 ? 8 address inputs i/o 0 ?/o 7 data input/output we write enable ce chip enable oe output enable ne nonvolatile enable v cc +5v v ss ground nc no connect
obsolete product x20c04 characteristics subject to change without notice. 3 of 15 rev 1.0 6/21/00 www.xicor.com ram operations ram read and write operations are performed as they w ould be with any static ram. a read operation requires ce and oe to be low with we and ne high. a write operation requires ce and we to be low with ne high. there is no limit to the number of read or write operations performed to the ram portion of the x20c04. nonvolatile operations with ne low, recall operation is performed in the same manner as ram read operation. a recall opera- tion causes the entire contents of the eeprom to be written into the ram array. the time required for the operation to complete is 5? or less. a store operation causes the entire contents of the ram array to be stored in the nonvolatile eeprom. the time for the operation to complete is 5ms or less. power-up recall upon power-up (v cc ), the x20c04 performs an auto- matic array recall. when v cc minimum is reached, the recall is initiated, regardless of the state of ce , oe , we and ne . write protection the x20c04 has ?e write protect features that are employed to protect the contents of both the nonvola- tile memory and the ram. ? cc sense?ll functions are inhibited when v cc is 3.5v. ? ram write is required before a store cycle is initiated. ? r ite inhibit?olding either oe low, we high, ce high, or ne high during power-up and power- down will prevent an inadvertent store operation. noise protection? combined we , ne , oe and ce pulse of less than 20ns will not initiate a store cycle. noise protection? combined we , ne , oe and ce pulse of less than 20ns will not initiate a recall cycle. symbol table wa veform inputs outputs must be steady will be steady may change from low to high will change from low to high may change from high to low will change from high to low don? care: changes allowed changing: state not known n/a center line is high impedance
obsolete product x20c04 characteristics subject to change without notice. 4 of 15 rev 1.0 6/21/00 www.xicor.com absolute maximum ratings t emperature under bias ....................?5? to +135? storage temperature ........................?5? to +150? v oltage on any pin with respect to v ss ......................................... ?v to +7v d. c. output current ............................................. 10ma lead temperature (soldering, 10 seconds......... 300? comment stresses above those listed under ?bsolute maximum ratings may cause permanent damage to the device. this is a stress rating only; the functional operation of the device (at these or any other conditions above those indi- cated in the operational sections of this speci?ation) is not implied. exposure to absolute maximum rating condi- tions for extended periods may affect device reliability. recommended operating conditions temperature min. max. commercial 0? +70? industrial ?0? +85? military ?5? +125? supply voltage limits x20c04 5v ?0% d.c. operating characteristics (over recommended operating conditions unless otherwise speci?d.) power-up timing capacitance t a = +25?, f = 1mhz, v cc = 5v notes: (1) v il min. and v ih max. are for reference only and are not tested. (2) this parameter is periodically sampled and not 100% tested. symbol parameter limits test conditions min. max. unit l cc1 v cc current (active) 100 ma ne = we = v ih , ce = oe = v il , address inputs = 0.4v/2.4v levels@ f = 5mhz. all i/os = open i cc2 v cc current during store 10 ma all inputs = v ih , all i/os = open i sb1 v cc standby current (ttl input) 10 ma ce = v ih , all other inputs = v ih , all i/os = open i sb2 v cc standby current (cmos input) 250 ? all inputs = v cc ?0.3v, all i/os = open i li input leakage current 10 ? v in = v ss to v cc i lo output leakage current 10 ? v out = v ss to v cc , ce = v ih v il (1) input low voltage ? 0.8 v v ih (1) input high voltage 2 v cc + 0.5 v v ol output low voltage 0.4 v i ol = 2.1ma v oh output high voltage 2.4 v i oh = ?00? symbol parameter max. unit t pur (2) power-up to ram operation 100 ? t puw (2) power-up to nonvolatile operation 5 ms symbol test max. unit conditions c i/o (2) input/output capacitance 10 pf v i/o = 0v c in (2) input capacitance 6 pf v in = 0v
obsolete product x20c04 characteristics subject to change without notice. 5 of 15 rev 1.0 6/21/00 www.xicor.com endurance and data retention mode selection parameter min. unit endurance 100,000 data changes per bit store cycles 1,000,000 store cycles data retention 100 years ce we ne oe mode i/o power hx xx not selected output high z standby lh hl read ram output data active ll hh write ??ram input data high active ll hh write ??ram input data low active lh ll array recall output high z active lll h nonvolatile storing output high z active lh hh output disabled output high z active lll l not allowed output high z active l hlh no operation output high z active equivalent a.c. load circuit a.c. conditions of test 5v 1.92k ? 1.37k ? output 100pf input pulse levels 0v to 3v input rise and fall times 10ns input and output timing levels 1.5v
obsolete product x20c04 characteristics subject to change without notice. 6 of 15 rev 1.0 6/21/00 www.xicor.com a.c. characteristics (over the recommended operating conditions unless otherwise speci?d.) read cycle limits note: (3) t lz min., t hz , t olz min., and t ohz are periodically sampled and not 100% tested. t hz max. and t ohz max. are measured, with c l = 5pf from the point when ce or oe return high (whichever occurs ?st) to the time when the outputs are no longer driven. read cycle symbol parameter x20c04-15 x20c04-20 x20c04-25 x20c04 unit min. max. min. max. min. max. min. max. t rc read cycle time 150 200 250 300 ns t ce chip enable access time 150 200 250 300 ns t aa address access time 150 200 250 300 ns t oe output enable access time 50 70 100 150 ns t lz (3) chip enable to output in low z 0000ns t olz (3) output enable to output in low z 0000ns t hz (3) chip disable to output in high z 80 100 100 100 ns t ohz (3) output disable to output in high z 80 100 100 100 ns t oh output hold from address change 0000ns t ce t rc address ce oe we data valid data valid t lz t olz t oh t aa t hz t ohz data i/o t oe v ih
obsolete product x20c04 characteristics subject to change without notice. 7 of 15 rev 1.0 6/21/00 www.xicor.com write cycle limits note: (4)t wz , t ow , and t oz are periodically sampled and not 100% tested. we controlled write cycle symbol parameter x20c04-15 x20c04-20 x20c04-25 x20c04 unit min. max. min. max. min. max. min. max. t wc write cycle time 150 200 250 300 ns t cw chip enable to end of write input 150 200 250 300 ns t as address setup time 0 0 0 0 ns t wp write pulse width 100 120 150 200 ns t wr write recovery time 0 0 0 0 ns t dw data setup to end of write 100 120 150 200 ns t dh data hold time 0 0 0 0 ns t wz (4) write enable to output in high z 80 100 100 100 ns t ow (4) output active from end of write 5 5 5 5 ns t oz (4) output enable to output in high z 80 100 100 100 ns t wc t cw t as t oz t wp t dw t dh t ow t wr data valid address oe ce we data out data in
obsolete product x20c04 characteristics subject to change without notice. 8 of 15 rev 1.0 6/21/00 www.xicor.com ce controlled write cycle store cycle limits note: (5) x20c04 v cc min. = 4.5v the store pulse width (t sp ) is a minimum time that ne , we and ce m ust be low simultaneously. symbol parameter x20c04-15 x20c04-20 x20c04-25 x20c04 unit min. max. min. max. min. max. min. max. t stc store cycle time 5 5 5 5 ms t sp store pulse width 100 120 150 200 ns t nhz nonvolatile enable to output in high z 80 100 100 100 ns t oest output enable from end of store 10 10 10 10 ns t soe oe disable to store function 20 20 20 20 ns t ns ne setup time from we 0000ns t wc t cw t as t wp t dw t dh t wr data valid address oe ce we data out data in t wz t ow v ih
obsolete product x20c04 characteristics subject to change without notice. 9 of 15 rev 1.0 6/21/00 www.xicor.com store timing array recall cycle limits note: (6 ) the recall pulse width (t rcp ) is a minimum time that ne , oe and ce m ust be low simultaneously to insure data integrity, ne and ce . symbol parameter x20c04-15 x20c04-20 x20c04-25 x20c04 unit min. max. min. max. min. max. min. max. t rcc array recall cycle time 5 5 5 5 s t rcp (6) recall pulse width to initiate recall 0.1 1 0.12 1 0.15 1 0.2 1 s t rwe we setup time to ne 00 0 0ns oe we ce data i/o t stc t sp t oest t nhz t ns ne v cc v cc min. (5) t soe
obsolete product x20c04 characteristics subject to change without notice. 10 of 15 rev 1.0 6/21/00 www.xicor.com array recall cycle address ne oe we ce data i/o t rcc t rcp t rwe
obsolete product x20c04 characteristics subject to change without notice. 11 of 15 rev 1.0 6/21/00 www.xicor.com packaging information 0.620 (15.75) 0.590 (14.99) typ. 0.614 (15.60) 0.110 (2.79) 0.090 (2.29) typ. 0.100 (2.54) 0.023 (0.58) 0.014 (0.36) typ. 0.018 (0.46) 0.060 (1.52) 0.015 (0.38) pin 1 0.200 (5.08) 0.125 (3.18) 0.065 (1.65) 0.038 (0.97) typ. 0.055 (1.40) 0.610 (15.49) 0.500 (12.70) 0.100 (2.54) max. 0.015 (0.38) 0.008 (0.20) 0 15 28-lead hermetic, cerdip, package code d28 note: all dimensions in inches (in parentheses in millimeters) 1.490 (37.85) max. seating plane 0.005 (0.127) min. 0.232 (5.90) max. 0.150 (3.81) min.
obsolete product x20c04 characteristics subject to change without notice. 12 of 15 rev 1.0 6/21/00 www.xicor.com packaging information note: 1. all dimensions in inches (in parentheses in millimeters) 2. package dimensions exclude molding flash 0.022 (0.56) 0.014 (0.36) 0.160 (4.06) 0.120 (3.05) 0.625 (15.88) 0.590 (14.99) 0.110 (2.79) 0.090 (2.29) 1.470 (37.34) 1.400 (35.56) 1.300 (33.02) ref. pin 1 index 0.160 (4.06) 0.125 (3.17) 0.030 (0.76) 0.015 (0.38) pin 1 seating plane 0.065 (1.65) 0.040 (1.02) 0.557 (14.15) 0.510 (12.95) 0.085 (2.16) 0.040 (1.02) 0 15 28-lead plastic, pdip, package code p28 typ. 0.010 (0.25)
obsolete product x20c04 characteristics subject to change without notice. 13 of 15 rev 1.0 6/21/00 www.xicor.com packaging information 0.150 (3.81) bsc 0.458 (11.63) 0.458 (11.63) 0.442 (11.22) pin 1 0.020 (0.51) x 45? ref. 0.095 (2.41) 0.075 (1.91) 0.022 (0.56) 0.006 (0.15) 0.055 (1.39) 0.045 (1.14) typ. (4) plcs. 0.040 (1.02) x 45? ref. typ. (3) plcs. 0.050 (1.27) bsc 0.028 (0.71) 0.022 (0.56) (32) plcs. 0.200 (5.08) bsc 0.558 (14.17) 0.088 (2.24) 0.050 (1.27) 0.120 (3.05) 0.060 (1.52) pin 1 index corner 32-pad hermetic, lcc, package code e32 note: 1. all dimensions in inches (in parentheses in millimeters) 2. tolerance: ?% nlt ?.005 (0.127) 0.300 (7.62) bsc 0.015 (0.38) min. 0.400 (10.16) bsc 0.560 (14.22) 0.540 (13.71) dia. 0.015 (0.38) 0.003 (0.08)
obsolete product x20c04 characteristics subject to change without notice. 14 of 15 rev 1.0 6/21/00 www.xicor.com packaging information 0.021 (0.53) 0.013 (0.33) 0.420 (10.67) 0.050 (1.27) typ. typ. 0.017 (0.43) 0.045 (1.14) x 45 0.300 (7.62) ref. 0.453 (11.51) 0.447 (11.35) typ. 0.450 (11.43) 0.495 (12.57) 0.485 (12.32) typ. 0.490 (12.45) pin 1 0.400 (10.16) ref. 0.553 (14.05) 0.547 (13.89) typ. 0.550 (13.97) 0.595 (15.11) 0.585 (14.86) typ. 0.590 (14.99) 3 typ. 0.048 (1.22) 0.042 (1.07) 0.140 (3.56) 0.100 (2.45) typ. 0.136 (3.45) 0.095 (2.41) 0.060 (1.52) 0.015 (0.38) seating plane 0.004 lead co ?planarity 32-lead plastic, plcc, package code j32 notes: 1. all dimensions in inches (in parentheses in millimeters) 2. dimensions with no tolerance for reference only 0.510" typical 0.050" typical 0.050" typical 0.300" ref. foo tprint 0.400" 0.410" 0.030" typical 32 places
obsolete product x20c04 characteristics subject to change without notice. 15 of 15 rev 1.0 6/21/00 www.xicor.com ?icor, inc. 2001 patents pending limited warranty devices sold by xicor, inc. are covered by the warranty and patent indemni?ation provisions appearing in its terms of sale onl y. xicor, inc. makes no warranty, e xpress, statutory, implied, or by description regarding the information set forth herein or regarding the freedom of the descr ibed devices from patent infringement. xicor, inc. makes no warranty of merchantability or ?ness for any purpose. xicor, inc. reserves the right to discontinue produ ction and change speci?ations and prices at any time and without notice. xicor, inc. assumes no responsibility for the use of any circuitry other than circuitry embodied in a xicor, inc. product. no o ther circuits, patents, or licenses are implied. copyrights and trademarks xicor, inc., the xicor logo, e 2 pot, xdcp, xbga, autostore, direct write cell, concurrent read-write, pass, mps, pushpot, block lock, identiprom, e 2 key, x24c16, secureflash, and serialflash are all trademarks or registered trademarks of xicor, inc. all other brand and produc t names mentioned herein are used for identification purposes only, and are trademarks or registered trademarks of their respective holders. u .s. patents xicor products are covered by one or more of the following u.s. patents: 4,326,134; 4,393,481; 4,404,475; 4,450,402; 4,486,769; 4,488,060; 4,520,461; 4,533,846; 4,599,706; 4,617,652; 4,668,932; 4,752,912; 4,829,482; 4,874,967; 4,883,976; 4,980,859; 5,012,132; 5,003,197; 5,023,694; 5,084, 667; 5,153,880; 5,153,691; 5,161,137; 5,219,774; 5,270,927; 5,324,676; 5,434,396; 5,544,103; 5,587,573; 5,835,409; 5,977,585. foreign patents and addition al patents pending. life related policy in situations where semiconductor component failure may endanger life, system designers using this product should design the sy stem with appropriate error detection and correction, redundancy and back-up features to prevent such an occurrence. xicors products are not authorized for use in critical components in life support devices or systems. 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) sup port or sustain life, and whose failure to perform, when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to res ult in a signi?ant injury to the user. 2. a critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. ordering information x20c04 x x -x device access time -15 = 150ns temperature range blank = commercial = 0? to +70? i = industrial = ?0? to +85? m = military = ?5? to +125? package p = 28-lead plastic dip d = 28-lead cerdip e = 32-pad ceramic lcc -20 = 200ns -25 = 250ns blank = 300ns mb = mil. std-833 j = 32-lead plcc

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