1/8 february 2003 . STL22NF10 n-channel 100v - 0.055 w - 22a powerflat? low gate charge stripfet? ii mosfet n typical r ds (on) = 0.055 w n improved die-to-footprint ratio n very low profile package (1mm max) n very low thermal resistance n very low gate charge description this application specific power mosfet is the second generation of stmicroelectronis unique "stripfet?" technology. the resulting transistor shows extremely low on-resistance and minimal gate charge. the new powerflat? package allows a significant reduction in board space without compromising performance. applications n high-efficiency isolated dc-dc converters n telecom and automotive type v dss r ds(on) i d STL22NF10 100 v <0.060 w 22 a (1) powerflat ? (5x5) absolute maximum ratings symbol parameter value unit v ds drain-source voltage (v gs = 0) 100 v v dgr drain-gate voltage (r gs = 20 k w ) 100 v v gs gate- source voltage 20 v i d (2) drain current (continuous) at t c = 25c (steady state) 5.3 a i d (2) drain current (continuous) at t c = 100c 3.8 a i dm (3) drain current (pulsed) 22 a p tot (2) total dissipation at t c = 25c (steady state) 4w p tot (1) total dissipation at t c = 25c 70 w derating factor 0.03 w/c dv/dt (5) peak diode recovery voltage slope 16 v/ns e as (6) single pulse avalanche energy 82 mj t stg storage temperature -55 to 150 c t j operating junction temperature internal schematic diagram
STL22NF10 2/8 thermal data (*) mounted on fr-4 board (t [ 10 sec.) electrical characteristics (t case = 25 c unless otherwise specified) off on (7 ) dynamic rthj-f rthj-pcb(4) (*)thermal resistance junction-foot (drain) thermal operating junction-pcb 1.8 31.5 c/w c/w symbol parameter test conditions min. typ. max. unit v (br)dss drain-source breakdown voltage i d = 250 a, v gs = 0 100 v i dss zero gate voltage drain current (v gs = 0) v ds = max rating v ds = max rating t c = 125c 1 10 a a i gss gate-body leakage current (v ds = 0) v gs = 20 v 100 na symbol parameter test conditions min. typ. max. unit v gs(th) gate threshold voltage v ds = v gs i d = 250 a 2v r ds(on) static drain-source on resistance v gs = 10 v i d = 11 a 0.055 0.060 w symbol parameter test conditions min. typ. max. unit g fs (7) forward transconductance v ds = 20 v i d = 11 a 16 s c iss c oss c rss input capacitance output capacitance reverse transfer capacitance v ds = 25v, f = 1 mhz, v gs = 0 885 130 56 pf pf pf
3/8 STL22NF10 switching on switching off source drain diode ( 1 ) the value is rated according r thj-f . ( 2 ) the value is rated according r thj-pcb . ( 3 ) pulse width limited by safe operating area. ( 4 ) when mounted on fr-4 board of 1 inch2, 2 oz cu, t<10s. ( 5 ) i sd 22a, di/dt 300a/s, v dd v (br)dss , t j t jmax . ( 6 ) starting t j = 25 o c, i d = 11 a, v dd = 30v. ( 7 ) pulsed: pulse duration = 300 s, duty cycle 1.5 %. symbol parameter test conditions min. typ. max. unit t d(on) t r turn-on delay time rise time v dd = 50 v i d = 11 a r g = 4.7 w v gs = 10 v (resistive load, figure 3) 20 45 ns ns q g q gs q gd total gate charge gate-source charge gate-drain charge v dd = 80v i d = 22a v gs =10v 30 6 10 40 nc nc nc symbol parameter test conditions min. typ. max. unit t d(off) t f turn-off delay time fall time v dd = 50 v i d = 11 a r g = 4.7 w, v gs = 10 v (resistive load, figure 3) 45 10 ns ns symbol parameter test conditions min. typ. max. unit i sd i sdm source-drain current source-drain current (pulsed) 5.3 22 a a v sd (7) forward on voltage i sd = 22 a v gs = 0 1.3 v t rr q rr i rrm reverse recovery time reverse recovery charge reverse recovery current i sd =22 a di/dt = 100a/s v dd = 30 v t j = 150c (see test circuit, figure 5) 100 375 7.5 ns nc a electrical characteristics (continued) safe operating area thermal impedance
STL22NF10 4/8 output characteristics transfer characteristics transconductance static drain-source on resistance gate charge vs gate-source voltage capacitance variations
5/8 STL22NF10 normalized gate threshold voltage vs temperature normalized on resistance vs temperature source-drain diode forward characteristics normalized breakdown voltage vs temperature. . .
STL22NF10 6/8 fig. 1: unclamped inductive load test circuit fig. 1: unclamped inductive load test circuit fig. 2: unclamped inductive waveform fig. 3: switching times test circuits for resistive load fig. 4: gate charge test circuit fig. 5: test circuit for inductive load switching and diode recovery times
7/8 STL22NF10
STL22NF10 8/8 information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsibility for the co nsequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specifications mentioned in this publicati on are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectronics prod ucts are not authorized for use as critical components in life support devices or systems without express written approval of stmicroelectro nics. the st logo is registered trademark of stmicroelectronics a 2003 stmicroelectronics - all rights reserved all other names are the property of their respective owners. stmicroelectronics group of companies australia - brazil - canada - china - finland - france - germany - hong kong - india - israel - italy - japan - malaysia - malt a - morocco - singapore - spain - sweden - switzerland - united kingdom - united states. http://www.st.com
|
