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TA1226N 2001-02-26 1/15 toshiba bipolar linear integrated circuit silicon monolithic TA1226N y luminance transient improver ic TA1226N integrates y luminance transient improver circuits (black stretch, dc transfer ratio compensation, super real transient, noise reduction) in a 20-pin shrink dip. TA1226N functions are controlled via i 2 c bus. features black stretch circuit dc transfer ratio compensation circuit super real transient circuit (srt) noise reduction 1-bit dac output velocity modulation output weight: 1.02g (typ.) tentative ? toshiba is continually working to improve the quality and reliability of its products. nevertheless, semiconductor devices in g eneral can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. it is the responsibi lity of the buyer, when utilizing toshiba products, to comply with the standards of safety in making a safe design for the entire system, a nd to avoid situations in which a malfunction or failure of such toshiba products could cause loss of human life, bodily injury o r damage to property. in developing your designs, please ensure that toshiba products are used within specified operating ranges as set forth in the most recent toshiba products specifications. also, please keep in mind the precautions and conditions set forth in the ?handlin g guide for semiconductor devices,? or ?toshiba semiconductor reliability handbook? etc.. ? the toshiba products listed in this document are intended for usage in general electronics applications (computer, personal equipment, office equipment, measuring equipment, industrial robotics, domestic appliances, etc.). these toshiba products are neither intended nor warranted for usage in equipment that requires extraordinarily high quality and/or reliability or a malfun ction o r failure of which may cause loss of human life or bodily injury (?unintended usage?). unintended usage include atomic energ y control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion cont rol instruments, medical instruments, all types of safety devices, etc.. unintended usage of toshiba products listed in this docume n t shall be made at the customer?s own risk. ? the products described in this document are subject to the foreign exchange and foreign trade laws. ? the information contained herein is presented only as a guide for the applications of our products. no responsibility is assume d b y toshiba corporation for any infringements of intellectual property or other rights of the third parties which may result from i ts use. no license is granted by implication or otherwise under any intellectual property or other rights of toshiba corporation o r others. ? the information contained herein is subject to change without notice. 000707 eba1
TA1226N 2001-02-26 2/15 block diagram terminal connection diagram
TA1226N 2001-02-26 3/15 terminal function pin no. pin name function interface i / o signal 1 y input luminance signal input pin. input luminance signal after eliminating chrome signal via capacitor. after luminance signal is input to this pin, y signal is clamped to 4.5v pedestal level. standard input level is 1v p-p (including sync signal). 2 black stretch point used to set black stretch start point using external resistance (dc level). note that setting this pin to 1.5v or below enters test mode. dc 3.5~7.0v 3 black peak hold used to connect filter which detects highest black level of luminance signal. voltage on this pin determines black stretch gain. dc 3.8~5.2v 4 black detect level used to control frequency (area) of black level to be detected. set area to be detected using external capacitance and internal resistance. in application circuit example, setting is made so that frequency of black level to be detected is 100khz or less.
TA1226N 2001-02-26 4/15 pin no. pin name function interface i / o signal 5 analog gnd gnd for analog circuit D D 6 abl input used to apply control current for abl and black level compensation. D 7 dc transfer ratio compensati- on used to compensate dc transfer ratio. smaller rx, larger compensation amount. injection of rz varies start point of dc transfer ratio compensation. dc transfer ratio tdc (%) =5k ? / (5k ? +rx)30+100 when pin 7 is open : 8 9 dac1 output dac2 output open collector switches. maximum, input current value : 2ma (minimum, drive resistance value : 6k ? ) dc v cc or gnd 10 scp input scp (sand castle pulse) input pin. typical thresholds for cp (clamp pulse), hp (horizontal pulse), and vp (vertical pulse) are 6.9v, 3.1v, and 1.3v respectively.
TA1226N 2001-02-26 5/15 pin no. pin name function interface i / o signal 11 scl i 2 c bus scl pin. because surge breakdown voltage is low, take external countermeasure if necessary. 12 sda i 2 c bus sda pin. because surge breakdown voltage is low, take external countermeasure if necessary. when vcc voltage is 3.2v or more, power-on reset is applied. 13 digital gnd logic circuit gnd pin. D D 14 osc used to connect filter for obtaining 4mhz. using 4-mhz oscillation, automatically adjusts built-in delay line. dc 11.7v (typical) ac 420mv p-p (typical) (at 4mhz) 15 automatic filter adjustment used to connect filter which automatically adjusts delay time of ic built-in delay line. directly connecting external pull-up resistor increases peak frequency. pulling down decreases peak frequency. dc 5.9v (typical)
TA1226N 2001-02-26 6/15 pin no. pin name function interface i / o signal 16 v cc v cc pin. connect 12v (typical). D D 17 y output output pin for luminance signal on which y is processed. max. output current value : 2ma (min. drive resistance value : 3.8k ? ) 18 black area hold used to connect filter which detects black area of input luminance signal. voltage changes depending on black area of input signal pin. black area detection of bus control can vary threshold of black area detect. dc 0.2~6.7v 19 y output for vm y output pin for vm (velocity modulation). maximum output current value : 2ma (minimum drive resistance : 2.4k ? ). 20 black area output output pin for black area detected by black area hold circuit. outputs dc current depending on input black area. larger black area, higher pin voltage. control is possible using output of this pin, depending on input signal black area. dc 0.5~6.8v
TA1226N 2001-02-26 7/15 bus control map y luminance transient improver ic slave address : 10111010 (ba (h) ) sub address 7 msb 6 5 4 3 2 1 0 lsd power-on initial value msb lsb 00 apac sharpness 0100 0000 01 black area detect srt level * ynr correction 0000 1011 02 dac1 dac2 vm gain black stretch curve black compens a-tion srt 0011 0011 03 test frequency characteristics compensation (rs) luminance transient tracking (rtc) 1100 0100 note * : ignore data.
TA1226N 2001-02-26 8/15 function control data control contents preset value apacon 0 : on 1 : off controls on / off of dl (delay line) apacon in micro signal amplitude (approx. 20mv p-p ) range. on (0) sharpness 7f : max 00 : min controls both dl apacon and srt. center value (40h) black area detect 11 : 40 ire 10 : 30 ire 01 : 20 ire 00 : 10 ire controls maximum level of black area detect from pedestal of black area detector circuit (pin 20 output). 10 ire (00) srt level 11 : 28 ire 10 : 14 ire 01 : 10 ire 00 : 7 ire controls signal amplitude at which srt becomes valid. 28 ire (00) ynr 0 : on 1 : off controls ynr on / off. off (1) correction 11 : off 10 : 90 ire 01 : 80 ire 00 : 70 ire controls start point of correction (broken line at one point) off (11) dac1 0 : open 1 : on controls 1-bit dac (open collector transistor output) open (0) dac2 0 : open 1 : on controls 1-bit dac (open collector transistor output) open (0) vm gain 11 : 0db 10 : ? 3db 01 : ? 6db 00 : off controls gain between y input and vm output. 0db (00) black stretch 0 : on 1 : off controls black stretch on / off. off (0) curve 0 : ? 2.4db 1 : ? 1.6db controls curve of correction (broken line at one point) ? 2.4db (0) black compensation 0 : on 1 : off controls automatic black level compensation (max. 7.5ire). (when black stretch gain is maximum, if highest black level floats above pedestal level, dc-shifts maximum of 7.5ire picture duration up to pedestal level.) on (0) srt 0 : off 1 : on controls srt on / off. on (1) test 11 : test3 10 : rtc 01 : shr 00 : rs controls pin 20 output signal in test mode. test3 (11) 8mhz frequency characteristics compensation 111 : max (+6db) 000 : min (0db) controls gain of dl apacon at 8mhz peak. 0db (000) luminance transient tracking 111 : max 000 : min controls compensation ratio of srt and dl apacon. (controls srt level to be added to dl apacon.) center value (100)
TA1226N 2001-02-26 9/15 overview of i 2 c bus control format the bus control format for TA1226N conforms to the philips standard. data transfer format (1) start and end conditions (2) bit transfer (3) acknowledgment (4) slave addresses purchase of toshiba i 2 c components conveys a license under the philips i 2 c patent rights to use these components in an i 2 c system, provided that the system conforms to the i 2 c standard specification as defined by philips. a6 a5 a4 a3 a2 a1 a0 w / r 1 0 1 1 1 0 1
TA1226N 2001-02-26 10/15 maximum ratings (ta = 253c) characteristic symbol rating unit supply voltage v ccmax 14 v input pin signal voltage ein max 12 v p-p power dissipation p d (note 1) 1400 mw power dissipation decrease ratio 1 / qjp ? 11.2 mw / c operating temperature t opr ? 20~65 c storage temperature t stg ? 55~150 c note 1: see figure below. note 2: since the device is susceptible to surge voltage, take great care when handling. figure temperature decrease curve of power dissipation
TA1226N 2001-02-26 11/15 recommended supply voltage pin no. pin name min typ. max unit 16 v cc 11.0 12.0 13.0 v electrical characteristics (unless otherwise specified, v cc = 12v, ta = 253c) dc characteristics supply voltage characteristic symbol min typ. max unit supply voltage i cc 26.0 35.5 48.0 ma pin voltage pin no. pin name symbol min typ. max unit remarks 1 y input v1 4.20 4.50 4.80 4 black detect level v4 4.20 4.50 4.80 no input, scp input 6 abl input v6 2.00 2.50 2.90 7 dc transfer ratio compensation v7 4.20 4.50 4.80 no input, pin open, scp input 8 dac1 output v8 11.5 11.9 12.0 9 dac2 output v9 11.5 11.9 12.0 17 y output v17 7.45 7.80 8.15 19 vm y output v19 3.30 3.75 4.20 v no input, scp input ac characteristics (unless otherwise specified, v cc = 12v, ta = 253c) characteristic symbol test cir- cuit test condition min typ. max unit y input pedestal clamp voltage v1 D (note 1) 4.2 4.5 4.8 v pin 7 output impedance z out7 D (note 2) 4.3 5.5 6.7 k ? dc transfer ratio compensation amp gain a v7 D (note 3) 0.25 0.34 0.45 D dynamic abl maximum sensitivity g v6 D (note 4) 3.4 5 6.6 mv / a black stretch amp maximum gain g vbe D (note 5) 1.30 1.40 1.50 D y input dynamic range dr 1 D (note 6) 0.9 1.0 1.2 v luminance transient control peaking frequency f p D (note 7) 3.6 4 4.4 mhz g smax 9 12 15 luminance transient control range g smin D (note 8) ? 12 ? 9 ? 6 db luminance transient control center characteristics g sct D (note 9) 4 5.5 7 db fp max 4.3 5.9 7.8 peaking frequency change range fp min D (note 10) 1.8 2.7 3.6 mhz
TA1226N 2001-02-26 12/15 characteristic symbol test cir- cuit test condition min typ. max unit srt max 20 40 60 srt cen 110 130 150 super real transient 2t pulse response srt min D (note 11) 170 190 210 ns noise reduce gnr D (note 12) ? 15 ? 7 ? 1.0 db v st1 250 310 370 black stretch point v st2 D (note 13) 340 430 520 mv black peak detect on voltage v bpon D (note 14) 1.2 1.5 1.8 v t bp1 black detect delay time t bp2 D (note 15) 0 50 170 ns g vm00 D ? 40 ? 20 g vm01 ? 7 ? 6 ? 5 g vm10 ? 4 ? 3 ? 2 vm output y gain g vm11 D (note 16) ? 1 0 1 db v 00 530 575 620 v 01 600 645 690 correction point v 10 D (note 17) 620 665 710 mv g 0 ? 3.2 ? 2.4 ? 1.6 correction curve g 1 D (note 18) ? 2.4 ? 1.6 ? 0.8 db black peak detect level v bp D (note 19) 5 20 35 mv dl apacon limiter range v al D (note 20) 20 45 70 mv v bs00 50 80 110 v bs01 130 160 190 v bs10 200 230 260 black area detected level v bs11 D (note 21) 280 310 340 mv ? v bs00 black area hold pin voltage ? v bs01 ? v bs10 black area output pin voltage difference ? v bs11 D (note 22) ? 260 0 260 mv ? v 2000 ? v 2001 ? v 2010 black area output pin voltage change with respect to black area hold pin voltage change ? v 2011 D (note 23) 410 500 610 mv ft max 5 6 7 frequency characteristics compensation ft min D (note 24) ? 1.5 0 ? 1.5 db clamp voltage on voltage v clon D (note 25) 6.7 6.9 7.1 v horizontal blanking on voltage v hp D D 2.9 3.1 3.3 v vertical blanking on voltage v vp D D 1.1 1.3 1.5 v osc oscillation frequency f osc D (note 26) 3.9 4.0 4.1 mhz
TA1226N 2001-02-26 13/15 test circuit
TA1226N 2001-02-26 14/15 application circuit
TA1226N 2001-02-26 15/15 package dimensions weight: 1.02g (typ.)

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