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high-performance products ?ate 1 www .semtech.com edge622/624 very high-speed dual and quad channel ecl delay lines description features functional block diagrams applications revision 1/ july 10, 1996 the edge622 and edge624 are dual and quad (respectively) delay and deskew elements. manufactured in a high performance bipolar process, they are designed primarily for channel deskew applications in memory test equipment. the parts offer three distinct full scale delay ranges of 14 ns, 24 ns, and 34 ns. in the 14 ns and 24 ns ranges, independent adjustment of the rising edge vs. the falling edge is achievable. the edge622 and edge624 have a drive mode, where one input signal is routed to all of the outputs. this mode is particularly useful in a fanout application. the delay value (and resolution) is controlled via an external voltage dac. these deskew elements are designed specifically to be monotonic and stable while delaying a very narrow pulse over a wide delay range. pin and functionally compatible with the bt622 and bt624 independent delay adjustments for positive and negative transitions fanout mode for one input distributed to all channels 28-pin or 44-pin plastic j-lead (plcc) package with internal heat spreader automatic test equipment ? memory tester drive only channel deskew ? i/o channel deskew in1 s0 s1 gnd1 vee1 gnd1 out1 out1* vdelay1 vwidth1 in1* in2 gnd2 vee2 gnd2 out2 out2* vdelay2 vwidth2 in2* comp1 rext1 vbb comp2 rext2 drvmode in1 s0 s1 gnd1 vee1 gnd1 out1 out1* vdelay1 vwidth1 in1* in2 gnd2 vee2 gnd2 out2 out2* vdelay2 vwidth2 in2* in3 gnd3 vee3 gnd3 out3 out3* vdelay3 vwidth3 in3* in4 gnd4 vee4 comp1 rext1 vbb comp2 rext2 gnd4 out4 out4* vdelay4 vwidth4 in4* drvmode edge622 dual channel edge624 quad channel
2 ? 2000 semtech corp. www .semtech.com high-performance products ?ate edge622/624 pin description e m a n n i p# n i p 4 2 6# n i p 2 2 6n o i t p i r c s e d l a t i g i d * n i , n i , 3 4 , 2 4 , 9 3 , 8 3 7 , 6 , 3 , 2 5 , 4 , 8 2 , 7 2) . s t u p n i l a t i g i d l a i t n e r e f f i d ( . d e y a l e d e b o t l a n g i s t u p n i e h t * t u o , t u o, 4 2 , 5 2 , 7 2 , 8 2 8 1 , 9 1 , 1 2 , 2 2 2 1 , 3 1 , 6 1 , 7 1 l c e l a i t n e r e f f i d ( . l a n g i s t u p t u o d e y a l e d g n i d n o p s e r r o c e h t ) . s t u p t u o e l b i t a p m o c e d o m v r d2 31 2 h c i h w t u p n i e l b i t a p m o c l c e h k 0 1 d e d n e - e l g n i s . e d o m t u o n a f n i s i t r a p e h t r e h t e h w s e n i m r e t e d 1 s , 0 s0 3 , 1 39 1 , 0 2 e n i f e d h c i h w s t u p n i e l b i t a p m o c l c e h k 0 1 d e d n e - e l g n i s . e d o m g n i t a r e p o e h t g o l a n a y a l e d v9 1 , 1 1 , 3 1 , 5 17 , 9f o t n u o m a e h t s l o r t n o c h c i h w t u p n i e g a t l o v g o l a n a . l e n n a h c h c a e r o f y a l e d n o i t a g a p o r p h t d i w v0 1 , 2 1 , 4 1 , 6 18 , 0 1g n i l l a f f o t n u o m a e h t s l o r t n o c h c i h w t u p n i e g a t l o v g o l a n a . l e n n a h c h c a e r o f y a l e d e g d e b b v7 11 1s a d e s u , v 3 . 1 o t l a u q e y l l a n i m o n , t u p t u o e g a t l o v g o l a n a . s t u p n i d e d n e - e l g n i s r o f e c n e r e f e r a 1 t x e r5 34 2r o f t n e r r u c s a i b e h t h s i l b a t s e o t d e s u t n e r r u c t u p n i g o l a n a . s t u p n i h t d i w v d n a y a l e d v e h t 2 t x e r3 32 2r o f l e v e l s a i b e h t h s i l b a t s e o t d e s u t n e r r u c t u p n i g o l a n a . s l l e c y a l e d e h t 1 p m o c6 35 2e b t s u m r o t i c a p a c c i m a r e c f 1 . 0 a . n i p n o i t a s n e p m o c . e e v d n a 1 p m o c n e e w t e b d e t c e n n o c 2 p m o c4 33 2e b t s u m r o t i c a p a c c i m a r e c f 1 . 0 a . n i p n o i t a s n e p m o c . e e v d n a 2 p m o c n e e w t e b d e t c e n n o c r e w o p d n g , 3 2 , 0 2 , 5 , 1 1 4 , 7 3 , 9 2 , 6 2 6 2 , 8 1 , 4 1 , 2. d n u o r g e c i v e d e e v4 4 , 0 4 , 8 , 46 , 1. y l p p u s r e w o p e c i v e d c / n5 1 , 3. t c e n n o c o n the signals that are individually assigned for each channel are suffixed by the channel number: 1 and 2 for the edge622, and 1 through 4 for the edge624.
3 ? 2000 semtech corp. www .semtech.com high-performance products ate edge622/624 pin description (continued) gnd1 out1 out1* n/c gnd2 out2 out2* gnd1 in1 in1* vee1 gnd2 n/c in2 in2* vee2 vdelay2 vwidth2 vdelay1 vwidth1 vbb comp1 rext1 comp2 rext2 drvmode s0 s1 25 24 23 22 21 20 19 18 17 16 15 14 13 12 26 27 28 1 2 3 4 5 6 7 8 9 10 11 out1 out1* gnd2 out2 out2* gnd3 out3 out3* gnd4 out4 out4* in1* in1 gnd1 comp1 rext1 comp2 rext2 drvmode s0 s1 gnd1 vee1 gnd2 in2 in2* vee2 gnd3 in3 in3* vee3 gnd4 in4 in4* vee4 vdelay4 vwidth4 vdelay3 vwidth3 vdelay2 vwidth2 vdelay1 vwidth1 vbb 40 41 42 43 44 1 2 3 4 5 6 28 27 26 25 24 23 22 21 20 19 18 39 38 37 36 35 34 33 32 31 30 29 7 8 9 10 11 12 13 14 15 16 17 edge622 28-pin plastic j-lead w/internal heat spreader edge624 44-pin plastic j-lead w/internal heat spreader
4 ? 2000 semtech corp. www .semtech.com high-performance products ate edge622/624 circuit description chip overview the edge624 is a quad, and the edge622 is a dual, delay line and deskew element. each part offers three ranges of delay (tspan); 14 ns, 24 ns, or 34 ns, where the vdelay inputs adjust the overall propagation delay of the part. in addition, the parts support a separate rising and falling edge delay for the 14 ns and 24 ns ranges only, where the vwidth inputs control the falling edge delay. there is also a drive mode, where the channel 2 input drives all four edge624 outputs (or channel 1 drives both edge622 outputs), with all other inputs ignored. the edge622 and edge624 are designed to be monotonic and very stable in all modes of operation. figures 1 and 2 show simplified block diagrams of the two parts. data sheet nomenclature the remainder of the data sheet will be written for the edge624. all circuit descriptions also pertain to the edge622, only channels 3 and 4 will not apply. out1, out1* vdelay1 vwidth1 in1, in1* ? t out2, out2* vdelay2 vwidth2 in2, in2* ? t drvmode out1, out1* vdelay1 vwidth1 in1, in1* ? t out2, out2* vdelay2 vwidth2 in2, in2* ? t out3, out3* vdelay3 vwidth3 in3, in3* ? t out4, out4* vdelay4 vwidth4 in4, in4* ? t drvmode figure 1. edge622 block diagram figure 2. edge624 block diagram
5 ? 2000 semtech corp. www .semtech.com high-performance products ate edge622/624 cir cuit description (continued) operating modes the edge624 has 5 modes of operation, which are described in table 1. (mode 4 is not a valid mode.) table 1. delay ranges versus mode modes 0, 1, and 5 modes 0, 1, and 5 are simple delay modes (see figures 3 and 4). an input signal comes into each channel and is delayed by some programmable amount determined by the analog input vdelay. the rising and falling edges are delayed equally. the vwidth analog input has no function in modes 0 and 2, and vwidth must be connected to vdelay in mode 5. the propagation delay for a rising and falling edge is defined as tpd+, tpd- = tpd(min) + tspan where tpd(min) is the raw propagation delay of the part with minimum programmed delay, and tspan is the additional delay programmed via the vdelay input. e d o m1 s0 sn a p s th t d i w v 000 s n 4 1a / n 101 s n 4 2a / n 210 s n 4 1s n 5 311 s n 4 2s n 5 4e e v0 a / na / n 5e e v1 s n 4 3a / n figure 3. modes 0, 1, and 5 vdelay control figure 4. modes 0, 1, and 5 functional diagram out1, out1* in1, in1* vdelay1 ? t in2, in2* ? t in3, in3* ? t in4, in4* ? t out2, out2* vdelay2 out3, out3* vdelay3 out4, out4* vdelay4 input output output tpdmin tpdmin tspan tspan (vdelay = vwidth = ?.1v) (vdelay = vwidth = ?.3v)
6 ? 2000 semtech corp. www .semtech.com high-performance products ate edge622/624 circuit description (continued) edge624 tspan vs. vdelay vdelay [v] tspan [ns] 0 5 10 15 20 25 30 35 -0.1 -0.2 -0.3 -0.4 -0.5 -0.6 -0.7 -0.8 -0.9 -1 -1.1 -1.2 -1.3 modes 0,2 modes 1,3 mode 5 figure 5. tspan transfer function analog delay inputs vdelay and vwidth are analog voltage inputs which control the delay of the rising and falling edge. vdelay and vwidth vary from -0.1v (minimum delay) to -1.3v (maximum delay). these inputs are designed to sink a constant input current, typically 1.0 ma (with rext1 = 1.3 k ? ), over their operating range from -0.1v to -1.3v. any voltage dac used to drive these inputs directly needs to source 1.0 ma. any current dac used needs to factor in the constant 1.0 ma input current. the equation used to establish the vdelay and vwidth input currents is: i (vwidth, vdelay) = 1.3v / rext1. the transfer function for tspan vs. vdelay is shown for all modes in figure 5.
7 ? 2000 semtech corp. www .semtech.com high-performance products ate edge622/624 input output vwidth = 0.1v vwidth = 1.3v tpdmin + tspan tpdmin + tspan + twidth ( 1.3v < vdelay < 0.1v) circuit description (continued) modes 2 and 3 modes 2 and 3 allow independent adjustment of the rising and falling edges (see figures 6 and 7). the propagation delay for a rising edge is defined as tpd+ = tpd(min) + tspan where tpd(min) is the raw propagation delay of the part with minimum programmed delay, and tspan is the additional delay programmed via the vdelay input. the propagation delay for a falling edge is defined as tpd- = tpd(min) + tspan + twidth where twidth is defined as the additional delay incurred by adjusting the vwidth input. notice that twidth can be either positive or negative over a 5 ns range. this flexibility allows the part the either expand or contract an input signal (see figure 6). notice also that tpd+ is a function of vdelay only, while tpd- is a function of vdelay and vwidth. the transfer function for tspan vs. vdelay is shown for both modes in figure 5. the transfer function for twidth vs. vwidth and vdelay is shown in figure 8. programming sequence vdelay, in addition to affecting the placement of the rising edge, also affects the falling edge. therefore, when calibrating a system, vdelay should be adjusted first. as vwidth affects only the falling edge, it should be adjusted after vdelay is established. figure 6. mode 2 and 3 vdelay and vwidth controls figure 7. functional model in modes 2 and 3 out1, out1* vwidth1 in1, in1* vdelay1 ? t out2, out2* vwidth2 vdelay2 ? t out3, out3* vwidth3 vdelay3 ? t out4, out4* vwidth4 vdelay4 ? t in2, in2* in3, in3* in4, in4*
8 ? 2000 semtech corp. www .semtech.com high-performance products ate edge622/624 circuit description (continued) figure 8. mode 2 and 3 transfer function +10.0 +8.0 +6.0 +4.0 +2.0 0.0 2.0 4.0 6.0 8.0 10.0 0.1 0.3 1.1 1.3 0.7 0.9 0.5 vwidth = 1.3v vwidth = 0.7v vwidth = 0.1v min delay vdelay [v] max delay twidth [ns]
9 ? 2000 semtech corp. www .semtech.com high-performance products ate edge622/624 cir cuit description (continued) drive mode with drvmode = 1, the input signal on channel 2 will be routed to all edge624 delay paths. (channel 1 will be routed to both edge622 outputs.) in drive mode, all 5 operating modes still offer the same delay range and edge control features. the only difference is that the input signal now comes from channel 2, while all other inputs (in/in*) are ignored. figures 9 through 12 show a simplified model for drive mode. figure 9. edge622 drive mode for operating modes 0, 1, and 5. figure 10. edge624 drive mode for operating modes 0, 1, and 5 figure 11. edge622 drive mode for operating modes 2 and 3. figure 12. edge624 drive mode for operating modes 2 and 3. out1, out1* in1, in1* vdelay1 ? t ? t out2, out2* vdelay2 out1, out1* in1, in1* vdelay1 ? t ? t ? t ? t out2, out2* vdelay2 out3, out3* vdelay3 out4, out4* vdelay4 out1, out1* vwidth1 vdelay1 ? t out2, out2* vwidth2 vdelay2 ? t out3, out3* vwidth3 vdelay3 ? t out4, out4* vwidth4 vdelay4 ? t in2, in2* out1, out1* vwidth1 vdelay1 ? t out2, out2* vwidth2 vdelay2 ? t in1, in1*
10 ? 2000 semtech corp. www .semtech.com high-performance products ate edge622/624 application information power up initialization note: modes 2 and 3 use an sr flip-flop at the output stage; modes 0, 1, and 5 do not. therefore, upon power up in modes 2 or 3, or when operating modes are being changed into modes 2 or 3, the sr flip-flop is in an indeterminate state and the output may not reflect the input condition. a rising or falling edge that propagates through the channel will correctly reset the part. therefore, in mode 2 or 3, a dummy edge should be applied before calibration or real time execution. notice also that in modes 0, 1, and 5 there is no flip-flop. the output will therefore always reflect the status of the inputs. minimum pulse width the minimum pulse width that the part can support is a function of the operating mode and the programmed delay value. figures 13, 14, and 15 document the maximum usably delay for all modes and ranges. figure 13. minimum pulse width capability in mode 0 edge624 output pulse width vs. delay in mode 0 vdelay [v] output pulse width [ns] 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 6.5 -0.1 -0.2 -0.3 -0.4 -0.5 -0.6 -0.7 -0.8 -0.9 -1 -1.1 -1.2 -1.3 1.516 ns pw 2.025 ns pw 2.490 ns pw 3.013 ns pw 3.498 ns pw 3.995 ns pw 4.508 ns pw 5.015 ns pw 6.023 ns pw
11 ? 2000 semtech corp. www .semtech.com high-performance products ate edge622/624 application infor mation (continued) figure 14. minimum pulse width capability in mode 1 edge624 output pulse width vs. delay in mode 1 vdelay [v] output pulse width [ns] 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 6.5 -0.1 -0.2 -0.3 -0.4 -0.5 -0.6 -0.7 -0.8 -0.9 -1 -1.1 -1.2 -1.3 1.516 ns pw 2.025 ns pw 2.490 ns pw 3.013 ns pw 3.498 ns pw 3.995 ns pw 4.508 ns pw 5.015 ns pw 6.023 ns pw edge624 output pulse width vs. delay in mode 5 vdelay (= vwidth) [v] output pulse width [ns] 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 6.5 -0.1 -0.2 -0.3 -0.4 -0.5 -0.6 -0.7 -0.8 -0.9 -1 -1.1 -1.2 -1.3 1.516 ns pw 2.025 ns pw 2.490 ns pw 3.013 ns pw 3.498 ns pw 3.995 ns pw 4.508 ns pw 5.015 ns pw 6.023 ns pw figure 15. minimum pulse width capability in mode 5
12 ? 2000 semtech corp. www .semtech.com high-performance products ate edge622/624 application information (continued) edge624 tspan integral linearity in modes 0 and 2 vdelay (= vwidth) [v] integral linearity error [ps] -700 -600 -500 -400 -300 -200 -100 0 100 -0.1 -0.2 -0.3 -0.4 -0.5 -0.6 -0.7 -0.8 -0.9 -1 -1.1 -1.2 -1.3 edge624 tspan integral linearity in modes 1 and 3 vdelay (= vwidth) [v] integral linearity error [ps] -900 -800 -700 -600 -500 -400 -300 -200 -100 0 100 200 -0.1 -0.2 -0.3 -0.4 -0.5 -0.6 -0.7 -0.8 -0.9 -1 -1.1 -1.2 -1.3 figure 16. integral linearity error - modes 0 and 2 figure 17. integral linearity error - modes 1 and 3 linearity the edge622 and edge624 are designed to be monotonic and stable, although not necessarily linear. however, there is a characteristic nonlinearity curve associated with each operating mode of the part. figures 16, 17, and 18 show this nonlinearity. figure 18. integral linearity error - mode 5 edge624 tspan integral linearity in mode 5 vdelay (= vwidth) [v] integral linearity error [ps] -1100 -900 -700 -500 -300 -100 100 300 500 -0.1 -0.2 -0.3 -0.4 -0.5 -0.6 -0.7 -0.8 -0.9 -1 -1.1 -1.2 -1.3
13 ? 2000 semtech corp. www .semtech.com high-performance products ate edge622/624 application information (continued) in1 s0 s1 gnd1 vee1 gnd1 out1 out1* vdelay1 vwidth1 vwidth2 in1* gnd2 out2 out2* vdelay2 comp1 rext1 vbb comp2 rext2 drvmode t t t 5.2v 5.2v t in2 gnd2 vee2 in2* t t t 5.2v 5.2v 2v t r2 1.3k r1 1.3k * 5.2v * * r5 1.3k r6 2.94k r4 500 * * differential ecl input signal single-ended 10kh input signal current adjustments from bt110 octal dac or equivalent 50 ? 50 ? transmission line 0.1 f 0.01 f 0.1 f figure 19. edge 622 typical applications
14 ? 2000 semtech corp. www .semtech.com high-performance products ate edge622/624 application information (continued) r e t e m a r a pl o b m y sn i mp y tx a ms t i n u e c n a t s i s e r l a m r e h t r i a o t n o i t c n u j j h k 2 2 6 e g d e r i a l l i t s w o l f r i a f o m p f l 0 5 w o l f r i a f o m p f l 0 0 4 a j a j a j 8 . 8 4 5 . 5 3 4 . 6 2 o w / c o w / c o w / c j h k 4 2 6 e g d e r i a l l i t s w o l f r i a f o m p f l 0 5 w o l f r i a f o m p f l 0 0 4 a j a j a j 1 4 3 3 1 2 o w / c o w / c o w / c e s a c o t n o i t c n u j j h k 2 2 6 e g d e c j 3 . 1 1 o w / c j h k 4 2 6 e g d e c j 4 . 2 1 o w / c package thermal data
15 ? 2000 semtech corp. www .semtech.com high-performance products ate edge622/624 package information pin descriptions pin #1 pin #1 ident 0.045 x 45 o [1.143] 0.485 0.495 [12.32 12.57] sq 0.450 0.456 [11.43 11.58] sq pin #1 0.300 ref [7.62] 0.050 [1.27] typ 0.026 0.032 [0.661 0.812] 0.026 0.032 [0.661 0.812] 0.090 0.120 [2.29 3.04] 0.390 0430 [9.91 10.92] 0.165 0.180 [4.19 4.57] .045 x 45 o [1.14] edge622 28 pin plcc package ja = 75 to 80?c / w notes: (unless otherwise specified) 1. dimensions are in inches [millimeters]. 2. tolerances are: .xxx 0.005 [0.127]. 3. plcc packages are intended for surface mounting on solder lands on 0.050 [1.27] centers. top view bottom view
16 ? 2000 semtech corp. www .semtech.com high-performance products ate edge622/624 package information (continued) edge624 44 pin plcc package ja = 42 to 48?c / w pin #1 pin #1 ident 0.690 [17.526] sq 0.654 [16.612] sq 0.045 x 45 o [1.143] pin #1 ident 0.029 [0.736] 0.016 [0.406] 0.050 [1.27] 0.620 [15.748] 0.172 [4.368] 0.101 [2.565] 0.500 [12.70] 0.045 x 45 o notes: (unless otherwise specified) 1. dimensions are in inches [millimeters]. 2. tolerances are: .xxx 0.005 [0.127]. 3. plcc packages are intended for surface mounting on solder lands on 0.050 [1.27] centers. top view bottom view
17 ? 2000 semtech corp. www .semtech.com high-performance products ate edge622/624 recommended operating conditions absolute maximum ratings r e t e m a r a pl o b m y sn i mp y tx a ms t i n u d n u o r g e c i v e dd n g000v y l p p u s r e w o p e v i t a g e ne e v2 . 4 -2 . 5 -5 . 5 -v e r u t a r e p m e t g n i t a r e p o t n e i b m aa t0 0 7 + o c r e t e m a r a pl o b m y sn i mp y tx a ms t i n u ) d n g o t e v i t a l e r ( e e v0 . 6 -0v n i p l a t i g i d y n a n o e g a t l o ve e vd n gv t n e r r u c t u p t u o0 5 -a m e r u t a r e p m e t g n i t a r e p o t n e i b m aa t5 5 -0 7 + o c e r u t a r e p m e t e g a r o t ss t5 6 -0 5 1 + o c e r u t a r e p m e t n o i t c n u jj t0 5 1 + o c e r u t a r e p m e t g n i r e d l o s ) n i p m o r f " 4 / 1 , s d n o c e s 5 ( a t00 7 + o c stresses above those listed under absolute maximum ratings?may cause permanent damage to the device. this is a stress rating only, and functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability.
18 ? 2000 semtech corp. www .semtech.com high-performance products ate edge622/624 dc characteristics r e t e m a r a pl o b m y s( a t o ) cn i mp y tx a ms t i n u ) 1 e t o n ( e g a t l o v h g i h t u p n i l a t i g i d * n i , n ih i v 0 5 2 + 0 7 + 0 7 1 1 - 0 3 1 1 - 0 7 0 1 - 0 4 8 - 0 1 8 - 5 3 7 - v m v m v m ) 1 e t o n ( e g a t l o v h g i h t u p n i l a t i g i d 1 s , 0 s , e d o m r v dh i v 0 5 2 + 0 7 + 0 7 1 1 - 0 3 1 1 - 0 7 0 1 - 0 0 0 v m v m v m ) 1 e t o n ( e g a t l o v w o l t u p n i l a t i g i d * n i , n il i v 0 5 2 + 0 7 + 0 5 9 1 - 0 5 9 1 - 0 5 9 1 - 0 8 4 1 - 0 8 4 1 - 0 5 4 1 - v m v m v m ) 1 e t o n ( e g a t l o v w o l t u p n i l a t i g i d 0 s , e d o m v r dl i v 0 5 2 + 0 7 + e e v e e v e e v 0 8 4 1 - 0 8 4 1 - 0 5 4 1 - v m v m v m ) 1 e t o n ( e g a t l o v w o l t u p n i l a t i g i d 1 sl i v 0 5 2 + 0 7 + 0 0 1 2 - 0 0 1 2 - 0 0 1 2 - 0 8 4 1 - 0 8 4 1 - 0 5 4 1 - v m v m v m ) y a l e d d e d n e t x e ( e t a t s d r i h t 1 sl l u fe e v2 . 3 -v e g a t l o v h g i h t u p t u o l a t i g i dh o v 0 5 2 + 0 7 + 0 4 0 1 - 0 0 0 1 - 0 4 9 - 0 6 7 - 0 3 7 - 0 8 6 - v m v m v m e g a t l o v w o l t u p t u o l a t i g i dl o v 0 5 2 + 0 7 + 0 5 9 1 - 0 5 9 1 - 0 5 9 1 - 0 3 6 1 - 0 3 6 1 - 0 0 6 1 - v m v m v m e g a t l o v t u p t u o d l o h s e r h tb b vl l u f5 . 1 -5 3 . 1 -2 . 1 -v ) x a m h i v = n i v ( t n e r r u c h g i h t u p n i 1 s , 0 s , e d o m v r d , n i * n i h i i h i i l l u f l l u f0 0 1 - 2 2 10 5 2a a ) n i m l i v = n i v ( t n e r r u c w o l t u p n i 1 s , 0 s , e d o m v r d , n i * n i l i i l i i l l u f l l u f0 0 1 - 0 9 5 4 - 0 5 1a a t n e r r u c y l p p u s 4 2 6 0 e d o m 2 , 1 s e d o m 5 , 3 s e d o m e e il l u f l l u f l l u f 8 2 2 4 9 2 6 6 3 0 0 3 0 8 3 5 6 4 a m a m a m t n e r r u c y l p p u s 2 2 6 0 e d o m 2 , 1 s e d o m 5 , 3 s e d o m e e il l u f l l u f l l u f 0 6 1 5 9 1 0 4 2 5 1 2 5 3 2 0 9 2 a m a m a m test conditions (unless otherwise specified): ?ecommended operating conditions?with rext1 = 1.3 k ? , rext2 = 2.94 k ? , and vee = -5.5v. all parameters specified at 0 c are guaranteed by characterization and are not production tested. the specified limits shown can be met only after thermal equilibrium has been established. thermal equilibrium is established by applying power for at least 2 minutes while maintaining a transverse air flow of 400 linear feet per minute over the device mounted either in the test socket or on the printed circuit board.
19 ? 2000 semtech corp. www .semtech.com high-performance products ate edge622/624 ac characteristics r e t e m a r a pl o b m y sn i mp y tx a ms t i n u ) 1 e t o n ( s y a l e d n o i t a g a p o r p s y a l e d m u m i n i m n i m d p t n i m d p t n i m d p t n i m d p t n i m d p t 7 . 3 3 . 6 9 . 3 3 . 6 5 . 8 2 . 5 3 . 8 4 . 5 4 . 8 3 . 1 1 7 . 6 0 . 1 1 9 . 6 1 . 1 1 5 . 4 1 s n s n s n s n s n s e g n a r t n e m t s u j d a y a l e d n i m d p t n i m d p t n i m d p t n i m d p t n i m d p t 0 . 0 1 3 . 7 1 0 . 0 1 3 . 7 1 0 . 5 2 0 . 4 1 0 . 4 2 0 . 4 1 0 . 4 2 0 . 4 3 0 . 0 2 0 . 2 3 0 . 0 2 0 . 2 3 0 . 4 4 s n s n s n s n s n t n e m t s u j d a f o e g n a r h t d i w v ) y l n o 3 r o 2 e d o m ( v 3 . 1 - o t v 1 . 0 - = h t d i w v0 . 70 . 0 10 . 3 1s n ) 2 e d o m ( o c p m e t y a l e d n o i t a g a p o r p 4 / s p o c ) % 0 8 o t % 0 2 ( s e m i t l l a f / e s i r t u p t u o ) 2 e t o n ( f t , r t0 5 25 7 30 5 8s p e d o m 0 1 2 3 5 1 s 0 0 1 1 e e v 0 s 0 1 0 1 1 y a l e d v v 1 . 0 - v 1 . 0 - v 1 . 0 - v 1 . 0 - v 1 . 0 - h t d i w v x x v 1 . 0 - v 1 . 0 - v 1 . 0 - e d o m 0 1 2 3 5 1 s 0 0 1 1 e e v 0 s 0 1 0 1 1 y a l e d v v 3 . 0 - v 3 . 0 - v 3 . 0 - v 3 . 0 - v 3 . 0 - h t d i w v x x v 3 . 0 - v 3 . 0 - v 3 . 0 - test conditions (unless otherwise specified): ?ecommended operating conditions?with ta = 25 c with 400 lfpm of airflow, vee = -5.5v, and all outputs terminated with 50 ohms to ?.0 v. timing reference points at the differential crossing points for input and output signals, rext1 = 1.3 kohm, and rext2 = 2.94 kohm. all input signals are fully differential. note 1 : all measurements refer to both rising and falling edges for modes 0, 1, and 5, and rising edges only for modes 2 and 3. drvmode is logically low. modes 2, 3, and 5 delay minimums and delay ranges are measured with vwidth = vdelay. note 2 : based upon characterization data. not production tested. the specified limits shown can be met only after thermal equilibrium has been established. thermal equilibrium is established by applying power for at least 2 minutes while maintaining a transverse air flow of 400 linear feet per minute over the device mounted either in the test socket or on the printed circuit board.
20 ? 2000 semtech corp. www .semtech.com high-performance products ?ate edge622/624 ordering information contact infor mation semtech corporation high-performance division 10021 willow creek rd., san diego, ca 92131 phone: (858)695-1808 fax (858)695-2633 r e b m u n t r a pe g a k c a p j h a 2 2 6 ec c l p n i p - 8 2 ) r e d a e r p s t a e h l a n r e t n i h t i w ( m v e 2 2 6 e g d ee l u d o m n o i t a u l a v e 2 2 6 j h a 4 2 6 e c c l p n i p - 4 4 ) r e d a e r p s t a e h l a n r e t n i h t i w ( m v e 4 2 6 e g d ee l u d o m n o i t a u l a v e 4 2 6

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