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| MP1498 high-efficiency, 2a, 16v, 1.4mhz synchronous, step-down converter MP1498 rev. 1.01 www.monolithicpower.com 1 12/18/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. the future of analog ic technology description the MP1498 is a high-frequency, synchronous, rectified, step-down, switch-mode converter with built-in internal power mosfets. it offers a very compact solution to achieve 2a continuous output current with excellent load and line regulation over a wide input supply range. the MP1498 has synchronous mode operation for higher efficiency over the output current load range. current-mode operation provides a fast transient response and eases loop stabilization. protective features include over-current protection, thermal shutdown, and external ss control. the MP1498 requires a minimal number of readily-available external components and is available in a space-saving 8-pin tsot23 package. features ? wide 4.5v-to-16v operating input range ? 100m ? /40m ? low r ds(on) internal power mosfets ? proprietary switching-loss?reduction technique ? high-efficiency synchronous mode operation ? fixed 1.4mhz switching frequency ? can synchronize to a 300khz-to-3mhz external clock ? externally-programmable soft-start ? ocp and hiccup ? thermal shutdown ? output adjustable from 0.8v ? available in an 8-pin tsot-23 package applications ? notebook systems and i/o power ? digital set-top boxes ? flat-panel televisions and monitors ? distributed power systems a ll mps parts are lead-free and adhere to the rohs directive. for mps green status, please visit mps website under products, quality assurance page. ?mps? and ?the future of analog ic technology? are registered trademarks o f monolithic power systems, inc. typical application MP1498 in en/sync vcc ss gnd fb sw bst vin en/ sync c3 0.1 f r1 40.2k r2 13k l1 2.2 h c2 22 f c4 0.1 f c1 22 f 2 5 6 7 1 3 8 4 3.3v/2a r3 20 c5 22nf r5 24k 50 55 60 65 70 75 80 85 90 95 100 0.0 0.4 0.8 1.2 1.6 2.0
MP1498 ? synchronous, step-down co nverter with internal mosfets MP1498 rev. 1.01 www.monolithicpower.com 2 12/18/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. ordering information part number* package top marking MP1498dj tsot-23-8 adu for tape & reel, add suffix ?z (e.g. MP1498dj?z); for rohs, compliant packaging, add suffix ?lf (e.g. MP1498dj?lf?z). package reference absolute maxi mum ratings (1) v in .................................................. -0.3v to 17v v sw ... -0.3v (-5v for <10ns) to 17v (19v for 5ns) v bst ........................................................ v sw +6v all other pins ................................ -0.3v to 6v (2) continuous power dissipation (t a = +25c) (3) ........................................................... 1.25w junction temperature ............................... 150c lead temperature .................................... 260c storage temperature ................. -65c to 150c recommended operating conditions (4) supply voltage v in ........................... 4.5v to 16v output voltage v out .................... 0.8v to v in ?3v operating junction temp. (t j ). -40c to +125c thermal resistance (5) ja jc tsot-23-8 ............................. 100 ..... 55 ... c/w notes: 1) exceeding these ratings may damage the device. 2) about the details of the en pin?s abs max rating, please refer to page 9, enable section. 3) the maximum allowable power dissipation is a function of the maximum junction temperature t j (max), the junction-to- ambient thermal resistance ja , and the ambient temperature t a . the maximum allowable continuous power dissipation at any ambient temperature is calculated by p d (max) = (t j (max)-t a )/ ja . exceeding the maximum allowable powe r dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. internal thermal shutdown circuitry protects the device from permanent damage. 4) the device is not guaranteed to function outside of its operating conditions. 5) measured on jesd51-7, 4-layer pcb. MP1498 ? synchronous, step-down co nverter with internal mosfets MP1498 rev. 1.01 www.monolithicpower.com 3 12/18/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. electrical characteristics v in = 12v, t a = 25c, unless otherwise noted. parameter symbol condition min typ max units supply current (shutdown) i in v en = 0v 1 a supply current (quiescent) i q v en = 2v, v fb = 1v 0.8 1 ma hs-switch on resistance hs rds-on v bst-sw =5v 100 m ? ls-switch on resistance ls rds-on v cc =5v 40 m ? switch leakage sw lkg v en = 0v, v sw =12v 1 a current limit ( 6 ) i limit under 40% duty cycle 3.4 a oscillator frequency f sw 1100 1400 1700 khz fold-back frequency f fb v fb = 0v 0.15 f sw maximum duty cycle ( 6 ) d max v fb =700mv 89 % minimum on time (6) on _ min 40 ns sync frequency range f sync 0.3 3 mhz feedback voltage v fb t a =25c 784 800 816 mv -40c MP1498 ? synchronous, step-down co nverter with internal mosfets MP1498 rev. 1.01 www.monolithicpower.com 5 12/18/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. typical performanc e characteristics performance waveforms are tested on the evaluation board in the design example section. v in =12v, v out =3.3v,l=2.2 h,t a = 25c, unless otherwise noted. 50 55 60 65 70 75 80 85 90 95 100 0.0 0.4 0.8 1.2 1.6 2.0 50 55 60 65 70 75 80 85 90 95 100 0.0 0.4 0.8 1.2 1.6 2.0 50 55 60 65 70 75 80 85 90 95 100 0.0 0.4 0.8 1.2 1.6 2.0 50 55 60 65 70 75 80 85 90 95 100 0.0 0.4 0.8 1.2 1.6 2.0 50 55 60 65 70 75 80 85 90 95 100 0.0 0.4 0.8 1.2 1.6 2.0 50 55 60 65 70 75 80 85 90 95 100 0.0 0.4 0.8 1.2 1.6 2.0 0 5 10 15 20 25 0.5 1 1.5 2 0 5 10 15 20 25 0.5 1 1.5 2 0 5 10 15 20 25 0.5 1 1.5 2 MP1498 ? synchronous, step-down co nverter with internal mosfets MP1498 rev. 1.01 www.monolithicpower.com 6 12/18/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. typical performanc e characteristics (continued) performance waveforms are tested on the evaluation board in the design example section. v in =12v, v out =3.3v,l=2.2 h,t a = 25c, unless otherwise noted. MP1498 ? synchronous, step-down co nverter with internal mosfets MP1498 rev. 1.01 www.monolithicpower.com 7 12/18/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. typical performanc e characteristics (continued) performance waveforms are tested on the evaluation board in the design example section. v in =12v, v out =3.3v,l=2.2 h,t a = 25c, unless otherwise noted. MP1498 ? synchronous, step-down co nverter with internal mosfets MP1498 rev. 1.01 www.monolithicpower.com 8 12/18/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. pin functions package pin # name description 1 ss soft-start. connect an external capacitor to program the soft start time for the switch- mode regulator. 2 in supply voltage. the in pin supplies power for internal mosfet and regulator. the MP1498 operates from a +4.5v to +16v input rail. requires a low-esr, and low- inductance capacitor (c1) to decouple the input rail. place the input capacitor very close to this pin and connect it with wide pcb traces and multiple vias. 3 sw switch output. connect this pin to the inductor and bootstrap capacitor. this pin is driven up to the vin voltage by the high-side switch during the pwm duty cycle on time. the inductor current drives the sw pin negativ e during the off time. the low-side switch?s on-resistance and the internal body diode fix the negative voltage. use wide pcb traces and multiple vias. 4 gnd system ground. the regulated output voltage reference ground. connect to gnd with copper and vias. 5 bst bootstrap. connect a capacit or between sw and bst pins to form a floating supply across the high-side switch driver. 6 en/sync enable. en=high to enable the MP1498. apply an external clock to change the switching frequency. for automatic start-up, connect en pin to v in with 100k ? resistor. 7 vcc internal 5v ldo output. powers the driver and control circuits. decouple with a 0.1 f- 0.22 f capacitor. avoid capacitor values that exceed 0.22 f. 8 fb feedback. an external resistor divider from t he output to gnd, tapped to the fb pin, sets the output voltage. the comparator lowers t he oscillator frequency linearly with the fb voltage. it is recommended to place the resistor divider as close to fb pin as possible. avoid placing vias on the fb traces. MP1498 ? synchronous, step-down co nverter with internal mosfets MP1498 rev. 1.01 www.monolithicpower.com 9 12/18/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. block diagram 50pf 1meg 6.5v bst rsen in oscillator vcc regulator boost regulator vcc currrent sense amplifer vcc current limit comparator error amplifier reference en/sync ss + + - + - + - fb sw gnd ls driver hs driver comparator on time control logic control 1pf 400k figure 1: functional block diagram MP1498 ? synchronous, step-down co nverter with internal mosfets MP1498 rev. 1.01 www.monolithicpower.com 10 12/18/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. operation the MP1498 is a high-frequency, synchronous, rectified, step-down, switch-mode converter with built-in power mosfets. it offers a very compact solution to achieve a continuous 2a output current with excellent load and line regulation over a wide input supply range. the MP1498 operates in a fixed-frequency, peak-current?control mode to regulate the output voltage. the internal clock initiates a pwm cycle. the integrated high-side power mosfet turns on and remains on until its current reaches the value set by the comp voltage. when the power switch is off, it remains off until the next clock cycle starts. if the current in the power mosfet does not reach the comp set current value within 89% of one pwm period, the power mosfet will be forced to turn off. the high-side power mosfet has an 80ns minimum off time to refresh the bst voltage. internal regulator the 5v internal regulator powers most of the internal circuitries. this regulator takes the v in input and operates in the full v in range. when v in exceeds 5.0v, the output of the regulator is in full regulation. when v in is below 5.0v, the output decreases and requires a 0.1f ceramic decoupling capacitor. error amplifier the error amplifier compares the fb pin voltage to the internal 0.8v reference (ref) and outputs a current proportional to the difference between the two. this output current then charges or discharges the internal compensation network to form the comp voltage, which is used to control the power mosfet current. the optimized internal compensation network minimizes the external component counts and simplifies the control loop design. enable/sync control en is a digital control pin that turns the regulator on and off. drive en high to turn on the regulator, drive it low to turn it off after a 5 s delay. an internal 1m ? resistor from en to gnd allows en to float to shut down the chip. the en pin is clamped internally using a 6.5v series-zener-diode as shown in figure 2. connecting the en pin through a pullup resistor to any voltage connected to v in limits the en input current to less than 100a. for example, when connecting v in to a 12v source, r pullup [(12v?6.5v) 100a = 55k ? ]. connecting the en pin directly to a voltage source without any pullup resistor requires limiting the amplitude of the voltage source to below 6.5v to prevent damaging the zener diode. en/sync en logic gnd zener 6.5v-typ figure 2: zener diode circuit for external clock synchronization, connect a clock with a frequency range of 300khz to 3mhz after setting the output voltage: the internal clock rising edge will synchronize with the external clock?s rising edge. select an external clock signal with a pulse-width less than 700ns. under-voltage lockout the MP1498 has under-voltage lockout (uvlo) protection. when vcc exceeds the uvlo rising threshold voltage, the MP1498 powers up. it shuts off when the vcc voltage falls below the uvlo falling threshold voltage. this is non-latch protection. the MP1498 is disabled when the input voltage falls below 3.25v. if an application requires a higher uvlo, use the en pin as shown in figure 3 to adjust the input voltage uvlo by using two external resistors. for best results, use the enable resistors to set the uvlo falling threshold (vstop) above 4.5v. set the rising threshold (vstart) to provide enough hysteresis to allow for any input supply variations. MP1498 ? synchronous, step-down co nverter with internal mosfets MP1498 rev. 1.01 www.monolithicpower.com 11 12/18/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. figure 3: adjustable uvlo external soft-start the MP1498 employs a soft-start (ss) mechanism to smooth the output during power- up. when the en pin goes high, an internal current source (14 a) charges the ss capacitor. the ss capacitor voltage overtakes the ref voltage to the pwm comparator. the output voltage smoothly ramps up with the ss voltage. once the ss voltage reaches the same level as the ref voltage, it keeps ramping up while v ref takes over the pwm comparator. at this point, the soft-start finishes and the device enters steady state operation. if the output is pre-biased to a certain voltage during startup, the ic will disable the high-side and low-side switches until the voltage on the internal soft-start capacitor exceeds the sensed output voltage at the fb pin. the ss capacitor value can be determined as follows: ss ss ss ref (ms) i ( a) c(nf) v(v) ??? ? (1) if the output capacitors have large capacitances, avoid setting a short ss time to avoid hitting the current limit during ss. use a minimum value of 4.7nf if the output capacitance value is larger than 330 f. over-current protection and hiccup the MP1498 has a cycle-by-cycle over-current limit that protects against the inductor current peak value exceeding the set current limit threshold. under-voltage protection (uvp) triggers if the fb voltage drops below the under-voltage (uv) threshold?typically 50% below the reference. once uvp triggers, the MP1498 enters hiccup mode to periodically restart the part. this protection mode is especially useful when the output is dead- shorted to ground. the average short-circuit current falls to alleviate thermal issues and to protect the regulator. the MP1498 exits hiccup mode once the over-current condition is removed. thermal shutdown thermal shutdown prevents the chip from operating at exceedingly high temperatures. when the silicon die temperature exceeds 150c, it shuts down the whole chip. when the temperature drops below its lower threshold (typically 130c) the chip is enabled again. floating driver and bootstrap charging an external bootstrap capacitor powers the floating power mosfet driver. this floating driver has its own uvlo protection with a rising threshold of 2.2v and a hysteresis of 150mv. the bootstrap capacitor voltage is regulated internally by v in through d1, m1, r3, c4, l1 and c2 (figure 4). if (v in -v sw ) exceed 5v, u1 will regulate m1 to maintain a 5v bst voltage across c4. a 20 ? resistor placed between sw and bst cap is strongly recommended to reduce sw spike voltage. r3 figure 4: internal bootstrap charging circuit MP1498 ? synchronous, step-down co nverter with internal mosfets MP1498 rev. 1.01 www.monolithicpower.com 12 12/18/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. startup and shutdown if both v in and en exceed their respective thresholds, the chip starts. the reference block starts first, generating stable reference voltage and currents, and then the internal regulator is enabled. the regulator provides stable supply for the remaining circuitries. the frequency needs to fold-back linearly with fb so v out starts up smoothly. three events can shut down the chip: en low, v in low, and thermal shutdown. for the shutdown procedure, the signaling path is first blocked to avoid any fault triggering. the comp voltage and the internal supply rail are then pulled down. the floating driver is not subject to this shutdown command. MP1498 ? synchronous, step-down co nverter with internal mosfets MP1498 rev. 1.01 www.monolithicpower.com 13 12/18/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. application information setting the output voltage the external resistor divider sets the output voltage (see typical application on page 1). the feedback resistor (r1) sets the feedback loop bandwidth in conjunction with the internal compensation capacitor. r2 is then: out r1 r2 v 1 0.8v ? ? the t-type network shown in figure 5 is highly recommended. rt cf figure 5: t-type network table 1 lists the recommended t-type resistors value for common output voltages. table 1: resistor values for common output voltages v out (v) r1(k ? ) r2(k ? ) rt(k ? ) cf(pf) l(h) 1 20.5 84.5 140 0 1 1.2 30.1 61.9 140 0 1 1.8 40.2 32.4 59 15 1.5 2.5 40.2 19.1 43 15 1.5 3.3 40.2 13 24 15 2.2 5 40.2 7.68 24 15 2.2 selecting the inductor use a 1h-to-10h inductor with a dc current rating of at least 25% percent higher than the maximum load current for most applications. for highest efficiency, select an inductor with a dc resistance less than 15m ? . for most designs, calculate the inductance value as: out in out 1 in l osc v(vv) l vif ?? ? ?? ? where i l is the inductor ripple current. choose an inductor ripple current to be approximately 30% of the maximum load current. the maximum inductor peak current is: 2 i i i l load ) max ( l ? ? ? use a larger inductance for improved light-load efficiency. selecting the input capacitor the input current to the step-down converter is discontinuous, therefore requires a capacitor supply the ac current to the step-down converter while maintaining the dc input voltage. use low-esr capacitors for the best performance, such as ceramic capacitors with x5r or x7r dielectrics that have low esr and small temperature coefficients. for most applications, use a 22f capacitor. the input capacitor (c1) requires an adequate ripple current rating because it absorbs the input switching current. estimate the rms current in the input capacitor as: ? ? ? ? ? ? ? ? ? ? ? ? in out in out load 1 c v v 1 v v i i the worst-case condition occurs at v in =2v out , where: 2 i i load 1 c ? for simplification, choose the input capacitor with an rms current rating greater than half of the maximum load current. the input capacitor can be electrolytic, tantalum or ceramic. when using electrolytic or tantalum capacitors, place a small, high-quality, ceramic capacitor?e.g. 0.1 f?as close to the ic as possible. when using ceramic capacitors, make sure that they have enough capacitance to prevent excessive input voltage ripple. estimate the input voltage ripple caused by the capacitance as: load out out in in sin iv v v1 fc1v v ?? ?? ? ?? ?? ? ?? MP1498 ? synchronous, step-down co nverter with internal mosfets MP1498 rev. 1.01 www.monolithicpower.com 14 12/18/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. selecting the output capacitor the output capacitor (c2) maintains the dc output voltage. use ceramic, tantalum, or low- esr electrolytic capacitors. low esr capacitors are preferred to keep the output voltage ripple low. the output voltage ripple can be estimated by: out out out esr s1 in s vv 1 v1r fl v 8fc2 ?? ?? ?? ?? ? ? ?? ?? ??? ?? ?? where l 1 is the inductor value and r esr is the equivalent series resistance of the output capacitor. for ceramic capacitors, the capacitance dominates the impedance at the switching frequency. the capacitance also causes the majority of the output voltage ripple. for simplification, estimate the output voltage ripple as: out out out 2 in s1 vv v1 v 8f l c2 ?? ??? ?? ??? ?? for tantalum or electrolytic capacitors, the esr dominates the impedance at the switching frequency. for simplification, the output ripple can be approximated as: out out out esr in s1 vv v1r fl v ?? ???? ?? ? ?? the characteristics of the output capacitor also affect the stability of the regulation system. the MP1498 can be optimized for a wide range of capacitance and esr values. external bootstrap diode an external bootstrap diode can enhance the efficiency of the regulator, given the following conditions: ? v out is 5v or 3.3v; and ? duty cycle is high: d= in out v v >65% in these cases, connect an external bst diode from the vcc pin to bst pin, as shown in figure 6 MP1498 figure 6: optional external bootstrap diode to enhance efficiency the recommended external bst diode is in4148, and the bst capacitor is 0.1f to 1 f. pc board layout (8) pcb layout is very important to achieve stable operation especially for vcc capacitor and input capacitor placement. for best results, follow these guidelines: 1) connect the gnd pin directly to a large ground plane. add vias near the gnd pin if the bottom layer is a ground plane. 2) place the vcc capacitor as close to the vcc and gnd pins as possible. make the trace length of the vcc pin vcc capacitor anode \ vcc capacitor cathode ic gnd pin as short as possible. 3) place the ceramic input capacitor close to in and gnd pins. keep the connection of input capacitor and in pin as short and wide as possible. 4) route sw, bst net away from sensitive analog areas such as fb. avoid routing the sw, bst trace under the ic. 5) place the t-type feedback resistor (r5) close to chip to ensure that the trace to the fb pin is as short as possible. notes: 8) the recommended layout is based on the figure 7 typical application circuit on the next page. MP1498 ? synchronous, step-down co nverter with internal mosfets MP1498 rev. 1.01 www.monolithicpower.com 15 12/18/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. 8 7 6 5 l1 c2 c1 c1a r4 r2 r3 c4 c5 c6 1 2 3 4 vin gnd vout sw gnd gnd sw en/sync bst c3 r1 r5 gnd vout design example below is a design example following the application guidelines for the specifications: table 2: design example v in 12v v out 3.3v io 2a figure 8 shows the detailed application schematic. the typical performance and circuit waveforms have been shown in the typical performance characteristics section. for more device applications, please refer to the related evaluation board datasheets. MP1498 ? synchronous, step-down co nverter with internal mosfets MP1498 rev. 1.01 www.monolithicpower.com 16 12/18/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. typical application circuits vcc 25v c1a c1 25v c5 c6 gnd gnd gnd gnd ss en/sync vin 100k r4 gnd gnd vout 20 r3 c4 c2 15pf c3 l1 40.2k r1 7.68k r2 gnd gnd gnd 24k r5 5v /2a 2 7 1 6 5 3 8 4 bst sw en/sync vcc in MP1498 gnd fb ss figure 7: v in =12v, 5v/2a output vcc 25v c1a c1 25v c5 c6 gnd gnd gnd gnd ss en/sync vin 100k r4 gnd gnd vout 20 r3 c4 c2 15pf c3 l1 40.2k r1 13k r2 gnd gnd gnd 24k r5 3.3v /2a 2 7 1 6 5 3 8 4 bst sw en/sync vcc in MP1498 gnd fb ss figure 8: v in =12v, 3.3v/2a output vcc 25v c1a c1 25v c5 c6 gnd gnd gnd gnd ss en/sync vin 100k r4 gnd gnd vout 20 r3 c4 c2 15pf c3 l1 40.2k r1 19.1k r2 gnd gnd gnd 43k r5 2.5v /2a 2 7 1 6 5 3 8 4 bst sw en/sync vcc in MP1498 gnd fb ss figure 9: v in =12v, 2.5v/2a output MP1498 ? synchronous, step-down co nverter with internal mosfets MP1498 rev. 1.01 www.monolithicpower.com 17 12/18/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. vcc 25v c1a c1 25v c5 c6 gnd gnd gnd gnd ss en/sync vin 100k r4 gnd gnd vout 20 r3 c4 c2 15pf c3 l1 40.2k r1 32.4k r2 gnd gnd gnd 59k r5 1.8v /2a 2 7 1 6 5 3 8 4 bst sw en/sync vcc in MP1498 gnd fb ss figure 10: v in =12v, 1.8v/2a output vcc 25v c1a c1 25v c5 c6 gnd gnd gnd gnd ss en/sync vin 100k r4 gnd gnd vout 20 r3 c4 c2 l1 30.1k r1 61.9k r2 gnd gnd gnd 140k r5 1.2v /2a 2 7 1 6 5 3 8 4 bst sw en/sync vcc in MP1498 gnd fb ss figure 11: v in =12v, 1.2v/2a output vcc 25v c1a c1 25v c5 c6 gnd gnd gnd gnd ss en/sync vin 100k r4 gnd gnd vout 20 r3 c4 c2 l1 20.5k r1 84.5k r2 gnd gnd gnd 140k r5 1v /2a 2 7 1 6 5 3 8 4 bst sw en/sync vcc in MP1498 gnd fb ss figure 12: v in =12v, 1v/2a output MP1498 ? synchronous step-down converter with internal mosfets notice: the information in this document is subject to change wi thout notice. users should warra nt and guarantee that third party intellectual property rights are not infringed upon w hen integrating mps products into any application. mps will not assume any legal responsibility for any said applications. MP1498 rev. 1.01 www.monolithicpower.com 18 12/18/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. package information tsot23-8 front view note: 1) all dimensions are in millimeters. 2) package length does not include mold flash, protrusion or gate burr. 3) package width does not include interlead flash or protrusion. 4) lead coplanarity (bottom of leads after forming) shall be 0.10 millimeters max. 5) jedec reference is mo-193, variation ba. 6) drawing is not to scale. 7) pin 1 is lower left pin when reading top mark from left to right, (see example top mark) top view recommended land pattern seating plane side view detail ''a'' see detail ''a'' pin 1 id see note 7 example top mark |
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