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| Datasheet File OCR Text: |
| [ AK8128S ] ms1433 - j - 00 2012/06 - 1 - ak8 1 2 8 s multi clock generator AK8128S ? pll ig??` ic ? 27 mhz ?? ?????????k??? ? ? ???????????? L ??R 2.85 v C 3. 6 v M 8 ma typ . ?o??r ?? 27.000 mhz ?? clk 1 24.000 / 24.576/ 5 4.000mhz clk 2 74.1758/74.250 mhz ? clk 1 - 2 15pf ?? period jitter clk1 - 2 30ps typ.(1 ? ) long term jitter clk1 150ps typ.(1 ? ) clk2 100ps typ.(1 ? ) ??` 10pin tmsop ( U?` ) ? N`? d tv d vd b d hdd ?` O?
[ AK8128S ] ms1433 - j - 00 2012/06 - 2 - ?? h ? test vdd1 - 2 clk1 pll1 vss1 - 2 clkin clk2 s1 gnd s0 gnd divide logic & output control pll2 vdd vdd test vdd1 - 2 clk1 pll1 vss1 - 2 clkin clk2 s1 gnd s0 gnd divide logic & output control pll2 vdd vdd vdd 1:vdd2 2:vss2 3:clkin 4:vss1 5:vdd1 1 0:clk2 9:test 8:s0 7:s1 6 :clk1 1:vdd2 2:vss2 3:clkin 4:vss1 5:vdd1 1 0:clk2 9:test 8:s0 7:s1 6 :clk1 [ AK8128S ] ms1433 - j - 00 2012/06 - 3 - ?Ch ? ( ? ) h 1 vdd 2 ( pwr ) ? 2 vss2 (pwr) gnd 3 clkin (di) ?? table 1 ? 4 vss1 (pwr) gnd 5 vdd1 ( pwr ) ? 6 clk1 (do) ? 1 table 1 ? 7 s 1 (di) ? O table 1 ? ? ? ? 400 k ? 8 s 0 (di) ? O table 1 ? ???? 400 k ?? 400 k ? 9 test (di) gnd ???A ?? 400 k ? 10 clk2 (do) ? 2 tab le 1 ? pwr ? di ? do ? ?O?`? table 1: clk1 - 2 clock output frequency selection pin clock input frequency (mhz) clock output frequency (mhz) s 0 (pin 8 ) s 1 (pin 7 ) clkin (pin 3) clk1 (pin 6) clk2 (pin 10) l l 27.000 24.576 74.1758 l h (open) 27.000 24.576 74.250 m (open) l 27.000 24.000 74.1758 m (open) h (open) 27.000 24. 000 74.250 h l 27.000 54.000 74.1758 h h (open) 27.000 54.000 74.250 [ AK8128S ] ms1433 - j - 00 2012/06 - 4 - ?? ~?? ? ? g q ??R ? ? ?R ? ? ?? ??????????? ????^? ? ? g q ? ??R ? ?? vdd1 - 2 ????? gnd g 0.1 f ????? ?? M vdd= 2.85 3.6 v, ta - 4 0 85 ? ? g q M ?o??r *2 s[1:0] = hh r [ AK8128S ] ms1433 - j - 00 2012/06 - 5 - vdd 2.85 3.6v ta - 40 85 ? g q ?????R ? ?????R ? ? ?????R ? ?????R ? ? ?????R ? ? ??? ??? ??? ??? ??? ? ??? ? ?????R ?????R ? ?? ic ?? + ?? [ AK8128S ] ms1433 - j - 00 2012/06 - 6 - vdd 2.85 3. 6 v ta - 4 0 85 ? g q ?? ? ??????????? ? ?rg rg ??????????? ??????????? ????? ??????????? ???rg w?rg O? * 2 10000 ?? * 3 ? vdd ?R_ ?? 0.1% ? ??rg * 4 74.1758/74.250[mhz] g?r ?? 20ppm ???rg [ AK8128S ] ms1433 - j - 00 2012/06 - 7 - ??A figure 1 : typical connection diagram c1 - 2 : 0.1 ? f ? sw0 : clk1 - 2 ?O?`???O??????i ? h vdd ? m _?? l gnd ??A sw1 : clk1 - 2 ?O?`???O?????i? h _?? l gnd ??A AK8128S +3.3v typ . gnd sw0 1:vdd2 2:vss2 3:clkin 4:vss1 5:vdd1 10:clk2 9:test 8:s0 7:s1 6:clk1 external clock sw1 c1 c2 clk2 clk1 AK8128S +3.3v typ . gnd sw0 1:vdd2 2:vss2 3:clkin 4:vss1 5:vdd1 10:clk2 9:test 8:s0 7:s1 6:clk1 external clock sw1 c1 c2 clk2 clk1 [ AK8128S ] ms1433 - j - 00 2012/06 - 8 - ??`?? g? 10 tmsop 0 . 1 2 7 + 0 . 1 - 0 . 0 5 4 . 0 0 . 2 0 . 5 5 0 . 2 0 b 10b 0.20.1 1 5 6 10 2.90.2 2 . 8 0 . 1 + 0 . 1 - 0 . 0 5 1 . 0 m a x 0.5 s 0.1 m 0.1 s [ AK8128S ] ms1433 - j - 00 2012/06 - 9 - ?`?? ?? ? ?`???` 12 8 s ?` xxx 3 ? xxx 128s 6 8 10 [ AK8128S ] ms1433 - j - 00 2012/06 - 10 - ?d?u??u???????u??? ????????H???d Q????I???s?I?_J ?d? x? ???vB? ? u??h??CO??? ?d ? x? ??? vB?? ???????d? x? ? ?vB????????? p ???????????????? I ????????? ?du??Q???Y????? ???H????S?? ? C??C?C???C ????g???]?b???p??? ?????O??m??????u??? ??????????? ?????u???????? p????????? ??? ??????o???u???? ??p?????????a?? ? ?? |
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