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| features ? 0.6a maximum peak output current ? 0.5 a minimum peak output current ? 15 kv/s minimum common mode rejection (cmr) at v cm = 1500 v ? 1.0 v maximum low level output voltage (v ol ) eliminates need for negative gate drive ? i cc = 5 ma maximum supply current ? under voltage lock-out protection (uvlo) with hysteresis ? wide operating v cc range: 15 to 30 volts ? 0.5 s maximum propagation delay ? +/C 0.35 s maximum delay between devices/channels ? industrial temperature range: -40c to 100c ? hcpl-315j: channel one to channel two output isolation = 1500 vrms/1 min. ? safety and regulatory approval: ul recognized (ul1577), 3750 vrms/1 min. iec/en/din en 60747-5-2 approved v iorm = 630 v peak (hcpl-3150 option 060 only) v iorm = 891 v peak (hcpl-315j) csa certifed caution: it is advised that normal static precautions be taken in handling and assembly of this component to prevent damage and/or degradation which may be induced by esd. a 0.1 f bypass capacitor must be connected between the v cc and v ee pins for each channel. functional diagram 1 3 shield 2 4 8 6 7 5 n/c cathode anode n/c v cc v o v o v ee hcpl-3150 1 3 shiel d 2 8 16 14 15 9 n/c cathode anode n/c v cc v ee v o v ee 7 6 10 11 cathode anode v o v cc shiel d hcpl-315j description the hcpl-315x consists of an led optically coupled to an integrated circuit with a power output stage. this optocoupler is ideally suited for driving power igbts and mosfets used in motor control inverter applica tions. the high operating voltage range of the output stage pr o vides the drive voltages required by gate controlled devices. the voltage and current supplied by this opto - coupler makes it ideally suited for directly driving igbts with ratings up to 1200 v/50 a. for igbts with higher rat - ings, the hcpl-3150/315j can be used to drive a discrete power stage which drives the igbt gate. applications ? isolated igbt/mosfet gate drive ? ac and brushless dc motor drives ? industrial inverters ? switch mode power supplies (smps) ? uninterruptable power supplies (ups) truth table v cc - v ee v cc - v ee positive going negative-going led (i.e., turn-on) (i.e., turn-of) v o off 0 - 30 v 0 - 30 v low on 0 - 11 v 0 - 9.5 v low on 11 - 13.5 v 9.5 - 12 v transition on 13.5 - 30 v 12 - 30 v high hcpl-3150 (single channel), hcpl-315j (dual channel) 0.5 amp output current igbt gate drive optocoupler data sheet lead (pb) free rohs 6 fully compliant rohs 6 fully compliant options available; -xxxe denotes a lead-free product
2 ordering information hcpl-3150 and hcpl-315j are ul recognized with 3750 vrms for 1 minute per ul1577. part number option package surface mount gull wing tape & reel iec/en/din en 60747-5-2 quantity rohs compliant non rohs compliant hcpl-3150 -000e no option 300 mil dip-8 50 per tube -300e #300 x x 50 per tube -500e #500 x x x 1000 per reel -060e #060 x 50 per tube -360e #360 x x x 50 per tube -560e #560 x x x x 1000 per reel hcpl-315j -000e no option so-16 x x 45 per tube -500e #500 x x x 850 per reel to order, choose a part number from the part number column and combine with the desired option from the option column to form an order entry. example 1: hcpl-3150-560e to order product of 300 mil dip gull wing surface mount package in tape and reel packaging with iec/en/din en 60747-5-2 safety approval in rohs compliant. example 2: hcpl-3150 to order product of 300 mil dip package in tube packaging and non rohs compliant. option datasheets are available. contact your avago sales representative or authorized distributor for information. remarks: the notation #xxx is used for existing products, while (new) products launched since 15th july 2001 and rohs compliant option will use -xxxe. selection guide: invertor gate drive optoisolators package type 8-pin dip (300 mil) widebody (400 mil) small outline so-16 part number hcpl-3150 hcpl-3120 hcpl-j312 hcpl-j314 hcnw-3120 hcpl-315j hcpl-316j hcpl-314j number of channels 1 1 1 1 1 2 1 2 iec/en/din en 60747-5-2 approvals v iorm 630 vpeak option 060 v iorm 891vpeak v iorm 1414 vpeak v iorm 891 vpeak ul approval 3750 vrms/1 min. 3750 vrms/1 min. 5000 vrms/1min. 3750 vrms/1 min. output peak current 0.5a 2a 2a 0.4a 2a 0.5a 2a 0.4a cmr (minimum) 15 kv/s 10 kv/s 15 kv/s 10 kv/s uvlo yes no yes no fault status no yes no 3 package outline drawings standard dip package 9.40 (0.370) 9.90 (0.390) pin one 1.78 (0.070) max. 1.19 (0.047) max. a 3150 z yyw w date code 0.76 (0.030) 1.40 (0.055) 2.28 (0.090) 2.80 (0.110) 0.51 (0.020) min. 0.65 (0.025) max. 4.70 (0.185) max. 2.92 (0.115) min. 6.10 (0.240) 6.60 (0.260) 0.20 (0.008) 0.33 (0.013) 5 typ. 7.36 (0.290) 7.88 (0.310) 1 2 3 4 8 7 6 5 5 6 7 8 4 3 2 1 gnd1 v dd1 v in + v in ? gnd2 v dd2 v out + v out? pin diagram pin one dimensions in millimeters and (inches). * marking code letter for option numbers. "v" = option 060. option numbers 300 and 500 not marked. option code* note: floating lead protrusion is 0.25 mm (10 mils) max. 3.56 0.13 (0.140 0.005) package outline drawings gull-wing surface-mount option 300 0.635 0.25 (0.025 0.010) 12 nom. 0.20 (0.008) 0.33 (0.013) 9.65 0.25 (0.380 0.010) 0.635 0.130 (0.025 0.005) 7.62 0.25 (0.300 0.010) 5 6 7 8 4 3 2 1 9.65 0.25 (0.380 0.010) 6.350 0.25 (0.250 0.010) molded 1.080 0.320 (0.043 0.013) 1.780 (0.070) max. 1.19 (0.047) max. 2.540 (0.100) bsc dimensions in millimeters (inches). tolerances (unless otherwise specified): lead coplanarity maximum: 0.102 (0.004) xx.xx = 0.01 xx.xxx = 0.005 a 3150 z yyw w *marking code letter for optio n numbers. "v" = option 060. option numbers 300 and 500 not marked. option code* 1.016 (0.040) 1.27 (0.050) 10.9 (0.430) 2.0 (0.080) land pattern recommendatio n 3.56 0.13 (0.140 0.005) note: floating lead protrusion is 0.25 mm (10 mils) max. 4 16 - lead surface mount hcpl-315j 10.36 0.20 (0.408 0.008) (0.295 0.004) 7.49 0.10 (0.406 0.007) 10.31 0.18 (0.138 0.005) 3.51 0.13 (0.018) 0.457 (0.050) 1.27 9 16 15 14 11 10 9 1 2 3 6 7 8 view fro m pin 16 view fro m pin 1 (0.025 min.) 0.64 (0.408 0.008) 10.36 0.20 (0.0091 ? 0.0125) 0.23 ? 0.32 (0.345 0.008) 8.76 0.20 all leads to be coplanar (0.002 inches) 0.05 mm. dimensions in (inches) and millimeters. 0 - 8 v cc1 v o1 gnd 1 v cc2 v o2 gnd 2 nc v in 1 v 1 v in 2 v 2 nc (0.004 ? 0.011) 0.10 ? 0.30 standoff note: floating lead protrusion is 0.25 mm (10 mils) max. (0.458) 11.63 (0.085) 2.16 (0.025) 0.64 land pattern recommendatio n 5 regulatory information the hcpl-3150 and hcpl-315j have been approved by the following organizations: solder refow thermal profle 0 time (seconds) temperature (c) 200 100 50 150 100 200 250 300 0 30 sec. 50 sec. 30 sec. 160c 140c 150c peak temp . 245c peak temp . 240c peak temp. 230c soldering tim e 200c preheating tim e 150c, 90 + 30 sec. 2.5c 0.5c/sec. 3c + 1c/?0.5c tight typical loos e room temperature preheating rate 3c + 1c/?0.5c/sec. reflow heating rate 2.5c 0.5c/sec. recommended pb-free ir profle 217 c ramp-d ow n 6 c/sec. max. ramp-u p 3 c/sec . max . 150 - 200 c 260 +0/-5 c t 25 c to pea k 60 to 150 sec. 20-40 sec. time w ithin 5 c of ac tu al peak tempera t ure t p t s prehea t 60 to 180 sec. t l t l t smax t smin 25 t p tim e tempera ture no tes: the time fr om 25 c to peak tempera ture = 8 minutes max. t smax = 200 c, t smin = 150 c note: non-halide fux should be used. note: non-halide fux should be used. iec/en/din en 60747-5-2 approved under: iec 60747-5-2:1997 + a1:2002 en 60747-5-2:2001 + a1:2002 din en 60747-5-2 (vde 0884 teil 2):2003-01. (option 060 and hcpl-315j only) ul recognized under ul 1577, component recognition program, file e55361. csa approved under csa component acceptance notice #5, file ca 88324. 6 iec/en/din en 60747-5-2 insulation characteristics description symbol hcpl-3150#060 hcpl-315j unit installation classifcation per din vde 0110/1.89, table 1 for rated mains voltage 150 vrms i - iv for rated mains voltage 300 vrms i - iv i - iv for rated mains voltage 600 vrms i - iii i - iii climatic classifcation 55/100/21 55/100/21 pollution degree (din vde 0110/1.89) 2 2 maximum working insulation voltage v iorm 630 891 vpeak input to output test voltage, method b* v iorm x 1.875 = v pr , 100% production test with t m = 1 sec, v pr 1181 1670 vpeak partial discharge < 5 pc input to output test voltage, method a* v iorm x 1.5 = v pr , type and sample test, t m = 60 sec, v pr 945 1336 vpeak partial discharge < 5 pc highest allowable overvoltage* v iotm 6000 6000 vpeak (transient overvoltage t ini = 10 sec) safety-limiting values C maximum values allowed in the event of a failure, also see figure 37, thermal derating curve. case temperature t s 175 175 c input current i s, input 230 400 ma output power p s, output 600 1200 mw insulation resistance at t s , v io = 500 v r s 10 9 10 9 ? *refer to the front of the optocoupler section of the current catalog, under product safety regulations section iec/en/din en 60747-5-2, for a detailed description of method a and method b partial discharge test profles. note: isolation characteristics are guaranteed only within the safety maximum ratings which must be ensured by protective circuits in application. 7 recommended operating conditions parameter symbol min. max. units power supply voltage (v cc - v ee ) 15 30 volts input current (on) i f(on) 7 16 ma input voltage (off) v f(off) -3.6 0.8 v operating temperature t a -40 100 c absolute maximum ratings parameter symbol min. max. units note storage temperature t s -55 125 c operating temperature t a -40 100 c average input current i f(avg) 25 ma 1, 16 peak transient input current i f(tran) 1.0 a (<1 s pulse width, 300 pps) reverse input voltage v r 5 volts high peak output current i oh(peak) 0.6 a 2, 16 low peak output current i ol(peak) 0.6 a 2, 16 supply voltage (v cc - v ee ) 0 35 volts output voltage v o(peak) 0 v cc volts output power dissipation p o 250 mw 3, 16 total power dissipation p t 295 mw 4, 16 lead solder temperature 260c for 10 sec., 1.6 mm below seating plane solder refow temperature profle see package outline drawings section insulation and safety related specifcations parameter symbol hcpl-3150 hcpl-315j units conditions minimum external l(101) 7.1 8.3 mm measured from input terminals air gap to output terminals, shortest (external clearance) distance through air. minimum external l(102) 7.4 8.3 mm measured from input terminals tracking to output erminals, shortest (external creepage) distance path along body. minimum internal 0.08 0.5 mm through insulation distance plastic gap conductor to conductor. (internal clearance) tracking resistance cti 175 175 volts din iec 112/vde 0303 part 1 (comparative tracking index) isolation group iiia iiia material group (din vde 0110, 1/89, table 1) option 300 - surface mount classifcation is class a in accordance wtih cecc 00802. 8 electrical specifcations (dc) over recommended operating conditions (t a = -40 to 100c, i f(on) = 7 to 16 ma, v f(off) = -3.6 to 0.8 v, v cc = 15 to 30 v, v ee = ground, each channel) unless otherwise specifed. parameter symbol min. typ.* max. units test conditions fig. note high level i oh 0.1 0.4 a v o = (v cc - 4 v) 2, 3, 5 0.5 v o = (v cc - 15 v) 2 low level i ol 0.1 0.6 a v o = (v ee + 2.5 v) 5, 6, 5 0.5 v o = (v ee + 15 v) 2 high level output v oh (v cc - 4) (v cc - 3) v i o = -100 ma 1, 3, 6, 7 voltage 19 low level output v ol 0.4 1.0 v i o = 100 ma 4, 6, voltage 20 high level i cch 2.5 5.0 ma output open, 7, 8 16 supply current i f = 7 to 16 ma low level i ccl 2.7 5.0 ma output open, supply current v f = -3.0 to +0.8 v threshold input i flh 2.2 5.0 ma hcpl-3150 i o = 0 ma, 9, 15, current low to high 2.6 6.4 hcpl-315j v o > 5 v 21 threshold input v fhl 0.8 v voltage high to low input forward voltage v f 1.2 1.5 1.8 v hcpl-3150 i f = 10 ma 16 1.6 1.95 hcpl-315j temperature ?v f /?t a -1.6 mv/c i f = 10 ma coefcient of forward voltage input reverse bv r 5 v hcpl-3150 i r = 10 a breakdown voltage 3 hcpl-315j i r = 10 a input capacitance c in 70 pf f = 1 mhz, v f = 0 v uvlo threshold v uvlo+ 11.0 12.3 13.5 v v o > 5 v, 22, v uvlo- 9.5 10.7 12.0 i f = 10 ma 36 uvlo hysteresis uvlo hys 1.6 v *all typical values at t a = 25c and v cc - v ee = 30 v, unless otherwise noted. output current 17 18 output current 9 switching specifcations (ac) over recommended operating conditions (t a = -40 to 100c, i f(on) = 7 to 16 ma, v f(off) = -3.6 to 0.8 v, v cc = 15 to 30 v, v ee = ground, each channel) unless otherwise specifed. parameter symbol min. typ.* max. units test conditions fig. note propagation delay t plh 0.10 0.30 0.50 s rg = 47 ?, 10, 11, 14 time to high cg = 3 nf, 12, 13, output level f = 10 khz, 14, 23 duty cycle = 50% propagation delay t phl 0.10 0.3 0.50 s time to low output level pulse width pwd 0.3 s 15 distortion propagation delay pdd -0.35 0.35 s 34, 36 10 diference between (t phl - t plh ) any two parts or channels rise time t r 0.1 s 23 fall time t f 0.1 s uvlo turn on t uvlo on 0.8 s v o > 5 v, 22 delay i f = 10 ma uvlo turn of t uvlo off 0.6 s v o < 5 v, delay i f = 10 ma output high level |cm h | 15 30 kv/s t a = 25c, 24 11, 12 common mode i f = 10 to 16 ma, transient v cm = 1500 v, immunity v cc = 30 v output low level |cm l | 15 30 kv/s t a = 25c, 11, 13 common mode v cm = 1500 v, transient v f = 0 v, immunity v cc = 30 v 10 notes: 1. derate linearly above 70c free-air temperature at a rate of 0.3 ma/c. 2. maximum pulse width = 10 s, maximum duty cycle = 0.2%. this value is intended to allow for component tolerances for designs with i o peak minimum = 0.5 a. see applications section for additional details on limiting i oh peak. 3. derate linearly above 70c free-air temperature at a rate of 4.8 mw/c. 4. derate linearly above 70c free-air temperature at a rate of 5.4 mw/c. the maximum led junction temper a ture should not exceed 125c. 5. maximum pulse width = 50 s, maximum duty cycle = 0.5%. 6. in this test v oh is measured with a dc load current. when driving capacitive loads v oh will approach v cc as i oh approaches zero amps. 7. maximum pulse width = 1 ms, maximum duty cycle = 20%. 8. in accordance with ul1577, each hcpl-3150 optocoupler is proof tested by applying an insulation test voltage 4500 vrms ( 5000 vrms for the hcpl-315j) for 1 second (leakage detection current limit, i i-o 5 a). this test is performed before the 100% production test for partial discharge (method b) shown in the iec/en/din en 60747-5-2 insulation characteristics table, if applicable. 9. device considered a two-terminal device: pins on input side shorted together and pins on output side shorted together. 10. the diference between t phl and t plh between any two parts or channels under the same test condition. 11. pins 1 and 4 (hcpl-3150) and pins 3 and 4 (hcpl-315j) need to be connected to led common. 12. common mode transient immunity in the high state is the maximum tolerable |dv cm /dt| of the common mode pulse, v cm , to assure that the output will remain in the high state (i.e., v o > 15.0 v). 13. common mode transient immunity in a low state is the maximum tolerable |dv cm /dt| of the common mode pulse, v cm , to assure that the out - put will remain in a low state (i.e., v o < 1.0 v). 14. this load condition approximates the gate load of a 1200 v/25 a igbt. 15. pulse width distortion (pwd) is defned as |t phl -t plh | for any given device. 16. each channel. 17. device considered a two terminal device: channel one output side pins shorted together, and channel two output side pins shorted togeth - er. 18. see the thermal model for the hcpl-315j in the application section of this data sheet. package characteristics (each channel, unless otherwise specifed) parameter symbol device min. typ.* max. units test conditions fig. note input-output v iso hcpl-3150 3750 vrms rh < 50%, 8, 9 momentary t = 1 min., withstand voltage** hcpl-315j 3750 t a = 25c output-output v o-o hcpl-315j 1500 vrms rh < 50% 17 momentary t = 1 min., withstand voltage** t a = 25c resistance r i-o 10 12 ? v i-o = 500 v dc 9 (input - output) capacitance c i-o hcpl-3150 0.6 pf f = 1 mhz (input - output) hcpl-315j 1.3 led-to-case lc hcpl-3150 391 c/w thermocouple 28 18 thermal resistance led-to-detector ld hcpl-3150 439 c/w thermal resistance detector-to-case dc hcpl-3150 119 c/w thermal resistance *all typical values at t a = 25c and v cc - v ee = 30 v, unless otherwise noted. **the input-output/output-output momentary withstand voltage is a dielectric voltage rating that should not be interpreted as an input-out - put/output-output continuous voltage rating. for the continuous voltage rating refer to your equipment level safety specifcation or avago ap - plication note 1074 entitled optocoupler input-output endurance voltage. located at center underside of package 11 figure 4. v ol vs. temperature. figure 5. i ol vs. temperature. figure 6. v ol vs. i ol . i ol ? output low current ? a -40 0 t a ? temperature ? c 100 0.8 0.4 -20 hcpl-3150 fig 5 1.0 0 2 0 4 0 0.2 60 80 v f(off) = -3.0 to 0.8 v v out = 2.5 v v cc = 15 to 30 v v ee = 0 v 0.6 v ol ? output low voltage ? v -40 0 t a ? temperature ? c 100 0.8 0.6 -20 hcpl-3150 fig 4 1.0 0 2 0 4 0 0.2 60 80 v f(off) = -3.0 to 0.8 v i out = 100 ma v cc = 15 to 30 v v ee = 0 v 0.4 v ol ? output low voltage ? v 0 0 i ol ? output low current ? a 1.0 4 0.2 hcpl-3150 fig 6 5 0.4 0.6 1 0.8 v f(off) = -3.0 to 0.8 v v cc = 15 to 30 v v ee = 0 v 2 100 c 25 c -40 c 3 figure 1. v oh vs. temperature. figure 2. i oh vs. temperature. figure 3. v oh vs. i oh . (v oh - v cc ) ? high output voltage drop ? v -40 -4 t a ? temperature ? c 100 -1 -2 -20 hcpl-3150 fig 1 0 0 2 0 4 0 -3 60 80 i f = 7 to 16 ma i out = -100 ma v cc = 15 to 30 v v ee = 0 v i oh ? output high current ? a -40 0.25 t a ? temperature ? c 100 0.45 0.40 -20 hcpl-3150 fig 2 0.50 0 2 0 4 0 0.30 60 80 i f = 7 to 16 ma v out = v cc - 4 v v cc = 15 to 30 v v ee = 0 v 0.35 (v oh - v cc ) ? output high voltage drop ? v 0 -6 i oh ? output high current ? a 1.0 -2 -3 0.2 hcpl-3150 fig 3 -1 0.4 0.6 -5 0.8 i f = 7 to 16 ma v cc = 15 to 30 v v ee = 0 v -4 100 c 25 c -40 c i cc ? supply current ? ma -40 1.5 t a ? temperature ? c 100 3.0 2.5 -20 hcpl-3150 fig 7 3.5 0 2 0 4 0 2.0 60 80 v cc = 30 v v ee = 0 v i f = 10 ma for i cch i f = 0 ma for i ccl i cch i ccl i cc ? supply current ? ma 15 1.5 v cc ? supply voltage ? v 30 3.0 2.5 hcpl-3150 fig 8 3.5 20 2.0 25 i f = 10 ma for i cch i f = 0 ma for i ccl t a = 25 c v ee = 0 v i cch i ccl i flh ? low to high current threshold ? ma -40 0 t a ? temperature ? c 100 3 2 -20 hcpl-3150 fig 9 4 0 2 0 4 0 1 60 80 5 v cc = 15 to 30 v v ee = 0 v output = open figure 7. i cc vs. temperature. figure 8. i cc vs. v cc . figure 9. i flh vs. temperature. 12 figure 16. input current vs. forward voltage. i f ? forward current ? ma 1.10 0.001 v f ? forward voltage ? v 1.60 10 1.0 0.1 1.20 hcpl-3150 fig 16 1000 1.30 1.40 1.50 t a = 25c i f v f + ? 0.01 100 figure 15. transfer characteristics. figure 14. propagation delay vs. cg. figure 13. propagation delay vs. rg. figure 10. propagation delay vs. v cc . figure 11. propagation delay vs. i f . figure 12. propagation delay vs. temperature. t p ? propagation delay ? ns 15 100 v cc ? supply voltage ? v 30 400 300 hcpl-3150 fig 10 500 20 200 25 i f = 10 ma t a = 25 c rg = 47 ? cg = 3 nf duty cycle = 50% f = 10 khz t pl h t phl t p ? propagation delay ? ns 6 100 i f ? forward led current ? ma 16 400 300 hcpl-3150 fig 11 500 10 200 12 v cc = 30 v, v ee = 0 v rg = 47 ? , cg = 3 nf t a = 25 c duty cycle = 50% f = 10 khz t plh t ph l 14 8 t p ? propagation delay ? ns -40 100 t a ? temperature ? c 100 400 300 -20 hcpl-3150 fig 12 500 0 2 0 4 0 200 60 80 t pl h t phl i f(on) = 10 ma i f(off) = 0 ma v cc = 30 v, v ee = 0 v rg = 47 ? , cg = 3 nf duty cycle = 50% f = 10 khz t p ? propagation delay ? ns 0 100 rg ? series load resistance ? ? 200 400 300 50 hcpl-3150 fig 13 500 100 200 150 t plh t ph l v cc = 30 v, v ee = 0 v t a = 25 c i f = 10 ma cg = 3 nf duty cycle = 50% f = 10 khz t p ? propagation delay ? ns 0 100 cg ? load capacitance ? nf 100 400 300 20 hcpl-3150 fig 14 500 40 200 60 80 t plh t ph l v cc = 30 v, v ee = 0 v t a = 25 c i f = 10 ma rg = 47 ? duty cycle = 50% f = 10 khz v o ? output voltage ? v 0 0 i f ? forward led current ? ma 5 25 15 1 hcpl-3150 fig 15 30 2 5 3 4 20 10 13 figure 22. uvlo test circuit. figure 17. i oh test circuit. figure 18. i ol test circuit. figure 19. v oh test circuit. figure 20. v ol test circuit. figure 21. i flh test circuit. hcpl-3150 fig 22 0.1 f v cc 1 3 i f = 10 ma + ? 2 4 8 6 7 5 v o > 5 v hcpl-3150 fig 17 0.1 f v cc = 15 to 30 v 1 3 i f = 7 to 16 ma + ? 2 4 8 6 7 5 + ? 4 v i oh hcpl-3150 fig 18 0.1 f v cc = 15 to 30 v 1 3 + ? 2 4 8 6 7 5 2.5 v i ol + ? hcpl-3150 fig 19 0.1 f v cc = 15 to 30 v 1 3 i f = 7 to 16 ma + ? 2 4 8 6 7 5 100 ma v oh hcpl-3150 fig 20 0.1 f v cc = 15 to 30 v 1 3 + ? 2 4 8 6 7 5 100 ma v ol hcpl-3150 fig 21 0.1 f v cc = 15 to 30 v 1 3 i f + ? 2 4 8 6 7 5 v o > 5 v 14 figure 25a. recommended led drive and application circuit. applications information eliminating negative igbt gate drive to keep the igbt frmly of, the hcpl-3150/315j has a very low maximum v ol specifcation of 1.0 v. the hcpl- 3150/315j realizes this very low v ol by using a dmos transistor with 4 ? (typical) on resistance in its pull down circuit. when the hcpl -3150/315j is in the low state, the igbt gate is shorted to the emitter by rg + 4 ?. minimiz - ing rg and the lead inductance from the hcpl-3150/315j to the igbt gate and emitter (possibly by mounting the hcpl-3150/315j on a small pc board directly above the igbt) can eliminate the need for negative igbt gate drive in many applica tions as shown in figure 25. care should be taken with such a pc board design to avoid routing the igbt collector or emitter traces close to the hcpl- 3150/315j input as this can result in unwanted coupling of transient signals into the hcpl-3150/315j and de - grade performance. (if the igbt drain must be routed near the hcpl-3150/315j input, then the led should be reverse-biased when in the of state, to prevent the tran - sient signals coupled from the igbt drain from turning on the hcpl-3150/315j.) figure 24. cmr test circuit and waveforms. hcpl-3150 fi g 23 0.1 f v cc = 15 to 30 v 47 ? 1 3 i f = 7 to 16 ma v o + ? + ? 2 4 8 6 7 5 10 kh z 50% dut y cycle 500 ? 3 nf i f v out t phl t plh t f t r 10% 50% 90% figure 23. t plh , t phl , t r , and t f test circuit and waveforms. hcpl-3150 fi g 24 0.1 f v cc = 30 v 1 3 i f v o + ? + ? 2 4 8 6 7 5 a + ? b v cm = 1500 v 5 v v cm ? t 0 v v o switch at b: i f = 0 ma v o switch at a: i f = 10 ma v ol v oh ? t v cm v t = + hvdc 3-phase ac - hvdc hcpl-3150 fig 25 0.1 f v cc = 18 v 1 3 + ? 2 4 8 6 7 5 270 ? hcpl-3150 +5 v control input rg q1 q2 74xxx open collector 15 selecting the gate resistor (rg) to minimize igbt switching losses. step 1: calculate rg minimum from the i ol peak specifc a tion. the igbt and rg in figure 26 can be analyzed as a simple rc circuit with a voltage supplied by the hcpl-3150/315j. (v cc C v ee - v ol ) rg i olpeak (v cc C v ee - 1.7 v) = i olpeak ( 15 v + 5 v - 1.7 v) = 0.6 a = 30.5 ? the v ol value of 2 v in the pr evious equation is a con - servative value of v ol at the peak current of 0.6 a (see figure 6). at lower rg values the voltage supplied by the hcpl-3150/315j is not an ideal voltage step. this results in lower peak currents (more margin) than predicted by this analysis. when negative gate drive is not used v ee in the previous equation is equal to zero volts. step 2: check the hcpl-3150/315j power dissipation and increase rg if necessary. the hcpl-3150/315j total power dissipa tion (p t ) is equal to the sum of the emitter power (p e ) and the output power (p o ): p t = p e + p o p e = i f ? v f ? duty cycle p o = p o(bias) + p o (switching) = i cc ? (v cc - v ee ) + e sw (r g , q g ) ? f for the circuit in figure 26 with i f (worst case) = 16 ma, rg = 30.5 ?, max duty cycle = 80%, qg = 500 nc, f = 20 khz and t a max = 90c: p e = 16 ma ? 1.8 v ? 0.8 = 23 mw p o = 4.25 ma ? 20 v + 4.0 j ? 20 khz = 85 mw + 80 mw = 165 mw > 154 mw (p o(max) @ 90 c = 250 mw ? 20 c ? 4.8 mw/c) figure 25b. recommended led drive and application circuit (hcpl-315j). + hvdc 3-phase ac 0.1 f floating supply v cc = 18 v 1 3 + ? 2 16 14 15 270 ? hcpl-315j +5 v control input rg 74xx open collector gnd 1 7 6 8 10 11 9 - hvdc 0.1 f v cc = 18 v + ? rg 270 ? +5 v control input 74xx open collector gnd 1 hcpl-3150 fig 25b 16 figure 26a. hcpl-3150 typical application circuit with negative igbt gate drive. p o parameter description i cc supply current v cc positive supply voltage v ee negative supply voltage e sw (rg,qg) energy dissipated in the hcpl-3150/315j for each igbt switching cycle (see figure 27) f switching frequency p e parameter description i f led current v f led on voltage duty cycle maximum led duty cycle + hvdc 3-phase ac - hvdc hcpl-3150 fig 26 0.1 f v cc = 15 v 1 3 + ? 2 4 8 6 7 5 hcpl-3150 rg q1 q2 v ee = -5 v ? + 270 ? +5 v control input 74xxx open collector figure 26b. hcpl-315j typical application circuit with negative igbt gate drive. + hvdc 3-phase ac 0.1 f floating supply v cc = 15 v 1 3 ? 2 16 14 15 270 ? hcpl-315j +5 v control input rg 74xx open collector gnd 1 7 6 8 10 11 9 - hvdc 0.1 f v cc = 15 v rg 270 ? +5 v control input 74xx open collector gnd 1 hcpl-3150 fig 26b ? + ? + ? ? + ? + v cc = -5 v v ee = -5 v 17 the value of 4.25 ma for i cc in the previous equation was obtained by derating the i cc max of 5 ma (which occurs at -40c) to i cc max at 90c (see figure 7). since p o for this case is greater than p o(max) , rg must be increased to reduce the hcpl-3150 power dissipation. p o(switching max) = p o(max) - p o(bias) = 154 mw - 85 mw = 69 mw p o(switchingmax) e sw(max) = f 69 mw = = 3.45 j 20 khz for qg = 500 nc, from figure 27, a value of e sw = 3.45 j gives a rg = 41 ?. thermal model (hcpl-3150) the steady state thermal model for the hcpl-3150 is shown in figure 28a. the thermal resistance values given in this model can be used to calculate the temper a tures at each node for a given operating condition. as shown by the model, all heat generated fows through ca which raises the case temperature t c accordingly. the value of ca depends on the conditions of the board design and is, therefore, determined by the designer. the value of ca = 83c/w was obtained from thermal measur e ments using a 2.5 x 2.5 inch pc board, with small traces (no ground plane), a single hcpl-3150 soldered into the center of the board and still air. the absolute maximum power dissipation derating specifca tions assume a ca value of 83c/w. from the thermal mode in figure 28a the led and detec - tor ic junction temperatures can be expressed as: t je = p e ? ( lc ||( ld + dc ) + ca ) lc ? dc + p d ? ( + ca ) + t a lc + dc + ld lc ? dc t jd = p e ( + ca ) lc + dc + ld + p d ? ( dc ||( ld + lc ) + ca ) + t a inserting the values for lc and dc shown in figure 28 gives: t je = p e ? (230c/w + ca ) + p d ? (49c/w + ca ) + t a t jd = p e ? (49c/w + ca ) + p d ? (104c/w + ca ) + t a for example, given p e = 45 mw, p o = 250 mw, t a = 70c and ca = 83c/w: t je = p e ? 313c/w + p d ? 132c/w + t a = 45 mw ? 313c/w + 250 m w ? 132c/w + 70c = 117c t jd = p e ? 132c/w + p d ? 187c/w + t a = 45 mw ? 132c/w + 250 m w ? 187c/w + 70c = 123c t je and t jd should be limited to 125c based on the board layout and part placement ( ca ) specifc to the applica - tion. t je = led junction temperature t jd = detector ic junction temperature t c = case temperature measured at the center of the package bottom lc = led-to-case thermal resistance ld = led-to-detector thermal resistance dc = detector-to-case thermal resistance ca = case-to-ambient thermal resistance ? ca will depend on the board design and the placement of the part. figure 28a. thermal model. hcpl-3150 fig 28 ld = 439c/w t je t jd lc = 391c/w dc = 119c/w ca = 83c/w* t c t a t je = led junction temperature t jd = detector ic junction temperature t c = case temperature measured at the center of the package bottom lc = led-to-case thermal resistance ld = led-to-detector thermal resistance dc = detector-to-case thermal resistance ca = case-to-ambient thermal resistance * ca will depend on the board design and the placement of the part. 18 thermal coefcient data (units in c/w) part number a 11 , a 22 a 12 , a 21 a 13 , a 31 a 24 , a 42 a 14 , a 41 a 23 , a 32 a 33 , a 44 a 34 , a 43 hcpl-315j 198 64 62 64 83 90 137 69 note: maximum junction temperature for above part: 125c. figure 28b. thermal impedance model for hcpl-315j. 6 5 9 4 8 7 10 1 3 2 led 1 led 2 ambient detector 1 detector 2 hcpl-3150 fig 28b p e1 hcpl-3150 fig 28b p e2 p d1 p d2 thermal model dual-channel (soic-16) hcpl-315j op - toisolator defnitions 1 , 2 , 3 , 4 , 5 , 6 , 7 , 8 , 9 , 10 : thermal impedances be - tween nodes as shown in figure 28b. ambient tempera - ture: measured approximately 1.25 cm above the opto - coupler with no forced air. description this thermal model assumes that a 16-pin dual-channel (soic-16) optocoupler is soldered into an 8.5 cm x 8.1 cm printed circuit board (pcb). these optocouplers are hybrid devices with four die: two leds and two detec - tors. the temperature at the led and the detector of the optocoupler can be calculated by using the equations below. ? t e1a = a 11 p e1 + a 12 p e2 +a 13 p d1 +a 14 p d2 ? t e2a = a 21 p e1 + a 22 p e2 +a 23 p d1 +a 24 p d2 ? t d1a = a 31 p e1 + a 32 p e2 +a 33 p d1 +a 34 p d2 ? t d2a = a 41 p e1 + a 42 p e2 +a 43 p d1 +a 44 p d2 where: ? t e1a = temperature diference between ambient and led 1 ? t e2a = temperature diference between ambient and led 2 ? t d1a = temperature diference between ambient and detector 1 ? t d2a = temperature diference between ambient and detector 2 p e1 = power dissipation from led 1; p e2 = power dissipation from led 2; p d1 = power dissipation from detector 1; p d2 = power dissipation from detector 2 a xy thermal coefcient (units in c/w) is a function of thermal imped - ances 1 through 10 . 19 cmr with the led on (cmr h ) a high cmr led drive circuit must keep the led on dur - ing common mode transients. this is achieved by over - driving the led current beyond the input threshold so that it is not pulled below the threshold during a tran - sient. a minimum led cur rent of 10 ma provides ade - quate margin over the maximum i flh of 5 ma to achieve 15 kv/s cmr. figure 27. energy dissipated in the hcpl-3150 for each igbt switching cycle. esw ? energy per switching cycle ? j 0 0 rg ? gate resistance ? ? 100 3 20 hcpl-3150 fig 27 7 40 2 60 80 6 qg = 100 nc qg = 250 nc qg = 500 nc 5 4 1 v cc = 19 v v ee = -9 v led drive circuit considerations for ultra high cmr per - formance without a detector shield, the dominant cause of opto - coupler cmr failure is capacitive coupling from the in - put side of the optocoupler, through the package, to the detector ic as shown in figure 29. the hcpl-3150/315j improves cmr performance by using a detector ic with an optically transparent faraday shield, which diverts the capaci tively coupled current away from the sensitive ic circuitry. how ever, this shield does not eliminate the capacitive coupling between the led and optocou pler pins 5-8 as shown in figure 30. this capacitive coupling causes perturbations in the led current during common mode transients and becomes the major source of cmr failures for a shielded optocoupler. the main design ob - jective of a high cmr led drive circuit becomes keeping the led in the proper state (on or of ) during common mode transients. for example, the recommended ap - plication circuit (figure 25), can achieve 15 kv/s cmr while minimizing component complexity. techniques to keep the led in the proper state are dis - cussed in the next two sections. cmr with the led of (cmr l ) a high cmr led drive circuit must keep the led of (v f v f(off) ) during common mode transients. for exam - ple, during a -dv cm /dt transient in figure 31, the current fowing through c ledp also fows through the r sat and v sat of the logic gate. as long as the low state voltage devel - oped across the logic gate is less than v f(off) , the led will remain of and no common mode failure will occur. the open collector drive circuit, shown in figure 32, can - not keep the led of during a +dv cm /dt transient, since all the current fowing through c ledn must be supplied by the led, and it is not recommended for applications requiring ultra high cmr l performance. figure 33 is an alternative drive circuit which, like the recommended application circuit (figure 25), does achieve ultra high cmr performance by shunting the led in the of state. under voltage lockout feature the hcpl-3150/315j contains an under voltage lockout (uvlo) feature that is designed to protect the igbt under fault conditions which cause the hcpl-3150/315j supply voltage (equivalent to the fully-charged igbt gate volt - age) to drop below a level necessary to keep the igbt in a low resistance state. when the hcpl-3150/315j output is in the high state and the supply voltage drops below the hcpl-3150/315j v uvlo- threshold (9.5 21 figure 33. recommended led drive circuit for ultra-high cmr. figure 32. not recommended open collector drive circuit. t phl max t plh mi n pdd* max = (t phl - t plh ) max = t phl max - t plh mi n *pdd = propagation delay difference note: for pdd calculations the propagation delays are taken at the same temperature and test conditions. v out 1 i led2 v out 2 i led1 q1 on q2 off q1 off q2 on hcpl-3150 fig 34 figure 34. minimum led skew for zero dead time. figure 35. waveforms for dead time. t pl h mi n maximum dead time (due to optocoupler) = (t phl max - t phl mi n ) + (t plh max - t plh mi n ) = (t phl max - t plh mi n ) ? (t phl min - t plh max ) = pdd* max ? pdd* min *pdd = propagation delay difference note: for dead time and pdd calculations all propagation delays are taken at the same temperature and test conditions. v out 1 i led2 v out 2 i led1 q1 on q2 off q1 off q2 on hcpl-3150 fig 35 t phl mi n t phl max t plh max = pdd* max (t phl - t pl h ) max hcpl-3150 fig 32 1 3 2 4 8 6 7 5 c ledp c ledn shield +5 v q1 i ledn hcpl-3150 fig 33 1 3 2 4 8 6 7 5 c ledp c ledn shield +5 v figure 36. under voltage lock out. v o ? output voltage ? v 0 0 (v cc - v ee ) ? supply voltage ? v 10 5 hcpl-3150 fig 36 14 10 15 2 20 6 8 4 12 (12.3, 10.8) (10.7, 9.2) (10.7, 0.1) (12.3, 0.1) figure 37a. hcpl-3150: thermal derating curve, dependence of safety limiting value with case temperature per iec/en/ din en 60747-5-2 . output power ? p s , input current ? i s 0 0 t s ? case temperature ? c 200 600 400 25 hcpl-3150 fig 37 800 50 75 100 200 150 175 p s (mw) i s (ma) 125 100 300 500 700 figure 37b. hcpl-315j: thermal derating curve, dependence of safety limiting value with case temperature per iec/en/din en 60747-5-2 . hcpl-3150 fig 37b p si ? power ? mw 0 0 t s ? case temperature ? c 200 50 800 125 25 75 100 150 1200 400 200 600 1000 1400 175 p si output p si input for product information and a complete list of distributors, please go to our website: www.avagotech.com avago, avago technologies, and the a logo are trademarks of avago technologies limited in the united states and other countries. data subject to change. copyright ? 2005-2008 avago technologies limited. all rights reserved. obsoletes 5989-2944en av02-0164en - april 10, 2008 |
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