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www.irf.com 1 05/23/07 IRF7821 hexfet power mosfet notes through are on page 10 benefits very low r ds(on) at 4.5v v gs low gate charge fully characterized avalanche voltage and current applications high frequency point-of-load synchronous buck converter for applications in networking & computing systems. top view 8 1 2 3 4 5 6 7 d d d d g s a s s a so-8 v dss r ds(on) max q g (typ.) 30v 9.1m @v gs = 10v 9.3nc absolute maximum ratings parameter units v ds drain-to-source voltage v v gs gate-to-source voltage i d @ t a = 25c continuous drain current, v gs @ 10v i d @ t a = 70c continuous drain current, v gs @ 10v a i dm pulsed drain current p d @t a = 25c power dissipation w p d @t a = 70c power dissipation linear derating factor w/c t j operating junction and c t stg storage temperature range thermal resistance parameter typ. max. units r jl junction-to-drain lead ??? 20 c/w r ja junction-to-ambient ??? 50 -55 to + 155 2.5 0.02 1.6 max. 13.6 11 100 20 30
2 www.irf.com static @ t j = 25c (unless otherwise specified) parameter min. t y p. max. units bv dss drain-to-source breakdown voltage 30 ??? ??? v ? v dss / ? t j breakdown voltage temp. coefficient ??? 0.025 ??? v/c r ds(on) static drain-to-source on-resistance ??? 7.0 9.1 m ? ??? 9.5 12.5 v gs(th) gate threshold voltage 1.0 ??? ??? v ? v gs(th) gate threshold voltage coefficient ??? - 4.9 ??? mv/c i dss drain-to-source leakage current ??? ??? 1.0 a ??? ??? 150 i gss gate-to-source forward leakage ??? ??? 100 na gate-to-source reverse leakage ??? ??? -100 gfs forward transconductance 22 ??? ??? s q g total gate charge ??? 9.3 14 q gs1 pre-vth gate-to-source charge ??? 2.5 ??? q gs2 post-vth gate-to-source charge ??? 0.8 ??? nc q gd gate-to-drain charge ??? 2.9 ??? q godr gate charge overdrive ??? 3.1 ??? see fig. 16 q sw switch char g e (q gs2 + q gd ) ??? 3.7 ??? q oss output charge ??? 6.1 ??? nc t d(on) turn-on delay time ??? 6.3 ??? t r rise time ??? 2.7 ??? t d(off) turn-off delay time ??? 9.7 ??? ns t f fall time ??? 7.3 ??? c iss input capacitance ??? 1010 ??? c oss output capacitance ??? 360 ??? pf c rss reverse transfer capacitance ??? 110 ??? avalanche characteristics parameter units e as si n gl e p u l se a va l anc h e e ner gy mj i ar a va l anc h e c urrent a diode characteristics parameter min. t y p. max. units i s continuous source current ??? ??? 3.1 (body diode) a i sm pulsed source current ??? ??? 100 (body diode) v sd diode forward voltage ??? ??? 1.0 v t rr reverse recovery time ??? 28 42 ns q rr reverse recovery charge ??? 23 35 nc ??? i d = 10a v gs = 0v v ds = 15v v gs = 4.5v, i d = 10a v gs = 4.5v typ. ??? v ds = v gs , i d = 250a clamped inductive load v ds = 15v, i d = 10a t j = 25c, i f = 10a, v dd = 20v di/dt = 100a/s t j = 25c, i s = 10a, v gs = 0v showing the integral reverse p-n junction diode. mosfet symbol v ds = 10v, v gs = 0v v dd = 15v, v gs = 4.5v i d = 10a v ds = 15v v gs = 20v v gs = -20v v ds = 24v, v gs = 0v v ds = 24v, v gs = 0v, t j = 125c conditions v gs = 0v, i d = 250a reference to 25c, i d = 1ma v gs = 10v, i d = 13a conditions max. 44 10 ? = 1.0mhz www.irf.com 3 fig 4. normalized on-resistance vs. temperature fig 2. typical output characteristics fig 1. typical output characteristics fig 3. typical transfer characteristics 2.0 3.0 4.0 5.0 6.0 v gs , gate-to-source voltage (v) 0.1 1.0 10.0 100.0 i d , d r a i n - t o - s o u r c e c u r r e n t ( ) t j = 25c t j = 150c v ds = 15v 20s pulse width -60 -40 -20 0 20 40 60 80 100 120 140 160 t j , junction temperature (c) 0.5 1.0 1.5 2.0 r d s ( o n ) , d r a i n - t o - s o u r c e o n r e s i s t a n c e ( n o r m a l i z e d ) i d = 13a v gs = 10v 0.1 1 10 100 v ds , drain-to-source voltage (v) 0.1 1 10 100 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) 2.5v 20s pulse width tj = 25c vgs top 10v 4.5v 3.7v 3.5v 3.3v 3.0v 2.7v bottom 2.5v 0.1 1 10 100 v ds , drain-to-source voltage (v) 1 10 100 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) 2.5v 20s pulse width tj = 150c vgs top 10v 4.5v 3.7v 3.5v 3.3v 3.0v 2.7v bottom 2.5v 4 www.irf.com fig 8. maximum safe operating area fig 6. typical gate charge vs. gate-to-source voltage fig 5. typical capacitance vs. drain-to-source voltage fig 7. typical source-drain diode forward voltage 1 10 100 v ds , drain-to-source voltage (v) 10 100 1000 10000 c , c a p a c i t a n c e ( p f ) coss crss ciss v gs = 0v, f = 1 mhz c iss = c gs + c gd , c ds shorted c rss = c gd c oss = c ds + c gd 0 5 10 15 20 q g total gate charge (nc) 0 2 4 6 8 10 12 v g s , g a t e - t o - s o u r c e v o l t a g e ( v ) v ds = 24v vds= 15v i d = 10a 0.0 0.5 1.0 1.5 v sd , source-todrain voltage (v) 0.1 1.0 10.0 100.0 i s d , r e v e r s e d r a i n c u r r e n t ( a ) t j = 25c t j = 150c v gs = 0v 0.1 1.0 10.0 100.0 1000.0 v ds , drain-tosource voltage (v) 0.1 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) tc = 25c tj = 150c single pulse 1msec 10msec operation in this area limited by r ds (on) 100sec www.irf.com 5 fig 11. maximum effective transient thermal impedance, junction-to-ambient fig 9. maximum drain current vs. case temperature fig 10. threshold voltage vs. temperature -75 -50 -25 0 25 50 75 100 125 150 t j , temperature ( c ) 1.0 1.4 1.8 2.2 2.6 v g s ( t h ) g a t e t h r e s h o l d v o l t a g e ( v ) i d = 250a 1e-006 1e-005 0.0001 0.001 0.01 0.1 1 10 100 t 1 , rectangular pulse duration (sec) 0.01 0.1 1 10 100 t h e r m a l r e s p o n s e ( z t h j a ) 0.20 0.10 d = 0.50 0.02 0.01 0.05 single pulse ( thermal response ) 25 50 75 100 125 150 t j , junction temperature (c) 0 2 4 6 8 10 12 14 i d , d r a i n c u r r e n t ( a ) 6 www.irf.com fig 13b. unclamped inductive waveforms fig 13a. unclamped inductive test circuit t p v (br)dss i as fig 13c. maximum avalanche energy vs. drain current r g i as 0.01 ? t p d.u.t l v ds + - v dd driver a 15v 20v v gs 25 50 75 100 125 150 starting t j , junction temperature (c) 0 20 40 60 80 100 e a s , s i n g l e p u l s e a v a l a n c h e e n e r g y ( m j ) i d top 4.5a 8.0a bottom 10a fig 14a. switching time test circuit fig 14b. switching time waveforms v gs v ds 90% 10% t d(on) t d(off) t f t r v gs pulse width < 1s duty factor < 0.1% v dd v ds l d d.u.t fig 12. on-resistance vs. gate voltage 2.0 4.0 6.0 8.0 10.0 v gs , gate-to-source voltage (v) 0 5 10 15 20 25 30 r d s ( o n ) , d r a i n - t o - s o u r c e o n r e s i s t a n c e ( m ? ) t j = 25c t j = 125c i d = 13a www.irf.com 7 d.u.t. v ds i d i g 3ma v gs .3 f 50k ? .2 f 12v current regulator same type as d.u.t. current sampling resistors + - fig 16. gate charge test circuit fig 15. for n-channel hexfet power mosfets ? ? ? p.w. period di/dt diode recovery dv/dt ripple 5% body diode forward drop re-applied voltage reverse recovery current body diode forward current v gs =10v v dd i sd driver gate drive d.u.t. i sd waveform d.u.t. v ds waveform inductor curent d = p. w . period + - + + + - - - ? ? !"!! ? # $$ ? !"!!%" fig 17. gate charge waveform vds vgs id vgs(th) qgs1 qgs2 qgd qgodr 8 www.irf.com control fet !" # $ %& !" # #' p loss = p conduction + p switching + p drive + p output this can be expanded and approximated by; p loss = i rms 2 r ds(on ) () + i q gd i g v in f ? ? ? ? ? ? + i q gs 2 i g v in f ? ? ? ? ? ? + q g v g f () + q oss 2 v in f ? ? ? ? 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" ) # * %+ %& !" # # , # - . / # # synchronous fet the power loss equation for q2 is approximated by; p loss = p conduction + p drive + p output * p loss = i rms 2 r ds(on) () + q g v g f () + q oss 2 v in f ? ? ? ? ? + q rr v in f ( ) *dissipated primarily in q1. for the synchronous mosfet q2, r ds(on) is an im- portant characteristic; however, once again the im- portance of gate charge must not be overlooked since it impacts three critical areas. under light load the mosfet must still be turned on and off by the con- trol ic so the gate drive losses become much more significant. secondly, the output charge q oss and re- verse recovery charge q rr both generate losses that are transfered to q1 and increase the dissipation in that device. thirdly, gate charge will impact the mosfets? susceptibility to cdv/dt turn on. the drain of q2 is connected to the switching node of the converter and therefore sees transitions be- tween ground and v in . as q1 turns on and off there is a rate of change of drain voltage dv/dt which is ca- pacitively coupled to the gate of q2 and can induce a voltage spike on the gate that is sufficient to turn the mosfet on, resulting in shoot-through current . the ratio of q gd /q gs1 must be minimized to reduce the potential for cdv/dt turn on. power mosfet selection for non-isolated dc/dc converters figure a: q oss characteristic www.irf.com 9 so-8 package details so-8 part marking ! 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