general description the max9110/max9112 single/dual low-voltage differ- ential signaling (lvds) transmitters are designed for high-speed applications requiring minimum power con- sumption, space, and noise. both devices support switching rates exceeding 500mbps while operating from a single +3.3v supply, and feature ultra-low 250ps (max) pulse skew required for high-resolution imaging applications, such as laser printers and digital copiers. the max9110 is a single lvds transmitter, and the max9112 is a dual lvds transmitter. both devices conform to the eia/tia-644 lvds standard. they accept lvttl/cmos inputs and translate them to low-voltage (350mv) differential outputs, minimizing elec- tromagnetic interference (emi) and power dissipation. these devices use a current-steering output stage, mini- mizing power consumption, even at high data rates. the max9110/max9112 are available in space-saving 8-pin sot23 and so packages. refer to the max9111/ max9113 data sheet for single/dual lvds line receivers. ________________________applications features ? low 250ps (max) pulse skew for high-resolution imaging and high-speed interconnect ? space-saving 8-pin sot23 and so packages ? pin-compatible upgrades to ds90lv017/017a and ds90lv027/027a (so packages) ? guaranteed 500mbps data rate ? low 22mw power dissipation at 3.3v (31mw for max9112) ? conform to eia/tia-644 standard ? single +3.3v supply ? flow-through pinout simplifies pc board layout ? driver outputs high impedance when powered off max9110/max9112 single/dual lvds line drivers with ultra-low pulse skew in sot23 ________________________________________________________________ maxim integrated products 1 n.c. n.c. gnd 1 2 8 7 do- do+ din n.c. v cc so top view 3 4 6 5 n.c. n.c. v cc 1 2 8 7 do- do+ gnd n.c. din sot23 3 4 6 5 do2+ do2- gnd 1 2 8 7 do1- do1+ din1 din2 v cc so 3 4 6 5 do2+ do2- v cc 1 2 8 7 do1- do1+ gnd din2 din1 sot23 3 4 6 5 max9112 max9112 max9110 max9110 h = logic level high l = logic level low x = undetermined din_ l h 0.8v < v din _ < 2.0v do_+ l h do_- h l x x pin configurations/functional diagrams/truth table 19-1771; rev 0; 9/00 for free samples and the latest literature, visit www.maxim-ic.com or phone 1-800-998-8800. for small orders, phone 1-800-835-8769. ordering information part temp. range pin- package top mark max9110 eka-t -40? to +85? 8 sot23-8 aadn max9110esa -40? to +85? 8 so max9112 eka-t -40? to +85? 8 sot23-8 aado max9112esa -40? to +85? 8 so laser printers digital copiers cellular phone base stations telecom switching equipment network switches/routers lcd displays backplane interconnect clock distribution typical operating circuit appears at end of data sheet.
max9110/max9112 single/dual lvds line drivers with ultra-low pulse skew in sot23 2 _______________________________________________________________________________________ absolute maximum ratings electrical characteristics (v cc = +3.0v to +3.6v, r l = 100 ?%, t a = -40? to +85?, unless otherwise noted. typical values are at v cc = +3.3v, t a = +25?.) (notes 1, 2) ac characteristics (v cc = +3.0v to +3.6v, r l = 100 ?%, c l = 5pf, t a = -40? to +85?, unless otherwise noted. typical values are at v cc = +3.3v, t a = +25?.) (notes 3, 4, 5; figures 2, 3) stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. supply voltage (v cc to gnd) ..................................-0.3v to +4v input voltage (v din_ to gnd).....................-0.3v to (v cc + 0.3v) output voltage (v do _+, v do _- to gnd or v cc ) ...-0.3v to +3.9v output short-circuit duration (do_+, do_- to v cc or gnd) ................................continuous esd protection (human body model, do_+, do_-)..........?1kv continuous power dissipation (t a = +70?) 8-pin sot23 (derate 7.52mw/? above +70?)........... 602mw 8-pin so (derate 5.88mw/? above +70?)...............471mw operating temperature range ...........................-40? to +85? storage temperature range .............................-65? to +150? lead temperature (soldering,10s) ..................................+300? parameter symbol conditions min typ max units differential output voltage v od figure 1 250 350 450 mv change in magnitude of output voltage for complementary output states v od figure 1 0 2 35 mv offset voltage v os figure 1 1.125 1.25 1.375 v change in magnitude of offset voltage for complementary output states v os figure 1 0 2 25 mv power-off leakage current i o ( off ) v do _ _ = 0 or v cc , v cc = 0 or open -10 +10 ? short-circuit output current i o ( short ) din_ = v cc , v do_+ = 0 or din_ = gnd, v do _- = 0 -20 ma input high voltage v ih 2.0 v cc v input low voltage v il gnd 0.8 v input current high i ih din_ = v cc or 2v 0 10 20 a input current low i il din_ = gnd or 0.8v -20 -3 0 a no-load supply current i cc no load, din_ = v cc or 0 4.5 6 ma max9110 6.7 8 supply current i cc din_ = v cc or 0 max9112 9.4 13 ma parameter symbol conditions min typ max units differential high-to-low propagation delay t phld 1 1.54 2.5 ns differential low-to-high propagation delay t plhd 1 1.58 2.5 ns differential pulse skew |t phld - t plhd | (note 6) t skd1 40 250 ps c hannel- to-c hannel s kew ( n ote 7) t skd2 70 400 ps
max9110/max9112 single/dual lvds line drivers with ultra-low pulse skew in sot23 _______________________________________________________________________________________ 3 ac characteristics (continued) (v cc = +3.0v to +3.6v, r l = 100 ?%, c l = 5pf, t a = -40? to +85?, unless otherwise noted. typical values are at v cc = +3.3v, t a = +25?.) (notes 3, 4, 5; figures 2, 3) note 1: maximum and minimum limits over temperature are guaranteed by design. devices are production tested at t a = +25?. note 2: by definition, current into the device is positive and current out of the device is negative. voltages are referred to device ground except v od . note 3: ac parameters are guaranteed by design and characterization. note 4: c l includes probe and fixture capacitance. note 5: signal generator conditions for dynamic tests: v ol = 0, v oh = 3v, f = 20mhz, 50% duty cycle, r o = 50 , t r 1ns, and t f 1ns (0 to 100%). note 6: t skd1 is the magnitude difference of differential propagation delays in a channel; t skd1 = | t phld - t plhd | . note 7: t skd2 is the magnitude difference of the t plhd or t phld of one channel and the t plhd or t phld of the other channel on the same device (max9112). note 8: t skd3 is the magnitude difference of any differential propagation delays between devices at the same v cc and within 5? of each other. note 9: t skd4 is the magnitude difference of any differential propagation delays between devices operating over the rated supply and temperature ranges. note 10: f max signal generator conditions: v ol = 0, v oh = +3v, frequency = 250mhz, t r 1ns, t f 1ns (0 to 100%) 50% duty cycle. transmitter output criteria: duty cycle = 45% to 55%, v od 250mv. parameter symbol conditions min typ max units t skd3 (note 8) 1 part-to-part skew t skd4 (note 9) 1.5 ns high-to-low transition time t thl 0.25 0.6 1 ns low-to-high transition time t tlh 0.25 0.6 1 ns maximum operating frequency f max (note 10) 250 mhz typical operating characteristics (v cc = +3.3v, r l = 100 , c l = 5pf, v ih = +3v, v il = gnd, f in = 20mhz, t a = +25?, unless otherwise noted.) (figures 2, 3) 1 100 1m max9110 supply current vs. input frequency max9110 toc01 input frequency (hz) supply current (ma) 9.5 6.5 7.0 7.5 8.0 8.5 9.0 10k 100m 1g a: v cc = +3.0v b: v cc = +3.3v c: v cc = +3.6v c b a 6.4 6.7 6.6 6.5 6.8 6.9 7.0 7.1 7.2 7.3 7.4 -40 10 -15 356085 supply current vs. temperature max9110 toc02 temperature ( c) current supply (ma) 0.8 1.2 1.0 1.6 1.4 1.8 2.0 3.0 3.2 3.3 3.1 3.4 3.5 3.6 differential propagation delay vs. supply voltage max9110 toc03 supply voltage (v) propagation delay (ns) t plhd t phld
max9110/max9112 single/dual lvds line drivers with ultra-low pulse skew in sot23 4 _______________________________________________________________________________________ typical operating characteristics (continued) (v cc = +3.3v, r l = 100 , c l = 5pf, v ih = +3v, v il = gnd, f in = 20mhz, t a = +25?, unless otherwise noted.) (figures 2, 3) 250 275 300 325 350 375 400 425 450 3.0 3.2 3.1 3.3 3.4 3.5 3.6 max9110 toc10 supply voltage (v) differential output voltage (mv) differential output voltage vs. supply voltage 250 275 300 325 350 375 400 425 450 75.0 100.0 87.5 112.5 125.0 137.5 150.0 max9110 toc11 load resistance ( ) differential output voltage (mv) differential output voltage vs. load resistance v cc = +3.3v v cc = +3v v cc = +3.6v 0.8 1.2 1.0 1.6 1.4 1.8 2.0 -40 10 -15 356085 max9110 toc04 temperature ( c) propagation delay (ns) differential propagation delay vs. temperature t plhd t phld 0 20 60 40 80 100 3.0 3.2 3.1 3.3 3.4 3.5 3.6 max9110 toc05 supply voltage (v) differential pulse skew (ps) differential pulse skew vs. supply voltage 0 20 60 40 80 100 -40 10 -15 35 60 85 differential pulse skew vs. temperature max9110 toc06 temperature ( c) differential pulse skew (ps) 300 350 400 450 500 550 600 650 700 3.0 3.2 3.1 3.3 3.4 3.5 3.6 transition time vs. supply voltage max9110 toc07 supply voltage (v) transition time (ps) t tlh t thl 400 460 440 420 480 500 520 540 560 580 600 -40 10 -15 35 60 85 transition time vs. temperature max9110 toc08 temperature ( c) transition time (ps) t tlh t thl 1.00 1.15 1.10 1.05 1.20 1.25 1.30 1.35 1.40 1.45 1.50 3.0 3.2 3.1 3.3 3.4 3.5 3.6 output voltage vs. supply voltage max9110 toc09 supply voltage (v) output voltage (v) output low output high
max9110/max9112 single/dual lvds line drivers with ultra-low pulse skew in sot23 _______________________________________________________________________________________ 5 1.35 1.38 1.37 1.36 1.39 1.40 1.41 1.42 1.43 1.44 1.45 75.0 100.0 87.5 112.5 125.0 137.5 150.0 max9110 toc12 load resistance ( ) output high voltage (v) output high voltage vs. load resistance v cc = +3v v cc = +3.3v v cc = +3.6v 1.00 1.03 1.02 1.01 1.04 1.05 1.06 1.07 1.08 1.09 1.10 75.0 100.0 87.5 112.5 125.0 137.5 150.0 max9110 toc13 load resistance ( ) output low voltage (v) output low voltage vs. load resistance v cc = +3.6v v cc = +3.3v v cc = +3v typical operating characteristics (continued) (v cc = +3.3v, r l = 100 , c l = 5pf, v ih = +3v, v il = gnd, f in = 20mhz, t a = +25?, unless otherwise noted.) (figures 2, 3) pin description pin max9110 max9112 sot23 so sot23 so name function 4141v cc positive supply 1 2 din 1, 3 2, 3 din1, din2 transmitter input 3, 5, 6 3, 5, 6 n.c. no connection. not internally connected. 2 4 2 4 gnd ground 7 7 do+ 6, 7 6, 7 do2+, do1+ noninverting transmitter output 8 8 do- 5, 8 5, 8 do2-, do1- inverting transmitter output detailed description the max9110/max9112 single/dual lvds transmitters are intended for high-speed, point-to-point, low-power applications. these devices accept cmos/lvttl inputs with data rates exceeding 500mbps. the max9110/max9112 reduce power consumption and emi by translating these signals to a differential voltage in the 250mv to 450mv range across a 100 load while drawing only 9.4ma of supply current for the dual- channel max9112. a current-steering approach induces less ground bounce and no shoot-through current, enhancing noise margin and system speed performance. the output
max9110/max9112 single/dual lvds line drivers with ultra-low pulse skew in sot23 6 _______________________________________________________________________________________ v os v cc gnd din_ r l /2 r l /2 v os v od do_- do_+ figure 1. lvds transmitter v od and v os test circuit r l c l do_ + do_ - c l 50 din_ generator figure 2. transmitter propagation delay and transition time test circuit stage presents a symmetrical, high-impedance output, reducing differential reflection and timing distortion. the driver outputs are short circuit current limited and enter a high-impedance state when the device is not powered. lvds operation the lvds interface standard is a signaling method intended for point-to-point communication over a con- trolled impedance medium as defined by the eia/tia- 644 lvds standard. the lvds standard uses a lower voltage swing than other common communication stan- dards, achieving higher data rates with reduced power consumption while reducing emi emissions and system susceptibility to noise. lvds transmitters such as the max9110/max9112 convert cmos/lvttl signals to low-voltage differential signals at rates in excess of 500mbps. the max9110/ max9112 current-steering architecture requires a resis- tive load to terminate the signal and complete the trans- mission loop. because the device switches the direc- tion of current flow and not voltage levels, the actual output voltage swing is determined by the value of the termination resistor at the input of an lvds receiver. logic states are determined by the direction of current flow through the termination resistor. with a typical 3.5ma output current, the max9110/max9112 produce an output voltage of 350mv when driving a 100 load. the steady-state-voltage peak-to-peak swing is twice the differential voltage, or 700mv (typ). applications information supply bypassing bypass v cc with high-frequency surface-mount ceramic 0.1? and 0.001? capacitors in parallel, as close to the device as possible, with the smaller valued capacitor the closest. for additional supply bypassing, place a 10? tantalum or ceramic capacitor at the point where power enters the circuit board. 0 v oh v ol din_ do_ - do_+ v diff 3v t phld 1.5v 0 t thl 20% 0 80% 80% 0 t tlh 20% 0v differential t plhd 1.5v v diff = v do_ + - v do_ - figure 3. transmitter propagation delay and transition time waveforms
differential traces output trace characteristics affect the performance of the max9110/max9112. use controlled impedance traces to match trace impedance to both transmission medium impedance and termination resistor. eliminate reflections and ensure that noise couples as common mode by running the differential traces close together. reduce skew by matching the electrical length of the traces. excessive skew can result in a degradation of magnetic field cancellation. maintain the distance between the differential traces to avoid discontinuities in impedance. avoid 90 turns and minimize the number of vias to further prevent imped- ance discontinuities. cables and connectors transmission media should have a differential charac- teristic impedance of about 100 . use cables and con- nectors that have matched impedance to minimize impedance discontinuities. avoid the use of unbalanced cables, such as ribbon or simple coaxial cable. balanced cables, such as twisted pair, offer superior signal quality and tend to generate less emi due to canceling effects. balanced cables tend to pick up noise as common mode, which is rejected by the lvds receiver. termination termination resistors should match the differential char- acteristic impedance of the transmission line. because the max9110/max9112 are current-steering devices, an output voltage will not be generated without a termi- nation resistor. output voltage levels are dependent upon the termination resistor value. resistance values may range between 75 and 150 . minimize the distance between the termination resistor and receiver inputs. use a single 1% to 2% surface- mount resistor across the receiver inputs. board layout for lvds applications, a four-layer pc board that pro- vides separate power, ground, lvds signals, and input signals is recommended. isolate the input and lvds sig- nals from each other to prevent coupling. separate the input and lvds signal planes with the power and ground planes for best results. max9110/max9112 single/dual lvds line drivers with ultra-low pulse skew in sot23 _______________________________________________________________________________________ 7 max9110 transistor count: 765 max9112 transistor count: 765 process: cmos chip information r t = 100 0.001 f 0.1 f +3.3v din_ max9110 max9112 max9111 max9113 out_ lvds 0.001 f 0.1 f +3.3v receiver driver typical operating circuit
max9110/max9112 single/dual lvds line drivers with ultra-low pulse skew in sot23 maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circu it patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. 8 _____________________maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 2000 maxim integrated products printed usa is a registered trademark of maxim integrated products. package information sot23, 8l.eps 0 0 package outline, sot-23, 8l body 21-0078 g 1 1 marking
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