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? semiconductor components industries, llc, 2007 october, 2007 - rev. 0 1 publication order number: ncp5050/d ncp5050 4.5 w flash white led boost driver the ncp5050 is a high powered fixed frequency pwm boost converter optimized for constant current applications such as driving high-powered white leds. this device has been designed with high-efficiency for use in portable applications and is capable of driving up to 5 high power leds in series for camera flash or flashlight (torch) applications. to support the need of driving the leds in a high current pulse mode for flash as well as a continuous mode for focus or torch, a control pin and support circuitry is incorporated which allows the user to program two led currents. the both output current are fully configurable via the use of 2 external resistors and this average current can be reduced by applying a pwm signal to the ctrl pin up to 50 khz. the pwm operates at 1.7 mhz which allows the use of small inductors and ceramic capacitors. in addition the compensation is internal to the device which simplifies the design and reduces the pcb component count. to protect the device cycle-by-cycle current limiting and a thermal shutdown circuit have been incorporated as well as output over-voltage and time out protection. the maximum peak current level of the power switch is adjustable to allow further system optimization. the ncp5050 is housed in a low profile space efficient 3x3 mm thermally enhanced wdfn. features ? high efficiency up to 88% for 2 led (v f = 3.5 v by led) at 200 ma ? high frequency dimming pwm control ? maximum v out of 20 v ? 1.7 mhz pwm dc/dc converter ? shut down control facility with true-cutoff ? open led (output overvoltage) protection ? 1.2 s timer out function ? soft start to limit inrush current ? small 3x3x0.8 mm wdfn package ? these are pb-free devices typical applications ? white led flash (camera p hone, digital still camera, personal media player) ? portable flash lights ? medium size lcd backlight (see application note and8294/d for details) c1 4.7 f 2.7 to 5.5 v c2 1 f d6 2 to 5 leds 10.0 2.0 d2 enable ncp5050 pca 5 vs 2 lcs 8 ctrl 3 hcm 4 hcs 6 fb 7 pgnd 1 pvin 9 sw 10 r1 2.8 k l1 2.2 h d1 l1: tdk vlf5012t-2r2 d1: on mbr130lsf c1: 4.7 f 6.3 v 0603 tdk c1608x5r0j475m c2: 1 f 25v 0805 tdk c2012x5r1e105m figure 1. typical application circuit flash/ torch r3 r lcs r2 r hcs see detailed ordering and shipping information in the package dimensions section on page 13 of this data sheet. ordering information marking diagram http://onsemi.com a = assembly location l = wafer lot y = year w = work week = pb-free package (note: microdot may be in either location) 5050 alyw wdfn10, 3x3, 0.5p case 522aa-01 issue a 1 2 3 4 5 10 9 8 7 6 pgnd vs ctrl cm pca sw pvin lcs fb hcs pin connections (top view)
ncp5050 http://onsemi.com 2 figure 2. typical efficiency 0 10 20 30 40 50 60 70 80 90 10 100 1000 i out (ma) efficiency (%) v out = 2 leds (7.0 v @ 350 ma) v in = 3.7 v c2 1 f 0805 25v 250k 2.7 h l1 enable 2.7 to 5.5 v up to 20 v / 4.5 w 2 to 5 leds d6 d1 fb pgnd hcs ctrl pca cm pvin 2.8k r1 2.0 vs ovp osc 1.7mhz pwm controller thermal shut down 250k c1 d2 10.0 lcs figure 3. simplified block diagram 1 5 3 1 band gap 4 8 6 7 2 sw 10 r3 r lcs r2 r hcs c in 4.7 f 0603 6.3 v c out flash/torch
ncp5050 http://onsemi.com 3 pin function description pin pin name type description 1 pgnd power power ground : this pin is the power ground and carries the high switching current. a high quality ground must be provided to avoid any noise spikes/uncontrolled operation. cares must be observed to avoid high-density current flow in a limited pcb copper track. 2 vs input voltage sense : in order to sense v out notably for over voltage protection, this input must be connected to the output bypass capacitor c out . 3 ctrl input control and enable : an active high logic level on this pin enables the device. a built-in pulldown resistor disables the device if the pin is left open. also in disable condition the device provide a true cut-off thank to the high impedance on fb input. this pin can also be used to control the average current into the load by applying a low frequency pwm signal. if a pwm signal is applied, the frequency should be high enough to avoid optical flicker but be no greater than 50 khz. 4 cm input current mode : an active high logic on this input enables the high current sense used for flash and disables the lcs resistor. this pin has a low voltage threshold so it can be driven directly from 1.8 v logic signals. if this function is not needed, this pin should be grounded. only when cm pin is high, a safety function switch off the output if ctrl pin is high longer than 1.2 s 5 pca input peak current adjust : a resistor between this input and ground controls the maximum peak current allowed in the inductor. the minimum value for this resistor is 2.8 k and increasing this value decreases the peak current. this allows the user to adjust the current based on the application needs and scale the size of the inductor accordingly. see switch current limit guidelines in application section. 6 hcs input high current sense : this pin is used for flash mode. if the user desires two levels of led current then a resistor should be connected from this pin to ground. this function is controlled by the cm input. 7 fb input feedback : the reference is 250 mv. this pin provides the feedback voltage by means of the sense resistors fixed by lcs or hcs pin. when the device is enables and cm low, the lcs resistor is connected to this pin, thereby the lcs setup the led current. the tolerance of the led current is dependant upon the accuracy of this sense resistor and a 1% metal film resistor, or better, is recommended for best output accuracy. 8 lcs input low current sense : this pin is used for torch mode. in order to fix the current when cm logic pin is low, a resistor should be connected from this pin to ground. 9 pvin power power supply : the external voltage supply is connected to this pin. a 4.7 f / 6.3 v high quality capacitor must be connected across this pin and the power ground to achieve the specified output power parameters. the x5r low c/c versus dc bias ceramic types are highly recommended. 10 sw input switch : power switch connection for inductor. typical application will use a coil from 2.2 h - 4.7 h and must be capable of handling the peak current.
ncp5050 http://onsemi.com 4 maximum ratings (note 1) rating symbol value unit power supply voltage (note 2) p vin 7.0 v over voltage protection v s 25 v human body model (hbm) esd rating (note 3) hcs and fb pins esd hbm 2000 1000 v machine model (mm) esd rating (note 3) hcs and fb pins esd mm 200 150 v digital input voltage digital input current ctrl, cm -0.3 < v in < v bat + 0.3 1.0 v ma wdfn 3x3 package power dissipation @ t a = +85 c thermal resistance, junction-to-case thermal resistance, junction-to-air p d r jc r ja (note 5) 10 (note 6) w c/w operating ambient temperature range t a -10 to +85 c operating junction temperature range t j -10 to +125 c maximum junction temperature t jmax +150 c storage temperature range t stg -65 to +150 c moisture sensitivity level (note 7) msl 1 stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above t he recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may af fect device reliability. 1. maximum electrical ratings are defined as those values beyond which damage to the device may occur at t a = 25 c. 2. according to jedec standard jesd22-a108b. 3. this device series contains esd protection and passes the following tests: human body model (hbm) per jedec standard: jesd22-a114 for all pins. machine model (mm) per jedec standard: jesd22-a115 for all pins. 4. latch up current maximum rating: 100 ma per jedec standard: jesd78. 5. the thermal shutdown set to 160 c (typical) avoids irreversible damage on the device due to power dissipation. 6. for the 10-pin 3x3 wdfn package, the r ja is highly dependent on the pcb heat-sink area. for example, r ja can be 61 c/w for 2 layers board having 51 mm 2 dissipation area on circuit side and board size ground plane on other side. 7. per ipc/jedec standard: j-std-020a. 8. the maximum package power dissipation limit must not be exceeded. p d 125 t a r ja
ncp5050 http://onsemi.com 5 electrical characteristics minimum and maximum limits apply for t a between -10 c to +85 c and v in between 2.7 v to 5.5 v (unless otherwise noted). typical values are referenced to t a = +25 c and v in = 3.6 v (unless otherwise noted) characteristics symbol min typ max unit operating power supply v in 2.7 - 5.5 v maximum inductor current (notes 9 and 11) (see figure 24) refer switch current limit section @ 25 c i peak_max 1.0 - 3.0 a power switch on resistor t a = 25 c (i = 100 ma) swr dson - 200 - m high current sense switch on resistor (i = 100 ma and 25 c) hcssr dson - 250 - m low current sense switch on resistor (i = 100 ma and 25 c) lcssr dson - 750 - m pwm oscillator frequency f osc 1.48 1.7 1.95 mhz maximum duty cycle m duty 91.5 94 - % efficiency (notes 9 and 10) e ff 85 90 % over-voltage clamp voltage ovp on 20 - - v over-voltage clamp hysteresis ovp h - 1.0 - v output power (notes 9 and 12) @ v in = 3.3 v @ v in = 2.7 v p out 4.5 2.8 - - - - w feedback voltage ripple rejection @ i out = 20 ma from dc to 300 hz (0.2 v pp ) (note 9) l reg 5.0 2.5 mv feedback voltage in steady state.@ t a = 25 c f bv 215 250 285 mv input feedback current (cm = low) i fb - - 0.15 a v in undervoltage lockout v in decreasing u vlo 2.0 2.7 v undervoltage lockout hysteresis u vloh - 100 - mv standby current, i out = 0 ma, ctrl = low, v in = 4.2 v @ t a = 25 c i stdb - - 2.0 a quiescent current, i out = 0 ma, not switching @ t a = 25 c iq nosw - - 2.0 ma startup time (note 9) from ctrl =1.2 v to start of switching s trt - 50 200 s inrush peak current limit (note 9) time constant i pcl - 1 - ms upper limit of pwm dimming frequency (note 9) d im - - 50 khz time out protection (note 9) t out -15% 1.2 +15% s thermal shutdown protection (note 9) t sd - 160 - c thermal shutdown protection hysteresis (note 9) t sdh - 20 - c voltage input logic low (pin cm, ctrl) v il - - 0.4 v voltage input logic high (pin cm, ctrl) v ih 1.2 - - v ctrl and cm pin pulldown resistance r pld 175 250 375 k 9. guaranteed by design and characterized 10. efficiency is defined by 100 * (p out / p in ) at 25 c v in = 4.2 v, l = tdk vlf5014a-2r7m1r5 load = 80 ma, 4 led (v f = 3.5 v per led, c out = 1 f x5r 11. the overall tolerance is dependent on the accuracy of the external resistor. a 1% tolerance metal film resistor is recommend ed to achieve i peak_max 20 % accuracy. 12. with schottky diode mbr130lsf and tdk vlf5014a-2r7m1r5 inductor.
ncp5050 http://onsemi.com 6 typical operating characteristics figure 4. maximum output current available vs. v out figure 5. typical maximum output current vs. input voltage, l = tdk vlf5014a-2r7m1r5 (note 13) figure 6. efficiency vs. current @ 2 leds (7.0 v @ 350 ma), l = tdk vlf5014a-2r7m1r5, (notes 13 and 14) figure 7. efficiency vs. current @ 3 leds (10.5 v @ 350 ma), l = tdk vlf5014a-2r7m1r5, (notes 13 and 14) figure 8. efficiency vs. current @ 4 leds (14 v @ 350 ma), l = tdk vlf5014a-2r7m1r5, (notes 13 and 14) figure 9. efficiency vs. current @ 5 leds (17.5 v @ 350 ma), l = tdk vlf5014a-2r7m1r5 (notes 13 and 14) 0 200 400 600 800 1000 5 10152025 v out (v) v in = 3.8 v i out (ma) v in = 4.2 v v in = 3.3 v operating area 0 200 400 600 800 1000 1200 2.5 3.0 3.5 4.0 4.5 5.0 5.5 i out (ma) v in (v) 2 leds 3 leds 4 leds 5 leds 10 100 1000 50 60 70 80 90 i out (ma) efficiency (%) v in = 5.0 v v in = 4.2 v v in = 3.7 v v in = 3.3 v 50 60 70 80 90 10 100 1000 i out (ma) efficiency (%) v in = 5.0 v v in = 4.2 v v in = 3.7 v v in = 3.3 v 50 60 70 80 90 10 100 1000 i out (ma) efficiency (%) v in = 5.0 v v in = 4.2 v v in = 3.7 v v in = 3.3 v 50 60 70 80 90 10 100 1000 v in = 3.3 v v in = 5.0 v v in = 4.2 v v in = 3.7 v 13. pulse of 500 ms every 3 s in flash mode (current following through hcs pin). 14. efficiency = 100 x (number of led stacked x v led x i led )/p in .
ncp5050 http://onsemi.com 7 typical operating characteristics figure 10. typical v out ripple in ovp condition, no load figure 11. continue current mode (ccm), i out = 100 ma figure 12. discontinuous current mode (dcm), i out = 20 ma figure 13. . startup for 3 leds operating, i leds : 100 ma, r sense = 2.5 figure 14. low frequency dimming control, f = 250 hz figure 15. high frequency dimming control, f = 20 khz channel 2:v out ac measurement, 500 mv/div channel 1:v out dc measurement, 5 v/div channel 1:sw pin dc measurement, 5 v/div channel 4:led current dc measurement, 200 ma/div channel 4:led current dc measurement, 100 ma/div channel 1:sw pin dc measurement, 5 v/div channel 1:crtl pin dc measurement, 5 v/div channel 2: fb pin, 200 mv/div channel 3: input current, 200 ma/div channel 4: led current, 500 mv/div, t = 50 s/div channel 1: ctrl pin, 5 v/div, dc measurement channel 2: fb pin, dc, 200 mv/div channel 3: input current, 200 ma/div channel 4: iled, 50 ma/div, t = 1.0 ms/div channel 1: ctrl pin, 5 v/div, dc measurement channel 2: fb pin, 200 mv/div, dc measurement channel 3: input current, 500 ma/div channel 4: iled, 50 ma/div, t = 10 s/div
ncp5050 http://onsemi.com 8 typical operating characteristics figure 16. dimming on ctrl: i out rms vs. duty cycle r bf = 5 , f = 20 khz figure 17. dimming on ctrl: i out rms vs. frequency r bf = 5 0.0 5.0 10.0 15.0 20.0 25.0 30.0 35.0 40.0 45.0 50.0 0 102030405060708090100 duty cycle (%) i out rms (ma) 0.0 5.0 10.0 15.0 20.0 25.0 30.0 35.0 40.0 45.0 50.0 0 1020304050 frequency (khz) i out rms (ma) duty = 80% duty = 50% duty = 20%
ncp5050 http://onsemi.com 9 detail operating description cm fb lcs hcs ref enable mbr130lsf d1 2.0 10.0 250k pvin time out fb ipeak comp pwm comp fb ref max d nmos ovp ref pgnd ovp c1 2.7 to 5.5 v 4.7uf x5r 6.3v uvlo ref set rst clock uvlo 250k osc 1.7 mhz sw ipeak max vs 1uf x5r 0805 25v ctrl m duty ref thermal protection uvlo comp max duty cycle comp ovp comp 3 ctrl pca d5 2 to 5 leds d2 2.8k fb figure 18. functional block diagram 8 6 5 sense current 2 10 1 one shot 7 4 - + - + - + ramp comp driver - + 1 - + - + c2 c out l1 2.7 h flash/torch r lcs r hcs 250m 750m r pca operation the ncp5050 dc-dc converter is based on a current mode pwm architecture which regulates the feedback voltage at 250 mv under normal operating conditions. the boost converter operates in two separate phases (see figure 19). the first one is t on when the inductor is charged by current from the battery to store up energy, followed by t off step where the power is transmitted through the external rectifier to the load. the capacitor c out is used to store energy during the t off time and to supply current to the load during the t on stage thus constantly powering the load. il sw ton toff 588 ns iout ipeak start cycle ivalley figure 19. basic dc-dc operation the internal oscillator provides a 1.7 mhz clock signal to trigger the pwm controller on each rising edge (set signal) which starts a cycle. during this phase the low side nmos switch is turned on thus increasing the current through the inductor. the switch current is measured by the sense current and added to the ramp comp signal. then pwm comp compares the output of the adder and the signal from error amp. when the comparator threshold is exceeded, the nmos switch is turned off until the rising edge of the next clock cycle. in addition there are five functions w hich can reset the flip-flop logic to switch off the nmos. the max duty cycle comp monitors the pulse w idth and if it exceeds 94% (nom) of the cycle time the switch will be turned off. this limits the switch from being on for more than one cycle. thank to i peak comp, the current through the inductor is monitored and compared with the i peak_max threshold setup by r pca (see inductor selection). if the current exceeds this threshold the controller is w ill turn off the nmos switch for the remainder of the cycle. this is a safety function to prevent any excessive current that could overload the inductor and the power stage. the three other safety circuits are, ovp, uvlo, and thermal protection. please refer to the details in following sections. the loop stability is compensated by the error amp built in in tegrator. the gain and the loop bandwidth are fixed
ncp5050 http://onsemi.com 10 internally and provide a phase margin greater than 45 whatever the current supplied or the battery voltage. led current selection two different currents can be setup by external resistor. the first one is setup by low current sense resistor (r lcs ) connected between lcs pin and gnd. usually lcs pin is used to determine the lower current for torch mode or indicator m ode. the second current is setup by high current sense resistor (r hcs ) connected between the hcs pin and gnd. hcs pin is dedicated setup the current for flash mode (see timeout section). an active high logic level is applies to cm input, r hcs resistors is selected when a low level on this pin select the r lcs resistor. the control loop regulates the current such that the average voltage to hcs or lcs pin is 250 mv (nominal). for example, should one need a 20 ma low output current (i outl ) in the led branch, r lcs should be selected according to the following equation: r lcs f bv i outl 250mv 20ma 12.5 (eq. 1) in high current mode (i outh ), when an active high logics level is applies to cm input, r hcs should be selected according to the following equation: r hcs f bv i outh 250mv 500ma 0.5 (eq. 2) led dimming in white led applications it should be desirable to operate the leds at a specific operating current because as the biasing current is changed as the color is shifting. as a result of this effect, it should be recommended to fix the maximum current wishes accordingly equations 1 and 2 and to dim the led brightness by a pulse width modulation techniques. the pwm signal is applied to ctrl input and thereby the rms current through led is proportional to the duly cycle (see figure 16). in other word by reducing the duty cycle the brightness of the led is dimmed. the ncp5050 as been design to sustain high pwm dimming frequency up to 50 khz. finally to avoid any optical flicker the frequency must be at least higher than 100 hz. inductor selection three main electrical parameters need to be considered when choosing an inductor: the value of the inductor, the saturation current and the dcr (parasitic serial resistance in dc). firstly, thank to the high switching frequency at 1.7 mhz (nominal), the ncp5050 allows choosing a low inductor value. this is a key feature mainly in portable application because as inductor value in lower as inductor size in smaller. the recommended inductor value should range from 2.2 h to 4.7 h. in one hand higher the inductor value is lower the ripple of current is and in theory better the efficiency is. but in other hand for a given inductor package size and magnetic material, higher the inductor value is worst the saturation current and dcr are. so a good compromise is to use a 2.7 h with better dcr possible. secondly we have to consider the maximum peak current through the inductor (i peak ). obviously, the peak current inductor is higher when this device supplies the maximum required current so in heavy load conditions. in this case this device is intended to operate in continuous conduction mode (ccm) so the following equation below can be used to calculate the peak current: i peak i out (1 d) v in d 2lf (eq. 3) in the equation above, v in is the battery voltage, i out is the load current, l the inductor value, f the switching frequency, and the duty cycle d is given by: d 1 v in v out (eq. 4) is the global converter efficiency which vary with load current (see figure 6 though figure 9). if we select an excessive load current, the global efficiency will be too poor and power dissipation (p d ) excessive (see maximum ratings). a good compromise is to use in worst case = 0.75. the dotted curve in figure 20 through figure 23 gives the inductor peak current as a function of i out , at v in = 3.3 v, and the number of leds in series (v f = 3.5 typical). it is important to analysis this at worst case conditions to ensure that the inductor current rated is high enough such that it not saturate. so for that refer to the continuous line named switch current limit setup by r pca in figure 20 through figure 23 that gives peak current which the inductor has to withstand. 0 500 1000 1500 2000 2500 3000 100 200 300 400 500 600 figure 20. inductor peak currents vs. i out (ma) for 2 leds, (7.0 v @ 350 ma) i out (ma) i peak (ma) switch current limit setup by r pca operating inductor peak current
ncp5050 http://onsemi.com 11 figure 21. inductor peak currents vs. i out (ma) for 3 leds, (10.5 v @ 350 ma) 0 500 1000 1500 2000 2500 3000 50 150 250 350 450 i out (ma) i peak (ma) switch current limit setup by r pca operating inductor peak current 0 500 1000 1500 2000 2500 3000 figure 22. inductor peak currents vs. i out (ma) for 4 leds, (14 v @ 350 ma) 50 150 250 350 i out (ma) i peak (ma) switch current limit setup by r pca operating inductor peak current figure 23. inductor peak currents vs. i out (ma) for 5 leds, (17.5 v @ 350 ma) 0 500 1000 1500 2000 2500 3000 25 75 125 175 225 i out (ma) i peak (ma) switch current limit setup by r pca operating inductor peak current finally, an acceptable dcr must be selected regarding losses in the coil and must be lower than 100 m to limit excessive voltage drop. in addition, as dcr is reduced, overall efficiency will improve. some recommended inductors include but are not limited to: tdk vlf5012a-2r2m1r5 tdk vlf5014a-2r7m1r5 tdk rlf7030t-3r3m4r1 switch current limit this safety feature is clamping the maximum current allowed in the inductor according to external rpca resistor, which is connected between pca input and the ground. this allows the user to reduce the peak current being drawn according to the application's specific requirements. the i peak maximum is 3.0 a, resulting in a minimum resistor value of 2.8 k . after selecting the switch current limit in section above, please refer to t able 1 or figure 24 below to choose r pca value versus i peak_max accordingly. by limiting the peak current to the needs of the application, the inductor sizing can be scaled appropriately to the specific requirements. this allows the pcb footprint to be minimized. table 1. i peak_max versus r pca i peak_max (a) r pca (k 1%) 3.0 2.8 2.5 3.4 2.0 4.12 1.5 5.76 1.0 9.09 figure 24. i peak_max vs. r pca 0 500 1000 1500 2000 2500 3000 3500 1.0 10 100 r pca (k ) i peak max (ma) input and output capacitors selection c out stores energy during the t off phase and sustains the load during the t on phase. in order ensure the loop stability and minimize the output ripple, at least 1.0 f low esr multilayer ceramic capacitor type x5r is recommended. increasing the c out capacitor improved the output voltage ripple.
ncp5050 http://onsemi.com 12 the p vin input pin need to be bypassed by a x5r or an equivalent l ow esr ceramic capacitor. near the p vin pin at least 4.7 f 6.3 v or higher capacitor is needed. also a particular care must be observed for dc-bias effects in ceramic capacitor. actually smaller the case-size and higher the dc bias voltage, the bigger drop in capacitance. for a stability viewpoint the percentage drop in capacitance for the chosen input or output operating voltage must be limit to 20%. some recommended capacitors include but are not limited to: 1.0 f 25 v 0805 tdk: c2012x5r1e105m 4.7 f 6.3 v 0805 tdk: c1608x5r0j475m schottky diode selection an external diode is required for the boost rectification. the reverse voltage rating of the selected diode must be equal to or greater than the maximum output voltage. the average current rating of the diode must be greater than the maximum output load current. the peak current rating must be larger than the maximum peak inductor current. it is recommended to use a schottky diode with lower forward voltage to minimize the power dissipation and therefore to maximize the efficiency of the converter. also a particular care must be observed for parasitic capacitance versus reverse voltage and leakage current versus junction diode temperature. both parameters are impacting the ef ficiency in low load condition and switching quiescent current. some recommended schottky diodes include but are not limited to: on semiconductor: mbr130lsft1g on semiconductor: mbr120lsft3g timeout protection to avoid a failure in leds caused by a timing violation in flash mode (cm high), a timeout function turn off the output after 1.2 second. any rising edge of ctrl reset this function. in torch mode (cm low) this circuit is disabled. for the logic diagram please refer to figure 25 below. cm ctrl flash timeout torch current figure 25. timeout operation 1.2s overvoltage protection (ovp) the ncp5050 regulates the load current. if there is an open load condition such as a loose connection to the white led, the converter keeps supplying current to the c out capacitor causing the voltage to rise rapidly. to prevent the device from being damage and to eliminate external protections such as zener diode, the ncp5050 incorporates an ovp circuit, which monitors the output voltage with a resistive divider network and a comparator and voltage reference. if the output reaches 22.5 v (nominal), the ovp circuit will detect a fault and inhibit pwm operation. this comparator has 1.0 v of hysteresis so allow the pwm operation to resume automatically. when the load is reconnected and the voltage drops below 21.5 v (nominal). undervoltage lock out (uvlo) to ensure proper operation under all conditions, the device has a built-in undervoltage lock out (uvlo) circuit. during power-up, the device will remain disabled until the input voltage exceeds 2.4 v (nominal). this circuit has 100 mv of hysteresis to provide noise immunity to transient conditions. thermal considerations careful attention must be paid to the internal power dissipation of the ncp5050. the power dissipation is a function of efficiency, input voltage and output power. hence, increasing the output power requires better components selection. for example, should one change inductors: larger inductor value (in micro henri) and/or lower dcr may improve efficiency. the exposed thermal pad that is designed to be soldered to the ground plane to used the pcb as a heat-sink. this ground should then be connected to an internal copper ground plane with thermal via placed directly under the package to spread out the heat dissipated by the device. finally the ncp5050 is switched off to protect the device if junction temperature exceeds 160 c. when the junction temperature drops below 140 c, normal operation will resume.
ncp5050 http://onsemi.com 13 ordering information1 device package shipping ? ncP5050MTTXG wdfn-10 3x3 mm (pb-free) 3000/tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specification brochure, brd8011/d. demo board available: ? the ncp5050evb/d evaluation board that configures the device to drive high current through white led in serial. application note available: ? and8294: drive up to 120 leds (6 to 10 in series configuration)
ncp5050 http://onsemi.com 14 package dimensions wdfn10, 3x3, 0.5p case 522aa-01 issue a notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters. 3. dimension b applies to plated terminal and is measured between 0.15 and 0.30mm from terminal. 4. coplanarity applies to the exposed pad as well as the terminals. c a seating plane d b e 0.15 c a3 a a1 2x 2x 0.15 c dim a min nom max millimeters 0.70 0.75 0.80 a1 0.00 0.03 0.05 a3 0.20 ref b 0.18 0.24 0.30 d 3.00 bsc d2 2.45 2.50 2.55 e 3.00 bsc 1.75 1.80 1.85 e2 e 0.50 bsc 0.19 typ k pin one reference 0.08 c 0.10 c 10x a 0.10 c note 3 l e d2 e2 b b 5 6 10x 1 k 10 10x 10x 0.05 c 0.35 0.40 0.45 l top view side view bottom view *for additional information on our pb-free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* 2.1746 2.6016 1.8508 0.5000 pitch 0.5651 10x 3.3048 0.3008 10x dimensions: millimeters on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. typical parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including typicals must be validated for each custom er application by customer's technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800-282-9855 toll free ?usa/canada europe, middle east and africa technical support: ?phone: 421 33 790 2910 japan customer focus center ?phone: 81-3-5773-3850 ncp5050/d literature fulfillment : ?literature distribution center for on semiconductor ?p.o. box 5163, denver, colorado 80217 usa ? phone : 303-675-2175 or 800-344-3860 toll free usa/canada ? fax : 303-675-2176 or 800-344-3867 toll free usa/canada ? email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your loca l sales representative

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