cystech electronics corp. spec. no. : c805q8 issued date : 2009.12.30 revised date :2011.03.21 page no. : 1/9 MTNN20N03Q8 cystek product specification n-channel enhancement mode power mosfet MTNN20N03Q8 n-ch 1 n-ch 2 bv dss 30v 60v i d 8a 0.115a r dson(max) 20m 5 description the MTNN20N03Q8 provides the designer with the best combination of fast switching, ruggedized device design, low on-resistance and cost effectiveness. the sop-8 package is universally preferred for all co mmercial-industrial surface mount applications and suited for low voltage applications such as dc/dc converters. features ? simple drive requirement ? low on-resistance ? fast switching speed ? two n-ch mosfets in a package ? pb-free lead plating package equivalent circuit outline MTNN20N03Q8 sop-8 s source d drain g gate
cystech electronics corp. spec. no. : c805q8 issued date : 2009.12.30 revised date :2011.03.21 page no. : 2/9 MTNN20N03Q8 cystek product specification absolute maximum ratings (ta=25 c) limits parameter symbol n-ch 1 n-ch 2 unit drain-source voltage v ds 30 60 v gate-source voltage v gs 20 20 v continuous drain current @ t c =25 c (note 1) i d 8 0.115 a continuous drain current @ t c =100 c (note 1) i d 6 0.08 a pulsed drain current (note 2&3) i dm 32 0.7 a pd 2 0.4 w total power dissipation @ t a =25 c linear derating factor 0.016 0.016 w / c esd susceptibility (note 4) 1250 v operating junction temperature tj -55~+150 c storage temperature tstg -55~+150 c thermal resistance, junction-to-ambient (note 1) rth,ja 62.5 c/w note : 1. su rface mounted on 1 in2 copper pad of fr-4 board; 135 c/w when mounted on minimum copper pad. 2. pulse width lim ited by maximum junction temperature. 3. pulse width 300 s, duty cycle 2%. 4 . human body model, 1.5k in series with 100pf characteristics (tj=25 c, unless otherwise specified) n-channel mosfet 1 symbol min. typ. max. unit test conditions static bv dss 30 - - v v gs =0, id=250 a v gs(th) 1.0 1.5 3.0 v v ds = v gs , i d =250 a g fs - 16 - s v ds =5v, i d =8a i gss - - 100 na v gs = 20 - - 1 v ds =24v, v gs =0 i dss - - 25 a v ds =20v, v gs =0, tj=125 c - 15.5 20 v gs =10v, i d =8a *r ds(on) - 23 31 m v gs =5v, i d =6a dynamic *qg(v gs =10v) - 11 - *qg(v gs =5v) - 6 - *qgs - 1.2 - *qgd - 3.3 - nc i d =8a, v ds =15v, v gs =10v *td (on) - 11 - *tr - 16 - *td (off) - 36 - *tf - 20 - ns v ds =15v, i d =1a,v gs =10v, r g =6 ciss - 1115 - coss - 116 - crss - 82 - pf v gs =0v, v ds =15v, f=1mhz rg - 2 - v gs =15mv, v ds =0v, f=1mhz
cystech electronics corp. spec. no. : c805q8 issued date : 2009.12.30 revised date :2011.03.21 page no. : 3/9 MTNN20N03Q8 cystek product specification source-drain diode *i s - - 2.3 *i sm - - 9.2 a *v sd - - 1.2 v i f =i s, v gs =0v *trr - 50 - ns *qrr - 2 - nc i f =i s , v gs =0, di/dt=100a/ s n-channel mosfet 2 symbol min. typ. max. unit test conditions bv dss* 60 - - v v gs =0, i d =10 a v gs(th) 1 - 2.5 v v ds =v gs , i d =250 a i gss - - 10 a v gs =20v, v ds =0 i dss - - 1 a v ds =60v, v gs =0 - 3.6 5.5 i d =100ma, v gs =5v r ds(on)* - 3 5 i d =100ma, v gs =10v g fs 100 - - ms v ds =10v, i d =100ma c iss - 30.5 - c oss - 9.3 - c rss - 5.9 - pf v ds =10v, v gs =0, f=1mhz *pulse test : pulse width 300 s, duty cycle 2% ordering information device package shipping MTNN20N03Q8 sop-8 (pb-free lead plating package) 3000 pcs / tape & reel typical characteristics n-ch mosfet 1 v - drain source voltage(v) i - drain current(a) 0 0 d 10 ds 12 6v 20 30 7v 5v 3.5v 3 4 4v 5 4.5v on-region charact erist ics 5 15 25 v = 10v gs 4.5 v i - drain current(a) r -normalized drain-source on-resistance 1.6 0.8 0 ds(on) 1.2 1.0 1.4 6 d 12 gs v = 3.5 v 2.2 1.8 2.0 2.4 4.0 v 18 24 7.0 v 6.0 v 5.0 v 10 v 30 on-resistance variation with drain current and gate voltage
cystech electronics corp. spec. no. : c805q8 issued date : 2009.12.30 revised date :2011.03.21 page no. : 4/9 MTNN20N03Q8 cystek product specification on-resist ance variat ion wit h temperat ure r - normalized drain-source on-resistance ds(on) t - junction temperature ( c) 0.4 -50 0.7 1.0 0 j -25 25 d i = 8a v = 10v 1.3 1.6 1.9 gs 125 50 75 100 150 on-resi stance variation with gate-to-source voltage t = 125 c v - gat e-sour ce volt age( v ) 0.01 2 ds(on) 0.02 0.04 0.03 gs 4 6 t = 25 c a a 0.08 0.06 0.05 0.07 0.09 81 0 i = 8 a d r - on-resist ance( ) body diode forward voltage variation with source current and temperature 25 c t = 125 c v - body diode forward voltage( v ) is - reverse drain current( a ) 0.001 0 0.01 0.1 0.4 sd 0.2 0.6 v = 0v 1 10 100 a gs 1.0 0.8 1.2 -55 c 1.4 t = -55 c v - gat e-sour ce vol t age( v ) i - drain current(a) 1 d 5 0 10 2.0 1.5 gs v = 10v 20 15 25 30 ds a 3.0 2.5 3.5 25 c 125 c transfer charact erist ics q - gate charge( nc ) v - gat e-sour ce vol t age( v ) gs 0 0 2 4 g 48 i = 8a 6 8 10 d 12 16 gat e charge charact erist ics 15v 10v v = 5v ds v - dr ai n-sour ce vol t age( v ) capacitance(pf ) 0 0 ds 5 10 15 20 gs f = 1mhz v = 0 v ca p a c i t a n c e ch a r a c t e r i st i c s 25 30 150 300 450 600 750 900 1500 1200 1350 1050 ci ss co ss cr ss
cystech electronics corp. spec. no. : c805q8 issued date : 2009.12.30 revised date :2011.03.21 page no. : 5/9 MTNN20N03Q8 cystek product specification dc v - dr ai n-sour ce vol t age( v ) maximum safe operating area i - drain current( a ) v = 10v si n g l e pu l se r = 125 c/ w t = 25 c 0.1 0.01 d 0.1 ds 1 ja a gs r limit 1 10 100 ds(on) 10s 10 100 100 s 10ms 100ms 1s 1ms p( pk ),peak transient power( w ) 20 0 10 30 40 50 si n g l e pu l se r = 125 c/ w t = 25 c a ja 0.001 0.01 0.1 100 10 1 1000 single pulse maximum power dissipation n-ch mosfet 2 typical output characteristics 0 0.05 0.1 0.15 0.2 0.25 0.3 01234 drain-source voltage -vds(v) drain current - id(a) vgs=2.2v 3.5v 4v 6v 3v typical transfer characteristics 0 0.05 0.1 0.15 0.2 0.25 0.3 01234 gate-source voltage-vgs(v) drain current -id(a) vds=10v static drain-source on-state resistance vs drain current 1 10 0.01 0.1 1 drain current-id(a) static drain-source on-state resistance-rds(on)() vgs=5v static drain-source on-state resistance vs drain current 1 10 0.01 0.1 1 drain current-id(a) static drain-source on-state resistance-rds(on)() vgs=10v
cystech electronics corp. spec. no. : c805q8 issued date : 2009.12.30 revised date :2011.03.21 page no. : 6/9 MTNN20N03Q8 cystek product specification static drain-source on-state resistance vs gate-source voltage 0 1 2 3 4 5 6 7 0 5 10 15 20 25 gate-source voltage-vgs(v) static drain-source on-state resistance-rds(on)() id=100ma id=50ma reverse drain current vs source-drain voltage 0.001 0.01 0.1 1 10 0 0.2 0.4 0.6 0.8 1 reverse drain current -idr(a) source-drain voltage-vsd(v) capacitance vs drain-to-source voltage 1 10 100 0.1 1 10 100 drain-source voltage -vds(v) capacitance---(pf) c oss ciss crss
cystech electronics corp. spec. no. : c805q8 issued date : 2009.12.30 revised date :2011.03.21 page no. : 7/9 MTNN20N03Q8 cystek product specification reel dimension carrier tape dimension
cystech electronics corp. spec. no. : c805q8 issued date : 2009.12.30 revised date :2011.03.21 page no. : 8/9 MTNN20N03Q8 cystek product specification recommended wave soldering condition product peak temperature soldering time pb-free devices 260 +0/-5 c 5 +1/-1 seconds recommended temperature profile for ir reflow profile feature sn-pb eutectic assembly pb-free assembly average ramp-up rate (tsmax to tp) 3 c/second max. 3 c/second max. preheat ? temperature min(t s min) ? temperature max(t s max) ? time(ts min to ts max ) 100 c 150 c 60-120 seconds 150 c 200 c 60-180 seconds time maintained above: ? temperature (t l ) ? time (t l ) 183 c 60-150 seconds 217 c 60-150 seconds peak temperature(t p ) 240 +0/-5 c 260 +0/-5 c time within 5 c of actual peak temperature(tp) 10-30 seconds 20-40 seconds ramp down rate 6 c/second max. 6 c/second max. time 25 c to peak temperature 6 minutes max. 8 minutes max. note : all temperatures refer to topside of t he package, measured on the package body surface.
cystech electronics corp. spec. no. : c805q8 issued date : 2009.12.30 revised date :2011.03.21 page no. : 9/9 MTNN20N03Q8 cystek product specification sop-8 dimension *: typical inches millimeters inches millimeters dim min. max. min. max. 8-lead sop-8 plastic package cystek packa g e code: q8 marking: top view a b front view f c d e g part a i h j k o m l n right side view part a date code device name 20n03 dim min. max. min. max. a 0.1890 0.2007 4.80 5.10 i 0.0098 ref 0.25 ref b 0.1496 0.1654 3.80 4.20 j 0.0118 0.0354 0.30 0.90 c 0.2283 0.2441 5.80 6.20 k 0.0074 0.0098 0.19 0.25 d 0.0480 0.0519 1.22 1.32 l 0.0145 0.0204 0.37 0.52 e 0.0138 0.0193 0.35 0.49 m 0.0118 0.0197 0.30 0.50 f 0.1472 0.1527 3.74 3.88 n 0.0031 0.0051 0.08 0.13 g 0.0531 0.0689 1.35 1.75 o 0.0000 0.0059 0.00 0.15 h 0.1889 0.2007 4.80 5.10 notes: 1.controlling dimension: millimeters. 2.maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.if there is any question with packing specification or packing method, please c ontact your local cystek sales office. material: ? lead: pure tin plated. ? mold compound: epoxy resin family, flammability solid burning class: ul94v-0. important notice: ? all rights are reserved. reproduction in whole or in part is prohibited without the prior written approval of cystek. ? cystek reserves the right to make changes to its products without notice. ? cystek semiconductor products are not warranted to be suitable for use in life-support applications, or systems. ? cystek assumes no liability for any consequence of customer pr oduct design, infringement of pat ents, or application assistance .
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