cystech electronics corp. spec. no. : c560q8 issued date : 2012.04.30 revised date : page no. : 1/12 MTNN8453KQ8 cystek product specification asymmetric dual n-channel enhancement mode mosfet MTNN8453KQ8 fet1 fet 2 bv dss 30v 30v i d 6.8a 8.9a r dson(typ.) @v gs =10v 15m 15m r dson(typ.) @v gs =4.5v 23m 23m description the MTNN8453KQ8 uses advanced trench technology to provide excellent r ds(on) and low gate charge. the two mosfets make a compact and efficient switc h and synchronous rectifie r combination for use in dc-dc converters. a schottky diode in paralle l with the synchronous mosfet to boost efficiency further. the sop-8 package is universally preferred for all commercial-industrial surface mount applications. features ? simple drive requirement ? low on-resistance ? fast switching speed ? pb-free lead plating and halogen-free package equivalent circuit outline MTNN8453KQ8 sop-8 g gate s source d drain
cystech electronics corp. spec. no. : c560q8 issued date : 2012.04.30 revised date : page no. : 2/12 MTNN8453KQ8 cystek product specification absolute maximum ratings (t c =25 c, unless otherwise noted) limits parameter symbol fet 1 fet 2 unit drain-source breakdown voltage bv dss 30 30 gate-source voltage v gs 20 20 v t a =25 c, v gs =10v 6.8 8.9 continuous drain current (note 2) t a =70 c, v gs =10v i d 5.4 7.1 pulsed drain current (note 1) i dm 30 30 a 1.2 (note 2) 2 (note 2) power dissipation p d 0.7 (note 3) 1.1 (note 3) w operating junction and storage temperature range tj; tstg -55~+150 c thermal data parameter symbol value unit thermal resistance, junction-to-case, max r th,j-c 40 c/w 104 (note 2) 62.5 (note 2) c/w thermal resistance, junction-to-ambient, max r th,j-a 178 (note 3) 114 (note 3) c/w note : 1.pulse width limited by maximum juncti on temperature. 2.surface mounted on 1 in2 copper pad of fr-4 board, pulse width 10s. 3.surface mounted on minimum copper pad, pulse width 10s. fet 1 electrical characteristics (tj=25 c, unless otherwise specified) symbol min. typ. max. unit test conditions static bv dss 30 - - v v gs =0, i d =250 a v gs(th) 1.0 1.7 2.5 v v ds =v gs , i d =250 a i gss - - 100 na v gs =20v, v ds =0 - - 1 v ds =30v, v gs =0 i dss - - 10 a v ds =24v, v gs =0, tj=125 c - 15 20 v gs =10v, i d =6a *r ds(on) - 23 28 m v gs =4.5v, i d =4a *g fs - 7.6 - s v ds =5v, i d =5a dynamic ciss - 727 - coss - 79 - crss - 70 - pf v ds =15v, v gs =0, f=1mhz *td (on) - 3.7 - *tr - 3.2 - *td (off) - 10 - *tf - 3.6 - ns v ds =15v, i d =1a, v gs =10v, r g =3 *qg - 9.3 - *qgs - 2.6 - *qgd - 3.2 - nc v ds =15v, i d =6a, v gs =10v rg - 2.2 - v gs =15mv, v ds =0v, f=1mhz
cystech electronics corp. spec. no. : c560q8 issued date : 2012.04.30 revised date : page no. : 3/12 MTNN8453KQ8 cystek product specification body diode *i s - - 3 *i sm - - 12 a *v sd - 0.73 1 v v gs= 0v, i s =1a *trr - 15 - ns *qrr - 9 - nc i s =6a, v gs =0v, di/dt=100a/ s *pulse test : pulse width 300 s, duty cycle 2% fet 2 electrical characteristics (tj=25 c, unless otherwise specified) symbol min. typ. max. unit test conditions static bv dss 30 - - v gs =0, i d =250 a v gs(th) 1.0 1.7 2.5 v v ds =v gs , i d =250 a i gss - - 100 na v gs =20v, v ds =0 - - 50 a v ds =24v, v gs =0 i dss - - 25 ma v ds =24v, v gs =0, tj=125 c - 15 20 v gs =10v, i d =8a *r ds(on) - 23 28 m v gs =4.5v, i d =6a *g fs - 7.7 - s v ds =5v, i d =5a dynamic ciss - 727 - coss - 105 - crss - 70 - pf v ds =15v, v gs =0, f=1mhz *td (on) - 3.7 - *tr - 3.2 - *td (off) - 10 - *tf - 3.6 - ns v ds =15v, i d =1a, v gs =10v, r g =3 *qg - 9.6 - *qgs - 2.9 - *qgd - 3.1 - nc v ds =15v, i d =8a, v gs =10v rg - 2.2 - v gs =15mv, v ds =0v, f=1mhz body diode *i s - - 3 *i sm - - 12 a *v sd - 0.5 0.6 v v gs =0v, i s =1a *trr - 16 - ns *qrr - 10 - nc i s =8a, v gs =0v, di/dt=100a/ s *pulse test : pulse width 300 s, duty cycle 2% ordering information device package shipping marking MTNN8453KQ8 sop-8 (pb-free lead plating & halogen-free package) 2500 pcs / tape & reel 8453
cystech electronics corp. spec. no. : c560q8 issued date : 2012.04.30 revised date : page no. : 4/12 MTNN8453KQ8 cystek product specification typical characteristics : fet 1 typical output characteristics 0 5 10 15 20 25 30 01234 5 static drain-source on-state resistance vs drain current 1 10 100 1000 0.01 0.1 1 10 100 i d , drain current(a) r ds(on) , static drain-source on-state resistance(m) v gs =3v v gs =2.5v v gs =10v v gs =4.5v 10v, 9v, 8v, 7v, 6v, 5v vds, drain-source voltage(v) i d , drain current (a) v gs =2v v gs =3v 4v reverse drain current vs source-drain voltage 0.2 0.4 0.6 0.8 1 1.2 04812162 0 static drain-source on-state resistance vs gate-source voltage 0 20 40 60 80 100 120 140 160 180 200 024681 v gs , gate-source voltage(v) r ds(on) , static drain-source on- state resistance(m) i dr , reverse drain current(a) v sd , source-drain voltage(v) v gs =0v 0 i d =6a tj=25c tj=150c drain-source on-state resistance vs junction tempearture 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 -60 -20 20 60 100 140 180 tj, junction temperature(c) r ds(on) , normalized static drain- source on-state resistance v gs =10v, i d =6a capacitance vs drain-to-source voltage 10 100 1000 10000 0.1 1 10 100 v ds , drain-source voltage(v) capacitance---(pf) c oss ciss crss
cystech electronics corp. spec. no. : c560q8 issued date : 2012.04.30 revised date : page no. : 5/12 MTNN8453KQ8 cystek product specification typical characteristics(cont.) : fet 1 forward transfer admittance vs drain current 0.01 0.1 1 10 100 0.001 0.01 0.1 1 10 100 i d , drain current(a) g fs , forward transfer admittance(s) v ds =5v pulsed ta=25c gate charge characteristics 0 2 4 6 8 10 02468101214 qg, total gate charge(nc) v gs , gate-source voltage(v) i d =6a v ds =12v v ds =15v v ds =24v maximum safe operating area 0.01 0.1 1 10 100 0.1 1 10 100 v ds , drain-source voltage(v) i d , drain current(a) t a =25c, tj=150c v gs =10v, ja =104c/w single pulse dc 100ms r dson limite 100 s 10ms 1ms 1s maximum drain current vs case temperature 0 1 2 3 4 5 6 7 8 25 50 75 100 125 150 175 tj, junction temperature(c) i d , maximum drain current(a) t a =25c v gs =10v r ja =104c/w transient thermal response curves 0.001 0.01 0.1 1 1.e-04 1.e-03 1.e-02 1.e-01 1.e+00 1.e+01 1.e+02 1.e+03 t 1 , square wave pulse duration(s) r(t), normalized transient thermal resistance single pulse 0.01 0.02 0.05 0.1 0.2 d=0.5 1.r ja (t)=r(t)*r ja 2.duty factor, d=t1/t2 3.t jm -t a =p dm *r ja (t) 4.r ja =104c/w
cystech electronics corp. spec. no. : c560q8 issued date : 2012.04.30 revised date : page no. : 6/12 MTNN8453KQ8 cystek product specification typical characteristics : fet 2 typical output characteristics 0 5 10 15 20 25 30 01234 5 static drain-source on-state resistance vs drain current 1 10 100 1000 0.01 0.1 1 10 100 i d , drain current(a) r ds(on) , static drain-source on-state resistance(m) v gs =3v v gs =2.5v v gs =10v v gs =4.5v 10v, 9v, 8v, 7v, 6v, 5v vds, drain-source voltage(v) i d , drain current (a) v gs = 2v v gs =3v 4v reverse drain current vs source-drain voltage 0.2 0.4 0.6 0.8 1 1.2 0 4 8 12 16 20 i dr , reverse drain current(a) v sd , source-drain voltage(v) tj=25c tj=150c v gs =0v static drain-source on-state resistance vs gate-source voltage 0 20 40 60 80 100 120 140 160 180 200 024681 v gs , gate-source voltage(v) r ds(on) , static drain-source on- state resistance(m) 0 i d =8a drain-source on-state resistance vs junction tempearture 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 -60 -20 20 60 100 140 180 tj, junction temperature(c) r ds(on) , normalized static drain- source on-state resistance v gs =10v, i d =8a capacitance vs drain-to-source voltage 10 100 1000 10000 0.1 1 10 100 v ds , drain-source voltage(v) capacitance---(pf) c oss ciss crss
cystech electronics corp. spec. no. : c560q8 issued date : 2012.04.30 revised date : page no. : 7/12 MTNN8453KQ8 cystek product specification typical characteristics(cont.) : fet 2 forward transfer admittance vs drain current 0.01 0.1 1 10 100 0.001 0.01 0.1 1 10 100 i d , drain current(a) g fs , forward transfer admittance(s) v ds =5v pulsed ta=25c gate charge characteristics 0 2 4 6 8 10 02468101214 qg, total gate charge(nc) v gs , gate-source voltage(v) i d =8a v ds =12v v ds =15v v ds =24v maximum safe operating area 0.01 0.1 1 10 100 0.1 1 10 100 v ds , drain-source voltage(v) i d , drain current(a) t a =25c, tj=150c v gs =10v, ja =62.5c/w single pulse dc 100ms r dson limite 100 s 10ms 1ms 1s maximum drain current vs case temperature 0 2 4 6 8 10 12 25 50 75 100 125 150 175 tj, junction temperature(c) i d , maximum drain current(a) t a =25c v gs =10v r ja =62.5c/w transient thermal response curves 0.001 0.01 0.1 1 1.e-04 1.e-03 1.e-02 1.e-01 1.e+00 1.e+01 1.e+02 1.e+03 t 1 , square wave pulse duration(s) r(t), normalized transient thermal resistance single pulse 0.01 0.02 0.05 0.1 0.2 d=0.5 1.r ja (t)=r(t)*r ja 2.duty factor, d=t1/t2 3.t jm -t a =p dm *r ja (t) 4.r ja =62.5c/w
cystech electronics corp. spec. no. : c560q8 issued date : 2012.04.30 revised date : page no. : 8/12 MTNN8453KQ8 cystek product specification reel dimension carrier tape dimension
cystech electronics corp. spec. no. : c560q8 issued date : 2012.04.30 revised date : page no. : 9/12 MTNN8453KQ8 cystek product specification recommended wave soldering condition product peak temperature soldering time pb-free devices 260 +0/-5 c 5 +1/-1 seconds recommended temperature profile for ir reflow profile feature sn-pb eutectic assembly pb-free assembly average ramp-up rate (tsmax to tp) 3 c/second max. 3 c/second max. preheat ? temperature min(t s min) ? temperature max(t s max) ? time(ts min to ts max ) 100 c 150 c 60-120 seconds 150 c 200 c 60-180 seconds time maintained above: ? temperature (t l ) ? time (t l ) 183 c 60-150 seconds 217 c 60-150 seconds peak temperature(t p ) 240 +0/-5 c 260 +0/-5 c time within 5 c of actual peak temperature(tp) 10-30 seconds 20-40 seconds ramp down rate 6 c/second max. 6 c/second max. time 25 c to peak temperature 6 minutes max. 8 minutes max. note : all temperatures refer to topside of t he package, measured on the package body surface.
cystech electronics corp. spec. no. : c560q8 issued date : 2012.04.30 revised date : page no. : 10/12 MTNN8453KQ8 cystek product specification sop-8 dimension *: typical inches millimeters inches millimeters dim min. max. min. max. marking: 8-lead sop-8 plastic package cystek packa g e code: q8 top view a b front view f c d e g part a i h j k o m l n right side view part a date code device name 8453 dim min. max. min. max. a 0.1909 0.2007 4.85 5.10 i 0.0019 0.0078 0.05 0.20 b 0.1515 0.1555 3.85 3.95 j 0.0118 0.0275 0.30 0.70 c 0.2283 0.2441 5.80 6.20 k 0.0074 0.0098 0.19 0.25 d 0.0480 0.0519 1.22 1.32 l 0.0145 0.0204 0.37 0.52 e 0.0145 0.0185 0.37 0.47 m 0.0118 0.0197 0.30 0.50 f 0.1472 0.1527 3.74 3.88 n 0.0031 0.0051 0.08 0.13 g 0.0570 0.0649 1.45 1.65 o 0.0000 0.0059 0.00 0.15 h 0.1889 0.2007 4.80 5.10 notes: 1.controlling dimension: millimeters. 2.maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.if there is any question with packing specification or packing method, please c ontact your local cystek sales office. material: ? lead: pure tin plated. ? mold compound: epoxy resin family, flammability solid burning class: ul94v-0. important notice: ? all rights are reserved. reproduction in whole or in part is prohibited without the prior written approval of cystek. ? cystek reserves the right to make changes to its products without notice. ? cystek semiconductor products are not warranted to be suitable for use in life-support applications, or systems. ? cystek assumes no liability for any consequence of customer pr oduct design, infringement of pat ents, or application assistance .
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