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AN10981 greenchip tea1738 series fixe d frequency flyback controller rev. 1.1 ? 18 april 2011 application note document information info content key w ords gree nchi p, t e a1 738 , s m ps, fl yback, ad apter, n o tebo ok, lcd mon i to r . abstract the tea1738 is a low cost member of the greenchip family. it is a fixed-frequency flyback controller intended for power supplies up to 75 w for applications such as notebooks, printers and lcd monitors. http://
a n 1098 1 a l l info r m atio n pr ov ide d in thi s d o cu ment is su bje c t t o le gal dis c l a i m er s. ? nx p b . v . 201 1. al l r i ght s r e se r v ed. application note rev. 1.1 ? 18 april 2011 2 of 44 cont act information for more information, please visit: http://www.nxp.com for sales office addresses, please send an email to: salesaddresses@nxp.com nxp semiconductors AN10981 greenchip tea1738 series fixed frequency flyback controller rev i si on hi st ory rev date des c ription v . 1.1 201 1041 8 s econ d i ssue modifications: ? tea1 738g t ad ded throug hou t the app licatio n n o te. ? position of rt1 and r17 changed on figure 1 and figure 22 . v.1 20101206 first issue
a n 1098 1 a l l info r m atio n pr ov ide d in thi s d o cu ment is su bje c t t o le gal dis c l a i m er s. ? nx p b . v . 201 1. al l r i ght s r e se r v ed. application note rev. 1.1 ? 18 april 2011 3 of 44 nxp semiconductors AN10981 greenchip tea1738 series fixed frequency flyback controller 1. introduction th e tea17 38 is a fixed fr equ en cy flyba c k c ontr o ller th at ca n be use d fo r discon t i nuo us con duction m ode ( d cm ) as we ll a s con t in uo us con d u c tion m ode ( c cm ). 1.1 s cop e th is a pplicatio n note de scr i be s the fun c tion a lity o f the tea1 738 ser i es. fixe d- fr eq uen cy flyback fu nda men t als a n d calcul ation of tran sf o rme r an d othe r lar g e sign al p a rt s ar e no t dealt w i th in this application note. 1.2 f eatures ? smps c o ntroller ic enabling low cost applic ations ? l a rg e inp u t vo lt age r a n ge ( 1 2 v to 3 0 v , 3 5 v pea k allo wed for 1 00 ms) ? v e r y lo w su pp ly c u r r e n t d u r i ng s t ar t a n d re st ar t (ty p ic ally 10 a) ? l o w sup p ly cu rr ent du rin g nor ma l o per ation ( t yp ica lly 5 0 0 a, no lo ad ) ? ove r p o wer com pen sa ti on (h igh / lo w lin e co mpe n sation ) ? ad just a b l e ov er po we r tim e - o u t ? ad just a b l e ov er po we r re st a r t tim e r ? fix e d fr eq uen cy wi th f r e q u enc y j i tt er to r e d u c e emi ? fr eq uen cy re du ction with fixe d minim u m pe ak cu rr ent at low p o wer ope ra tio n to ma int a in high e f ficien cy at low output power leve ls ? fr eq uen cy incr ease du rin g pe ak p o wer ( f or m o re o u tpu t po wer fro m sa me cor e ) ? slop e comp ensatio n fo r ccm o per ation ? l o w a nd a d just ab le over cur r en t protection (ocp ) trip level ? sof t st art ? t w o inde pe nde nt ge ner al p u r pos e pr otectio n in put s comb ine d on a sing le p i n ( e .g. for ove r t e mp er atur e pro t e c tion (ot p ) an d outpu t ove r v o lt age pr otection ( o vp) ) ? inter n a l ove r v o lt ag e pr otection ( t rigg er s la tche d pr otection mo de if vcc pin ex ce ed s 3 0 v ) ? internal otp 1.3 a pplications th e tea1 738 is i n tend ed fo r a pplicatio ns th at re qui re a n e f ficien t a nd co st-e f f e c tive po wer supply solution up to 75 w such as: ? noteb ooks ? lc d m o nit o r s ? printers
a n 1098 1 a l l info r m atio n pr ov ide d in thi s d o cu ment is su bje c t t o le gal dis c l a i m er s. ? nx p b . v . 201 1. al l r i ght s r e se r v ed. application note rev. 1.1 ? 18 april 2011 4 of 44 nxp semiconductors AN10981 greenchip tea1738 series fixed frequency flyback controller 1.4 n ew features comp ared to the tea1733 th e re levan t chan ge s with r e spe c t to th e tea17 33 ar e: ? in te rn al ov er vo lt ag e pr ot ec tio n ad de d (t rig g e r s la tch e d p r ote c t i on m o de if vcc pin ex ce ed s 30 v) ? incre a sed r a ting o f the vcc clam p (7 30 a in ste a d of 20 0 a) ? ma xim u m du ty cycle incr ease d to 8 0 % ? ma xim u m on -time p r o t e c tion add ed ( ensu r es well defin ed r e st ar t at main s dip ) ? impr oved switch ing fre q u ency cu rve for h i ghe r ef ficie n cy a t low loa d ? incre a sed switch ing fre que ncy d u r i ng pe ak load ( m o r e o u tput po we r po ssible with same co re ) ? in pu t ov er vo lt ag e pr ot ec tio n r e mo ve d fr om vi nsens e p i n l a tch ver s ion ( t ea173 8l ) on ly: ? uvlo cha nge d into latche d pr otectio n (t h i s en su re s tha t a shor ted o u tput always trig ge rs la tch ed pr otection a nd whe n vcc dr op s b e low uvl o be fo re o v e r p o wer p r otection h a s a ch ance to r e spon d) 1.5 l atched version t e a1738l t th e tea17 38 is a vailab l e in a re st ar t ver s io n and a latch ve rsion . th e only dif f ere n ce b e twe en the two ve rsio ns is how the ove r power prote c tion ( o pp) a nd und e r v olt a g e l o ckout e vent s ar e ha ndle d : ? tea1 738 t , tea17 38ft , tea173 8g t : opp or uvlo e vent initiates sa fe rest a r t ? tea1 738 l t : opp o r uvlo even t set s ic in latche d of f- st ate see section 3 .4 f o r m o r e de t a iled in fo rm at ion o n th es e pr ot ec tion f e a t u r e s . 1.6 low st artup volt age versi ons tea1738ft and t e a1738g t th e tea17 38f t a n d t e a1 738 g t ve rsions ar e in ten d e d fo r ap plication s with a se p a ra te st an dby po we r supp ly such as lcd tele visio n . in this c a s e , the controller obt a ins it s vcc sup p ly d i re ctly fr om a sep a r a te st and by su ppl y . if the a v a ilable vo lt age is lower th an the 2 0 .6 v st ar ting volt a ge of th e tea17 38t , th e so lution is to u s e tea173 8ft o r tea1 738 g t with a st ar t- up voltage of only 13 v. table 1. tea1 738 series typ e ove r view th is t a b l e onl y sho w s the di fferen ces b e tween the vari ous tea17 38 version s , all othe r p r o perties are ide n tical. property t lt ft gt overpow er p r ote c ti on rest art l a t ch re st art uvl o protection rest art l a t ch re st art maximum on-time protection rest art no action vcc st a r tu p vo lt age 20.6 v 1 3 v pea k p ower frequency 78 khz 78 khz 118 khz
x xxx xx xxxx xxx xxxx xxx xxxx xxx xxx xxxx x xxxx xxx xxx xxxx xx xxxx xxx x xx x x xxx xx x xxx xxxx xxx xxx xxxx xxx xx x xxx xxxx xxx xxx xxxx xxx x x xxx x x xxxx x x x xx xxx xxx xxxx xxx xxxx xxx xxxx xxx xx xxxx xxx xxxx xxx xxxx xx xxx xxxx xxx x xx xxx xx xxxx xxx xxxx xxx xxxx x x xxx xxx xxxx xxx xx x xxx xxxx xxx xxx xxx xxx xx xxx xxx xxxx xxx xxxx xxx xxxx xxx xxx xx x xxx xxxx xxx xxxx xxx xxx xxx xxx xxxx x xxx xxx xxxx xxx xxxx xxx xxxx xxx xxx xxxx xxx xxxx xxx x xx xxx xxx xxx xxx xx x x AN10981 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. application note rev. 1.1 ? 18 april 2011 5 of 44 nxp semiconductors AN10981 greenchip tea1738 series fixed frequency flyback controller 1.7 application schematic f i g 1 . t y pica l tea1 738 a p p l icatio n sch ema t ic 019aab060 f1 cx1 330 nf 275 v c11 4.7 mf 50 v c4 100 pf 1 kv rm10 l p = 600 h c6 470 nf c7a option c17 option c19 option r13 r26 c18 c15 option option cy1 bc1 (ferrite bead) 2.2 nf 400 v option r18 d3 bas21w 6.8 h 1 k r22 10 k r15 4.7 r14 d2 1n4148w d9 mbr20100 d10 10 r12 q1 2sk3569 c5 220 nf c16 10 nf 33 k c2 4.7 nf 500 v c3 2.2 nf 630 v 6 7 2 3 1 44 turns 4 5 8 turns 8 turns c1 120 f 400 v c13 680 f 25 v c14 680 f 25 v r2 1.5 m r16 2.2 m r4 3.3 m r5 3.3 m r9 43 k r10 43 k r6 3.3 m r7 82 k d1 sa2m r23 35.7 k 1 % r25 option r24 5.1 k 1 % zd1 bzx84j-b24 r1 1.5 m lf2 3.15 a 250 v l n 5 vinsense c10 100 nf 6 protect c9 10 nf 7 ctrl r11 0.15 r20 330 r21 option c8 220 nf c7 100 nf 50 v u2-1 lvt-356t u2-2 lvt-356t u3 ap431sr 8 4 3 2 1 optimer isense driver gnd vcc tea1738 u1 lf1 bd1 kbp206g bd1b bd1a bd1d bd1c gnd + 19.5 v 3.34 a r17 5.1 k 1 % rt1 ntc 470 k at 25 c 11.2 k at 110 c
a n 1098 1 a l l info r m atio n pr ov ide d in thi s d o cu ment is su bje c t t o le gal dis c l a i m er s. ? nx p b . v . 201 1. al l r i ght s r e se r v ed. application note rev. 1.1 ? 18 april 2011 6 of 44 nxp semiconductors AN10981 greenchip tea1738 series fixed frequency flyback controller 2. pin description t a ble 2. pin de scr ip tio n pin number pin name d esc rip t io n 1v c c sup p ly vo lt age at ma ins switch-on, th e ca p a ci tor conn ecte d to this pi n i s cha r ged by an externa l st art-up circ uit. w hen the vol t a ge on the pin e x ce eds v st ar tup the ic wakes up from po wer-down mod e and checks if all other conditions are met to st art switching. w hen the vol t a ge on the pin d r o p s belo w v th (u v l o) th e tea173 8 sto p s swi t chi ng and e n ters po wer-dow n mo de. (w hen the vol t ag e rises a bove v st ar tu p a normal st art-u p procedu re is ca rri ed out.) d u ring a safe rest art pro c e dure, th is p i n is interna lly clamped to a volt age j u st ab ove v st ar tup . d u ring la tch ed protection this pi n i s in te rnall y cla m p ed to a vo lt a ge ju st abo ve v rs t (l a t c h ) to e nab le fa st latch reset af ter unp lug g ing the mai n s. an i n ternal overv o lt age protection set s the ic to la tch ed of f-st ate whe n the vo lt a ge on the vc c p i n exceed s 3 0 v for 8 co nsecutive switchin g cycl es. ? v st ar t u p = 2 0.6 v (typ . for t ea173 8t an d tea17 38l t o r 1 3 v (typ.) for tea17 38f t an d tea173 8g t ) ? v th (u v l o) = 12.2 v (typ.) ? v c l am p( v cc) du ri ng rest art = v st ar tu p +1v ? v c l am p( v cc) du ri ng la tche d protecti on = v rs t(la tch ) +1v ? v r st( latc h) =5v absolute maximum rating: v cc = 3 0 v (35 v for 100 ms). 2 g nd groun d 3 driver gate driver ou tpu t f o r mo sfet ? i so ur ce (dri v e r ) = 0 .3 a (typ.) at v driver =2v ? i sink( d river) = 0 . 3 a (t yp.) at v dri ver =2 v ? i sink( d river) = 0 .7 5 a (t yp .) at v dr i v e r =1 0v freque n c y mo du la tio n ? mo dula t i on rang e = 4k h z ? mo dula t i on fre quen cy = 2 80 hz
a n 1098 1 a l l info r m atio n pr ov ide d in thi s d o cu ment is su bje c t t o le gal dis c l a i m er s. ? nx p b . v . 201 1. al l r i ght s r e se r v ed. application note rev. 1.1 ? 18 april 2011 7 of 44 nxp semiconductors AN10981 greenchip tea1738 series fixed frequency flyback controller 4 i sense c u rr en t se nse in pu t general t h i s pin sen s es the primary cu rre n t across an exte r nal resistor a nd co mp ares it to an in te rnal co ntro l vo lt a ge. t h is internal con t rol volt age , v c t rl ( i pe ak ) is pro portion al to th e ct rl pin volt age : v c t rl( i pe ak ) =( v ctr l ? 1.1) / 5 .6. o v e r po we r pro t ecti o n w hen the vol t a ge on the isense pin e x ce eds t he overpo wer protection li mi t, the o v erpowe r timer is st ar ted: v th (se n se )o pp = 400 mv . ove r cu rre nt pro t ection t h e i n ternal con t rol vo lt a ge v c t rl ( i pe ak ) i s li mi te d to 5 00 mv wh ich also l i mit s the volt ag e on th e isense input: v s e ns e (ma x ) =5 0 0 m v . le ad in g ed ge b l a n k i n g the first 300 ns o f each switching cycle, the is en s e inp u t is i n ternal ly bl anked to p r e v ent the sp ike caused b y p a rasitic ca p a cit ance trigg e ring the pe ak cu rre n t comp a r ator p r e m atu r ely . pr op aga t io n de la y goi ng fro m de te ctin g the l e vel to switch ing o f f t h e driver t a k e s time. during that t i me the p r imary cu rre n t con t i nues to increase . how much it is a b le to increa se d epe nds on the di/d t sl ope an d th us o n th e ma ins volt age. so th e re sulting pe ak current n o t o n ly dep ends on the c t rl vol t a ge but also on the main s vol t ag e. ove rpo we r com p en sa tio n (high / lo w lin e com p en sa tio n ) w i thou t coun te r mea s u r es, the maximum output powe r (in cc m) wou l d be hi gher for h i gh i npu t vo lt ages. t o compensa t e this e f fect the in p u t volt age measure d on the vinsense p i n i s i n ternal ly co nverted to a smal l cu rre n t o n th e isense i npu t. thi s curren t cause s a vol t ag e d r op over the series resistor , limi t in g th e ma xi mu m pe ak current for hig h inpu t volt ag e. by tun ing the se ries resistor , the maxi mu m o u tp ut powe r can be made th e same fo r h igh a nd lo w mains. so f t st ar t ju st before the con v e r te r st a r t s, the sof t st art cap a citor (c5 in fig u re 1 ) is charged by an internal current source (55 a). after the capacitor has been sufficiently charged, the current source is switched off and the controller starts switching. the soft start capacitor now slowly discharges through the soft start resistor (r12 in figure 1 ), sl owly ena bli ng th e primary peak curr ent to grow . slo p e co mp ens a tio n amou nt o f slop e co mpensa t io n (re l ated to isense pin ) : 19 mv/ s the slope compensation is only acti ve at duty cycles higher than 45 %. re m a rk : r13 should be placed close to the ic. its pu rpose is to prevent negative spikes from reaching the pin (these can be rectified by t he internal esd protection diode which causes a dc offset across c5). t a ble 2. pin de scr ip tio n ? c ontinued pin number pin name description
a n 1098 1 a l l info r m atio n pr ov ide d in thi s d o cu ment is su bje c t t o le gal dis c l a i m er s. ? nx p b . v . 201 1. al l r i ght s r e se r v ed. application note rev. 1.1 ? 18 april 2011 8 of 44 nxp semiconductors AN10981 greenchip tea1738 series fixed frequency flyback controller 5 v insense in pu t v o lt a g e se ns e p i n t h i s pi n mo nitors the mai n s inpu t volt ag e. it can de te ct th ree leve ls. t he volt age o n the vinsense pin should exceed v st ar t ( vinsen se) t o be able to st art (or res t art) the convert e r . d u ring o peratio n the vol t a ge must remai n a bove v d e t( l) (vin s e n se) (for brow nout protection ), o t h e rwise the de vi ce will carry out a sa fe rest art pro c edure . t h i s pi n is i n tende d to b e co nnected to th e recti f i ed mains volt age vi a a re si sto r di vider , a ca p a citor to g r ound i s req u ired to fi lter o u t the rip p le on the rectified main s vol t a ge. ? v s t ar t(vinsense) =0 . 9 4 v ? v de t ( l) ( v i n sense) = 0 .72 v (brown out p r otecti on) see section 3.3 fo r ho w to transla te these l e vels to mai n s vo lt ages. ove r po we r com p en sa tio n the voltage on the vinsense pin is also used internally for the overpower compensation, see section 3.5 . 6p r o t e c t ge ne ral pu rpo s e p r ote c t io n i n p u t t wo ind epe nden t protection fea t u r e s can b e co nne ct ed to this pin . an in terna l cu rre n t sou r ce a t tempt s to kee p thi s p i n at 0 . 65 v . th is cu rre n t sou r ce ca n si nk 107 a and so urce 32 a. if mo re cu rre n t is requ ired to keep the volt age a t 0.65 v th e vo lt age wil l ri se above 0 . 8 v or fal l bel o w 0. 5 v a n d th e tea1738 w i ll enter latche d protecti on mode . 7c t r l pe ak cu rre nt con t ro l inp u t t h e ct rl pi n vo lt a ge is converted to an intern al control volt ag e v c t rl( i pe ak ) . if the vol t ag e me asured on the isense p i n exceed s this in ternal control volt ag e the d r iver i s swi t che d of f. ? v ct r l fo r mini mu m flyback pea k current = 1.8 v (typ.) ( v c t rl( i pe ak ) = 125 mv) ? v ct r l fo r maximum fl yback peak current = 3.9 v (typ.) (v ctr l (i pe ak) =5 0 0 m v ) ? r int(ctrl ) =7k (i nte r nall y con nected to 5.4 v ) r e latio n betwee n the ct rl pi n vo lt age an d the i n ternal con t ro l vo lt a ge: ? v c t rl( i pe ak ) =( v ctrl ? 1.1) / 5 .6 (typi c a l at 25 c) r e latio n ship b e tween the ct rl pin curre nt an d th e c t rl p i n volt age : ? v ct r l =5 . 4 v ? 7*1 0 3 *i o ( ctrl ) (typi c a l at 25 c) 8o p t i m e r ove r powe r time r and rest ar t timer bo th timer fu nctions can be more or less ind epe nden tl y ad justed. see section 3 .7 for the ca lcula t i on. t h e ratio of th ese ti me s d e termi nes th e ma ximum i npu t pow er d u ring a co ntinuo us overloa d (e.g . sho r ted o u tp ut). ove r powe r time r if the int e rnal co nt ro l vo lt ag e , v c t rl( i pe ak ) exceed s the overp o wer threshol d of 4 0 0 m v , the o v erpow er timer is activated. an i n te rnal 10 .7 a current source char ges the exter n al op t i mer cap a citor . if the overpo wer cond ition l a st s l ong e nou gh to cha r g e the op timer pin to 2.5 v , th e con t ro ller ca rries o u t a sa fe re st art proced ure (o r enter s l a tched protection mode i n th e latched versio n). if the intern al control volt age d r op s belo w 4 0 0 m v b e fore th e op t i mer pin re aches 2.5 v , the op timer ca p a citor is i m me diatel y di sch a rge d . t he minimum r e comm ended v a lue for th e op t i mer resist or is 4 7 0 k (o th erwise there is a ch ance tha t 1 0 .7 a is no t suf f icie nt to ch arge the cap a ci to r to 2 . 5 v ). th e overp o wer function ca n be disa bled b y cho o sing a resi stor low e r tha n 180 k . r est art timer w hen a sa fe rest art pro c edure is trigge red by one of th e protecti on features (via th e vinsense p i n or the op timer pin ) , th e op time r ca p a citor w ill be quickly charge d to 4.5 v b y an interna l 10 7 a current sourc e . the tea1738 enters powe r-d o wn mo de a nd d oes n o t st art aga in un ti l the externa l resistor on th e op timer pin h a s disch arged th e cap a ci to r to l e ss than 1.2 v . t a ble 2. pin de scr iptio n ? c ontinued pin number pin name description
a n 1098 1 a l l info r m atio n pr ov ide d in thi s d o cu ment is su bje c t t o le gal dis c l a i m er s. ? nx p b . v . 201 1. al l r i ght s r e se r v ed. application note rev. 1.1 ? 18 april 2011 9 of 44 nxp semiconductors AN10981 greenchip tea1738 series fixed frequency flyback controller 3. functional description 3.1 g eneral th e tea17 38 h a s b een d e sign ed for fixed - fre que ncy ccm flyb ack po we r sup p lies. t h e te a17 3 8 u s es pe ak cur r e n t co nt ro l. t h e ou tp ut volt a g e is m e asu r ed an d t r a n s f er re d b a ck via an o p tocou p ler to the ctrl p i n of th e tea173 8. 3.2 s t a rt-up 3.2 . 1 c harging the vcc cap ac itor a ca p a cito r on the vcc pin ( c 1 1 ) is char ge d by a re sistor to pr ovide th e st a r t- up po we r . as long as v cc is below v st a r t u p (2 0.6 v typ.) , the ic cur r e n t co nsump t io n is lo w ( only 10 a). when th e cap a citor is ch ar ged ab ove v st a r t u p ( 20.6 v typ.) a nd all othe r co ndition s h a ve bee n me t, th e co ntro ller st a r t s to switch. on ce th e su pply ha s st ar te d, th e tea173 8 is s u pplied by the aux iliary w i nding. for fast lat c h reset, the re sisto r must be conn ected be fore th e br idge r e ctifie r . 1 a lo w- co st a n d ef ficie n t im ple m en t a tion f o r th e st a r t - u p circ uit is t o co mb in e it wit h th e x- ca p (cx1) d i sch a r ge r e sistor . se e figu re 3 a (start-up circuit with two resistors). 1. the only way to reset the latched protection is to bring the vcc pin below 5 v. during latched protection, the supply current is only 10 a. so if the start-up resistor is connected after the bridge rectifier, the bulk capacitor would continue to feed it for a long time after unplugging the mains. fi g 2. vcc pi n 019aab05 5 c11 4.7 f 50 v 6.8 h r18 vcc 5 v latchreset 12.2 v vccstop vcc 20.6 v vccstart count to 8 driver (from driver pin) 30 v ovp switched on during restart switched on during latched protection 1 gnd 2 d3 aux winding bas21w from mains (before bridge rectifier) c7 100 nf 21.6 v 6 v
a n 1098 1 a l l info r m atio n pr ov ide d in thi s d o cu ment is su bje c t t o le gal dis c l a i m er s. ? nx p b . v . 201 1. al l r i ght s r e se r v ed. application note rev. 1.1 ? 18 april 2011 10 of 44 nxp semiconductors AN10981 greenchip tea1738 series fixed frequency flyback controller fig u r e 3 b, shows the circuit shown in figure 3 a b u t dr awn to sh ow mor e clear ly h o w th e vcc cap a citor is char ge d. once the bu lk ca p a citor c1 is fu lly cha r g ed, diod e c a nd d i ode d stop con d u c ting . dur i ng the p o sitive h a lf m a ins cycle di ode a co ndu ct s an d th e cu rr en t th ro ug h r1 ch a r g e s th e vcc ca p a c i to r (c1 1 + c 7) . dur i ng this positive half cycle, p a r t o f the cha r ge cu rr ent lea k s away into r2 . th e wor s t ca se cu rr ent th at leaks i n to r2 oc curs is w h en the vcc ca p a citor is alm o st cha r g ed: (1 ) th e valu e o f r1 an d r2 must be low e nou gh to en sure the re quir e d discha r ge time of the x- ca p (rc < 1 s ) an d also low eno ug h to o b t a in an accep t able st a r t-u p time at low m a ins volt a ge. but it must also be cho s e n to be as hig h as p o ssible to keep the no- loa d powe r co ns um p tio n as low a s p o s s ib le. som e examp l es of st ar t-u p tim e s for dif f e r e n t resistors ar e shown in ta b l e 3 . [1] p ower consumption of the combined x- cap d i sch a rge and st ar t-up circuit at 230 v ( ac) . a. s t a r t-up circu i t with two resi stors b . s imp lified rep r esent ation fi g 3. s t a r t-u p ci rcu i t wit h tw o re s i s t o r s 019aaa15 6 cx1 c11 + c7 c1 vcc r2 r1 l n bd1b bd1a bd1d bd1c 019aaa15 7 c11 + c7 r1 r2 bd1b bd1a c1 bd1d bd1c vcc n l ta ble 3. s t art-u p tim es for d i ffer e nt st ar t-u p re sistor va lu es vcc cap a cit a nce: 4.7 f + 100 nf = 4 .8 f. re sistor r1 = r2 s t art- up time at 90 v (ac) st ar t-u p time at 1 1 5 v (ac) power at 230 v (ac ) [1 ] 68 0 k 1.6 s 1.1 s 70 mw 82 0 k 2.0 s 1.4 s 59 mw 1m 2.5 s 1.75 s 4 8 m w 1.2 m 3.1 s 2.1 s 40 mw 1.5 m 4.15 s 2 .75 s 33 mw i le a k v st artup r2 -- ---- ---- ---- --- - 20.6 v 1.2 m -- ---- --- ---- ---- - - 17 a == =
a n 1098 1 a l l info r m atio n pr ov ide d in thi s d o cu ment is su bje c t t o le gal dis c l a i m er s. ? nx p b . v . 201 1. al l r i ght s r e se r v ed. application note rev. 1.1 ? 18 april 2011 11 of 44 nxp semiconductors AN10981 greenchip tea1738 series fixed frequency flyback controller fig u r e 5 shows the power co nsume d by th e comb ined st ar t-u p and x- cap discha r g e circui t as a fu nction of the st ar t- up ti me . th e gr aph sho w s ho w to save po we r: ? mo re tha n 10 m w no -lo ad p o wer can b e saved by incr easing th e st a r t-u p time (at 1 15 v ( ac )) from 2 s to 3 s . ? app r o x im ately 17 mw no- loa d po we r can be sa ve d by sp ecifyin g th e st a r t- up time at 115 v (ac) instead of 90 v (ac). fig 4. s t art-u p re sis t or va lu e as a fun c tion o f s t a r t-up time (vcc cap acit a nc e 4.8 f) fi g 5. pow er co ns ump t io n of st art-up c i r cui t a t 230 v (ac) as a function of st art- up time (vcc cap acit a nc e 4 . 8 f) start-up time (s) 1 4 3 2 019aaa158 90 v (ac) 115 v (ac) 1.2 0.8 1.6 2.0 1.0 1.4 1.8 star t-up resistors (m ) 0.6 start-up time (s) 1 4 3 2 019aaa159 90 v (a c) 115 v (a c) 60 40 80 100 po w er at 230 v (a c) (mw) 20
a n 1098 1 a l l info r m atio n pr ov ide d in thi s d o cu ment is su bje c t t o le gal dis c l a i m er s. ? nx p b . v . 201 1. al l r i ght s r e se r v ed. application note rev. 1.1 ? 18 april 2011 12 of 44 nxp semiconductors AN10981 greenchip tea1738 series fixed frequency flyback controller 3.2 . 2 m easuring s t art-up tim e cap a cit a n c e acro ss th e br idg e diod es ch ang es th e wa ve sh ape of the vo lt age b e for e the bridge rectifier w i th r e spect to the p r im ary gr ou nd. th is ca n significan t ly decr ease the st art-up time. con necting the ground c lip of an osc illo sc ope to the primary ground of the flyback co nver te r can ad d a few n f acro ss th e br idg e diod es (d epe ndin g on the cap a cit a n c e of the main s supp ly to gr ou nd) . t o me asur e th e co rr ect wor s t case st ar t- up time , ma ke sur e the b oar d ha s no ca p a citive co up lin g to pr im ar y g r o u n d : ? use a cu rr en t pr ob e in the ma ins in pu t cable to d e tect ma ins switch -o n. ? th e sa me cur r e n t p r o be in the ma ins in pu t cable can a l so be used to d e tect when th e su pp ly st ar t s switc h in g . t h e t i m e , fr om t h e m o men t the sup p ly st ar t s to switch until it r each e s 9 0 % of th e ou tp ut vo lt ag e, is on ly a fe w ms an d can b e ign o r ed with re spect to the tot a l st ar t-up time . ( i f it is re ally r e q u ir ed to mea sure th e outpu t volt a g e with an os cilloscope, the y - cap must be removed so that there is no c a p a citive coupling to p r ima r y gr oun d.) ? use a r e sisto r loa d instea d of an e l ectron ic lo ad . rem o ve y - ca p if electro n ic load must b e used. also impo rt a n t wh en me asur ing the st ar t-u p tim e : ? ma ke su re the vcc cap a citor is en tir e ly dischar ge d be fo re st ar ting a me asur eme n t. ? do n o t co nn e ct a pr ob e or m u ltim et er to th e vcc , e ve n a 10 m impedance w ill in flu ence the m easur em ent. 3.2 . 3 s t a rt-up circuit with diod es as e xplain ed in section 3 .2.1 , the st art-up circuit with two resistors also has a disadvantage. some current does not flow into the vcc capacitor but is lost in one of the resistors. this can be prevented by placing diodes in series with the resistors as shown in figure 6 a an d fig u re 6 b. figure 6 a r e q u i res two resistors and two low voltage diodes. figure 6 b s a ves one resist or b u t r e q u ir es two hig h vo lt ag e diod es. at 9 0 v ( a c), add ing the d i ode s r edu ces the st a r t-u p ti me by app ro xim a tely 2 0 % witho u t in cr ea sin g th e no -lo ad po we r consumption. (approximately 10 % at 115 v.)
a n 1098 1 a l l info r m atio n pr ov ide d in thi s d o cu ment is su bje c t t o le gal dis c l a i m er s. ? nx p b . v . 201 1. al l r i ght s r e se r v ed. application note rev. 1.1 ? 18 april 2011 13 of 44 nxp semiconductors AN10981 greenchip tea1738 series fixed frequency flyback controller th e d i od es do n o t blo c k th e x- ca p d i sch a r ge p a th ! the d i scha rg e o f th e x- cap t a kes p l ace via r1 or r2 thr o u gh the ser i es diod e to vcc. fr om vcc the r e a r e seve ral p a ths to g r ou nd ( e ven whe n the ic is in power - do wn mod e a cl amp o n th e vcc pin is active ). fr om g r ou nd it ca n find it s r e tur n p a th to th e x-cap thr o u g h o ne of th e br idg e diod es. 3.2 . 4 s t a rt-up circuit with cha rge pump if the n o - l oad power req u ir eme n t s ca nno t b e co mbin ed with th e st ar t- up time r equ ire m en t s , the r e is a m o r e e f ficien t wa y to decr ease th e st a r t-u p time using the ch ar ge pump circuit illustrated in fig u re 7 a. du rin g th e po sitiv e ha lf o f ea ch m a i n s cyc le, current f l ow s f r om l via c pu mp a nd d c har ge to th e vcc ca p a c i to r . th is pr oc es s st op s wh e n c pu mp is fu lly ch ar ge d. du rin g th e ne ga tiv e ha lf m a ins cy cle, c pu mp is d i sch a r ged : fr om c pu mp via c1 to ground. fr om g r ou nd via d di sc ha rg e back to c pu mp . unlike in the r e sisto r st ar t- up cir c u i t, no sign ificant power is lost in the circ uit it self. a. di odes at low side b. di ode s at hig h si de (th i s re quire s hi gh volt age d i ode s b u t it saves one resistor) fi g 6. s t a r t-u p ci rcu it s us in g d io d e s in s e r i e s 019aaa16 0 cx1 c11 + c7 c1 vcc r2 r1 l n 019aaa16 1 cx1 c11 + c7 c1 vcc r1 l n a. basic char g e pump st a r t-up circui t b . p ractical cha r ge pump st art-u p ci rcu i t wi th in rush curre nt li mi te r an d x-ca p discharg e fi g 7. s t a r t-u p ci rcu i t wit h c h arge pump 019aaa16 2 cx1 c11 + c7 c1 vcc c pump 10 nf d charge d discharge l n 019aaa16 3 cx1 c11 + c7 c1 vcc r2 3 m r inr ush 20 k c pump 10 nf r1 3 m l n
a n 1098 1 a l l info r m atio n pr ov ide d in thi s d o cu ment is su bje c t t o le gal dis c l a i m er s. ? nx p b . v . 201 1. al l r i ght s r e se r v ed. application note rev. 1.1 ? 18 april 2011 14 of 44 nxp semiconductors AN10981 greenchip tea1738 series fixed frequency flyback controller th e ch ar ge pum p cir c u i t do es no t pr ovide a disc har ge p a th fo r th e x- cap. an ef ficient way to pr ovide the x- cap discha r g e p a th is to use the r e sistor st a r t-u p circuit beca u se it no t only discharges the x-cap but also helps to charge the vcc capacitor, see figure 7 b. ? th e value o f r1 an d r2 sh ould b e chose n as h i gh a s po ssib le but low eno ug h to comp ly with th e x-cap d i sch a r ge r equ ire m en t: r c< 1s : ? fo r a 33 0 n f x-ca p : r < 3 m ? f o r a 2 2 0 n f x- cap: r < 4.5 m ? t h e v a lu e of c pu mp mu st be chose n just hig h eno ug h to r e a c h the st ar t-u p tim e t a rg et ( s t a rt with 10 n f a n d incr ease or decr ease for cor r e c t st a r t-u p va lue) . it mu st be a hig h volt age cap a citor . ? th e pu rpo s e of the resistor r in ru sh is to limit the inrush cu rr en t when th e su ppl y is p l ugg ed in at th e top o f the sin e wave. t o mini mize losses th e value sh ou ld be as low a s po ssibl e but hig h eno ugh to com p ly with the pu lsed po wer r a ting o f the r e sistor to surv ive the inrus h current. ? for the diodes , any low v o lt age type w ill do (break down volt age > 30 v). ? if the a v e r a ge st ar t-up cu rr ent at maximum in pu t volt ag e exceed s the m a ximum cu rr en t of th e cla m p o n th e vcc pin , d di sc ha rg e sh ould be r epla c e d by a 24 v zen e r d i ode . remark: th is can occur in the la tche d of f- st ate wh en the po we r consum ption is ver y low . in that ca se th e ch ar ge p u mp n o t o n ly ch ar ges t h e vcc cap a citor but als o very slow ly cha r g e s the h i gh volt ag e b u lk cap a citor (c1) o n the othe r side of the br idg e r e ctifie r . it ha s to be che c ke d th at in latch e d p r o t e c tion mod e th e char ge p u mp d oes no t cha r ge th e high volt a ge bu lk cap a citor a b o v e it s ra te d volt ag e (che ck at maximu m inpu t volt a ge) . t her e a r e two wa ys to so lve th e pr oble m : ? incre a se the lo ad on the rectified ma ins vo lt age . (e .g. l o wer imp e d ance o f volt ag e div i de r on t h e vi nsense pin . ) ev en if so me load has to b e added to the r e ctifie d m a in s v o lt a g e t o pr ev en t th e c h a r g e p u m p d a m a gin g th e hig h vo lt ag e bu lk cap a c i to r , th e ch ar ge p u m p r e m a ins a m o r e ef ficie n t so lut i on t h a n th e re sist or cir cu i t. ? ano t h e r solu tio n is to add an iden tical char ge pu mp but co nne ct it s inpu t to n in stea d of l ( see figu re 8 ). i n this case the value of c pump can be divided by two. c aution the rated maxi mu m volt ag e of the hig h -volt a g e b u lk cap a ci to r can be e x ce ede d if it is overcharg ed by th e ch arge pu mp .
a n 1098 1 a l l info r m atio n pr ov ide d in thi s d o cu ment is su bje c t t o le gal dis c l a i m er s. ? nx p b . v . 201 1. al l r i ght s r e se r v ed. application note rev. 1.1 ? 18 april 2011 15 of 44 nxp semiconductors AN10981 greenchip tea1738 series fixed frequency flyback controller 3. 2. 4. 1 c h a rg e p u m p in c o mbi n at io n wi th pf c if a pfc (po w e r fa ctor co rr ecto r) is used , the vol t age o n the bu lk cap a citor can b e ( m uch) high er tha n the r e ctified main s volt ag e. un der th ese circumst a n ces, the st ar t-u p cur r e n t p r o v id ed b y the cha r g e pum p ca n be r e d u ced o r even e n tire ly stopp ed. if a rest art oc curs during this co nditio n , the st a r t-u p tim e ca n be ver y lo ng . th is can be solved b y u s in g a symm etrical cha r g e pum p. 3.2 . 5 v cc cap a c itor the vc c cap a cit o r should be as small as poss ib le to m a ke the st ar t- up time a s sho r t as po ss ible ( a n d als o th e la tc h re se t t i me ). fir st of all the valu e of the ca p a citor shou ld be suf f icie nt to sup p ly th e tea173 8 un til the auxiliary winding can t a ke ov er . this depends on the c o nfigured sof t st art time, the load on th e ou tp ut a n d t h e va lu es of the secondary cap a citors . but usua lly the min i mum valu e of the ca p a citor is de te rm ined b y o t h e r factor s, so me wor s t case test s to de te rm ine the min i mum valu e of th e vcc cap a cito r ar e: ? no- l oa d ope ra tio n th e su ppl y ru ns a t low fr equ en cy so the r e is a lo ng inter val b e tween two co nsecutive charge pulses from th e auxiliary winding. v cc sh ou ld no t dr op n e a r v th (uv l o) be fo re the next cyc le. ? t r an sient fr om full loa d to no loa d a tr an sie n t fr om full loa d to no loa d may cause a small o v e r sho o t o n the ou tp ut vo lt ag e . be ca us e of th e ab se n ce of a n y ex te rn al loa d it m a y t a ke a lo ng t i me f o r th e o u tput ca p a cito r to dischar ge to the le ve l a t which the supply st art s to switch again. during that time the vcc ca p a citor is not charged by th e aux iliary w i nding. this o v e r sho o t can be limited b y the follo wing mo difyin g loo p : ad d r25 an d c17 in fig u r e 1 at e.g. 3.9 k and 1 nf respectively. the vcc capacitor should be a low esr type. fig 8. symme tric c h a r ge p u mp circu i t (pr even t s c1 fr om b e ing c h ar ged ) 019aaa16 4 cx1 c11 + c7 c1 vcc r2 3 m 20 k 4.7 nf r1 3 m l n 20 k 4.7 nf
a n 1098 1 a l l info r m atio n pr ov ide d in thi s d o cu ment is su bje c t t o le gal dis c l a i m er s. ? nx p b . v . 201 1. al l r i ght s r e se r v ed. application note rev. 1.1 ? 18 april 2011 16 of 44 nxp semiconductors AN10981 greenchip tea1738 series fixed frequency flyback controller 3.2 . 6 s t a rt-up condition s wh en t h e vc c p i n re ac he s v st ar t up (2 0 . 6 v t y p. ), th e co nt ro ller wa ke s u p fr om po wer - d o w n m od e an d ch ec ks if t h e fo llo win g c o n d i tion s ar e me t: ? th e protect pin mu st be b e twe e n 0 . 5 v an d 0.8 v . ? th e vinsense pin must b e betwee n 0.94 v an d 3.52 v . ? th e op timer pin mu st be b e low 1.2 v . if one or more of these condit ions is not met, the controlle r w ill not switch. due to the inc r eas e d power consum ption when the ic is switc h ed on, the volt age on the vcc will ev entually drop below v th (uv l o) and the ic will enter power- down mode. the st art-up circui t will charge the vcc cap a cito r and the cycle repeat s it self. 3.2 . 7 s of t s t art whe n all st art- up con d itions ha ve b e e n met, the ic ch ar ges th e sof t st ar t cap a citor by switching on a 55 a cu rr ent so ur ce on the isense pin . as soo n as th e isense p i n reaches the internal control volt age (which is 0.5 v when the output is s t ill low), the current so ur ce is swit che d o f f an d th e controller st art s to sw itch. at st art-up the output c a p a c i tors are s t ill empty and the c ontrol input will as k for max i mum p eak cu rr en t, incre a sing the p r im ary du ty cycle un til v i sens e re aches 0.5 v . bu t b e cause o f th e cha r g ed so f t st art ca p a citor , the volt ag e o n v is ense is alr ead y 0.5 v . as the sof t st ar t r e si st o r di schar ge s t h e s o f t st a r t ca p a ci to r , the pe ak cu rr ent slo wly incr eases. th e pu rpo se of the so f t st ar t is to a v o i d au di ble n o ise at st a r t- up. in crea sing pe ak cu rr ent in st a n tly fro m 0 a to ma xim u m would be au dib l e. a sof t st a r t d u r a tion o f 4 m s is a g ood valu e fo r mo st app lications. fig 9. s t art-u p se quenc e , n o r m al o p e r ation a n d r est ar t se quenc e 019aaa16 5 output v oltage optimer pr o tect vinsense isense v cc v star tup v th(uvlo) v det(vinsense)(h) v star t(vinsense) v det(pr o tect)(h) v det(pr o tect)(l) 4.5 v charging vcc capacitor star ting con v er ter nor mal oper ation (po w er do wn) protection restar t soft star t 1.2 v soft star t
a n 1098 1 a l l info r m atio n pr ov ide d in thi s d o cu ment is su bje c t t o le gal dis c l a i m er s. ? nx p b . v . 201 1. al l r i ght s r e se r v ed. application note rev. 1.1 ? 18 april 2011 17 of 44 nxp semiconductors AN10981 greenchip tea1738 series fixed frequency flyback controller th e du ratio n of the so f t st ar t can b e co nfigu r e d by cha n g i ng the valu e of th e so f t st ar t cap a citor . ( d o not use the sof t st a r t re sistor for th is p u rp ose as this r e sisto r also con f ig ur es th e ov er po we r co mp e n sa tio n . i t is be tt er to fir s t con f ig ur e th e over po we r comp ensatio n a nd later ch an ge the sof t st a r t ca p a cito r to obt a i n the r equ ire d so f t st ar t time) . t he dura tion of th e sof t st ar t is ro ugh ly e qua l to : . r st a r t ( s o f t ) must b e a min i mal 12 k , other wise the 55 a cu rr en t sour ce is n o t b e abl e to charge the ca p a citor to 0.5 v and th e controll er will not s t art s witching. th e pu rpo s e of the extr a ser i es r e sisto r r13 is t o filte r ou t ne ga tiv e s p ik es th at wo u l d o t h e r w ise be r e ctified by th e inter n a l esd pr o t ectio n dio de, ch ar ging c5 a nd cau s in g a po sit i ve of fse t vo lt ag e on t h e is ense p i n . fo r hig h o u tpu t volt ag es, the pe ak cur r e n t m a y sho w a sh or t pe ak a t th e st a r t. th e emp t y o u tput ca p a cito rs beh ave like a shor t circu i t an d th e supp ly imm edia t ely g oes into con t in uou s con duction m ode . dur i ng this pea k the p o wer is limited b y the mi nimu m on - t im e. 3.2 . 8 s afe res t art if a p r o t e ctio n is trig ge re d th e contr o ller stop s switch ing . dep end ing o n which pr otection is trig ge red and o n the ver s io n of th e ic, the pro t ectio n causes a re st a r t or la tch e s the con v e r ter to a n of f- st ate. se e section 3 .3 fo r an o v e r vie w of th e pr ot ec tion f e a t u r e s . a r e st ar t ca used b y a pr otection quickly ch ar ges the op timer pin to 4.5 v . th e tea17 38 the n ente r s po we r- do wn m ode u n til th e cap a cito r on th e op timer p i n ha s be en d i scha rg ed by the r e sistor on the op tim e r pin to 1 . 2 v . dur i ng power - d o wn mo de the power cons umption is very low (10 a) an d th e vcc pin is clamp ed to 21 .6 v (wh i ch is j u st abo ve v st ar t up ) by a n inter n a l clam p circuit. whe n th e op timer pin dr ops b e lo w 1.2 v an d vcc is ab ove the vcc st ar t- up vo lt age ( 20.6 v ) , the con t r o lle r wakes u p from po we r- do wn m ode a n d d oes a no rma l st a r t-u p as d e scr i be d in section 3 .2 . t st art s oft () r st art s oft () c star t s o f t () = a. sof t st art circui t b . s o f t st art wa veform f i g 1 0 . s o f t st art circu i t an d wavefo r m 019aaa16 6 v ctr l(ipeak) isense 4 esd r13 1 k r12 r11 0.15 q1 c5 220 nf 33 k 55 a 019aaa16 7 0.5 v 55 a current source charges capacitor v isense capacitor discharged b y resistor
a n 1098 1 a l l info r m atio n pr ov ide d in thi s d o cu ment is su bje c t t o le gal dis c l a i m er s. ? nx p b . v . 201 1. al l r i ght s r e se r v ed. application note rev. 1.1 ? 18 april 2011 18 of 44 nxp semiconductors AN10981 greenchip tea1738 series fixed frequency flyback controller 3.2 . 9 c lamp s th e 21 .6 v clamp o n th e vcc pin is on ly active dur ing the rest a r t d e la y . th e pur po se of the clam p is to keep the vcc pin just abo ve v st ar t up , so th at a f te r t h e r e s t ar t d e lay th e sys tem will behave exac tly like a normal st art-up. th e 6 v cla m p on the vcc pin is o n ly active d u rin g latched of f- st ate. t he pu rp ose of th is clamp is to kee p the vcc pin ju st ab ove the latc h res e t lev e l. this is to ensure a fast latc h r e set af ter u nplu g g i ng the ma ins. it is re co mmen d e d to ke ep the clamp cu rr ent be low 0 . 7 3 m a . ( s o the st ar t- up cir c u i t sho u ld no t b e able to d e liver m o r e th an 0 . 7 3 ma a t ma ximum ma ins vo lt age .) above a cer t ain cur r e n t, the clam p be haves like a cu rr en t sour ce: t he volta ge incr ease s an d th e cu rr en t re ma in s c o n st a nt . if it is r e q u i re d t o a ch i ev e a ve ry fa st s t ar t- up time, it sh ou ld be ch ecked tha t a t the high est ma ins inp u t volt ag e, the cu rr ent d u r i ng r e st ar t or latched of f-st ate r e m a ins b e low 0 . 7 3 m a . 3.3 i n put volt age sensing (vinsense pin) 3.3 .1 g eneral f o r a ccu ra te in pu t vo lt ag e se ns in g it is b e s t t o se nse t h e in pu t vo lt ag e af t e r th e br id ge rectifier . the detecti on level s for st ar t-up , b r own out pr otection, and i npu t ovp ha ve b e e n d e signe d to be con nected to the r e ctified main s volt ag e via re sistor d i vid e r r a tio 1 : 1 22, e. g. 1 0 m an d 82 k . t o filter out th e rip p le o n th e rectified mains volt age, a c a p a c i tor m u s t b e co nn ec te d. f i g 1 1 . a pp li ca ti on vinsense pi n t a ble 4. detection levels vinsense pin v o lt a ge divi der as i n fig u re 7 : 3 3.3 m and 82 k . vinsense pin det e ction voltages v mains ( v (rms)) condition v bulk (ave rag e v(dc)) vins ense pin (v (dc)) v st a r t(vinsense) 80 no load [2 ] 111 0 . 9 4 v d e t( l) (vin se n s e) = b rown out 61 0 v ri ppl e on v bulk [3] 88 0.72 68 20 v ripp le on v bu lk 88 0.72 71 30 v ripp le on v bu lk 88 0.72 75 40 v ripp le on v bu lk 88 0.72 019aab05 6 r4 3.3 m ( ) () () ()()
a n 1098 1 a l l info r m atio n pr ov ide d in thi s d o cu ment is su bje c t t o le gal dis c l a i m er s. ? nx p b . v . 201 1. al l r i ght s r e se r v ed. application note rev. 1.1 ? 18 april 2011 19 of 44 nxp semiconductors AN10981 greenchip tea1738 series fixed frequency flyback controller [1] a t full load ther e will be a r i pple on v bu lk but because of the high input volt age this r i pple will be ver y low . the mains input detection level at full load w i ll be approximately 5 v higher . [2] t he v s t ar t( vi ns e n se ) level is only r e levant w hen t he supply is not runn ing. in that case t here is n o load on v bu lk and th ere will be n o ripple . [3] t he browno ut detection level depends on the load. at a lower lo ad it a l lows a lo wer mains inp ut volt age . this is not a pr oblem because at a lo wer load the input cur r ent is also lower . fo r slightly dif f e r e n t d e tection le ve ls the r a tio of th e re sistor d i vi der ca n be cha nge d. increasing the divis i on fact or to 133 (3 3. 3 m an d 75 k ) re su lt s in : ? s t ar t le ve l = 87 v (rms) ? br ownou t le ve l = 77 v (rms) ( a t 30 v rip p le o n v bul k ) 3.3 . 2 s t a rt-up volt age th e contr o ller should n o t st a r t up if th e main s volt age is too low . if vins ense is below v st a r t ( vi nsen se) (0.94 v typ.) the supply w ill not st art. there is 220 m v hys t eresis on this lev e l, so onc e the ic is sw itched on, it d oes no t sto p until vi n sense is lowered below v de t ( l ) ( v i n sen se) (0.72 v t yp.). 3.3 . 3 b rowno u t protection whe n the volt ag e on the vinsense pin d r op s belo w 0 . 7 2 v , the b r o w n o u t protection is a c tivated. the contro ller imm edi ately stop s swit ch ing an d initiates a safe re st a r t (valid for all tea1738 v e rsions ). 3.3 . 4 o verpower compen sation th e vinsense pi n is also u s e d to p r o v id e the inp u t vo lt ag e infor m ation n e e ded for th e ov er po we r co mp e n s a t i o n . t h e vo lt ag e is t r a n s l at ed in to a sm a l l cu rr en t an d inje cte d o n the isen se out p ut. on t h e is ense output the cu r r e n t is conve r ted in to a vo lt age a c r o ss a ser i es re sistor . at a h i gh in put volt ag e it cre a tes an o f fset volt a g e o n th e isense pin, limiting the maximum peak current. see section 3 .5 fo r mo re a bou t the opp . 3.3 . 5 f ilte r cap ac itor a cap a citor (c 6 in f i gur e 1 1 ) dir e ctly on th e vinsense pin filte r s o u t the main s rip p le. fo r a time cons t a nt of a few 100 h z cy cles (e. g . 40 ms), so the cap a c i tor v a lue should be: . th e cap a cito r also p r eve n t s the su pply swit ching o f f when th e re ctified ma ins vo lt age temp or ar ily dr op s b e lo w the b r o w n out level du rin g a sh or t ( 5 ms o r 10 m s ) main s in te rr uptio n. 3.3 . 6 c lamp an in te rna l cla m p pr otect s th e pin ag ain s t inp u t volt a g e s that ar e to o hig h . t he clamp volt a ge is 5.2 v a t 50 a. the cla m p volt ag e re main s u n chan ge d dur ing p o wer - d o wn. ( t he clam p vo lt ag e onl y dr op s whe n v cc d r op s belo w 5 v .) c6 40 ms r7 - ---- ---- ---- - - >
a n 1098 1 a l l info r m atio n pr ov ide d in thi s d o cu ment is su bje c t t o le gal dis c l a i m er s. ? nx p b . v . 201 1. al l r i ght s r e se r v ed. application note rev. 1.1 ? 18 april 2011 20 of 44 nxp semiconductors AN10981 greenchip tea1738 series fixed frequency flyback controller 3.4 p rotection features 3.4 .1 g eneral ta b l e 5 shows which protection features lead to a safe restart and which to a latched off-state. see section 3.2.8 . [1] s witches of f and wa it s in power- down mod e until v cc r i ses above v st artu p . th is is not the same as safe rest ar t procedur e. 3.4 . 2 b rowno u t protection whe n the ma ins inp u t volt a ge is to o lo w (a nd with fu ll lo ad) , th e p r im ar y cu rr ent in crea ses, cau s in g incre a sed lo sse s in ma ny o f the p r im ary comp one nt s. th e pu rpo se of the b r own out p r ote c tion is to pr otect the su ppl y a g a i nst over hea tin g a t inpu t vo lt age s th at ar e too low . whe n the m a ins volt a ge b e come s to o low ( v insense d r op s be low 0.72 v) , the br owno ut p r ote c tion is activa te d. the con t r o lle r imme d i at ely st op s sw itch ing a n d pe rf or ms a sa fe r e st ar t ( v a lid fo r all tea1 738 ve rsion s ) . see section 3 .3 for application of the vinse n se pin . 3.4 . 3 m aximum on-time pro t ection (t ea17 38t/tea173 8l t ) if a switch ing cycle d oes no t re ach the pe ak cu r r e n t se t by th e ct rl p i n, th e dr ive r p u l se will be ended by the maximum on-t ime. if this happens eight times in a row , the max i mum on - t im e pr ot ect i on t r ig ge rs a re st a r t . as a n extra m easur e ag ainst fa lse tr igge rin g , th e pr otectio n can on ly b e activa te d dur ing ov er po we r po we r (v is ens e > 400 m v). th e pu rpo s e of this pr otection is to e n sur e a well defin ed re spon se to m a ins su pp ly dip s . 3.4 . 4 i nte r na l ov ert e m perature protection (internal otp) whe n th e temp era t ure in th e ch ip rise s to abo ve 140 c, the internal o t p s e t s the co nt ro ller to t h e la tch e d of f-s t at e ( i n all t ea17 3 8 v e r s io ns ). 3.4 . 5 o verpowe r protec tion (opp) whe n the rated output power is continuousl y exceeded for an adjustable duration, the opp is activated. the controller immediately stops switching and performs a safe restart or enters the latched off-state, depending on the version. see section 3.5 for more about opp. t a ble 5. pro t e c tion h a n d lin g t e a173 8 series protection t ft and gt lt brown out (vinsense pin low) re st art l atch maximum on-time protection rest art no action re st art otp (interna l) l a tch opp (op t imer pin) re st art l atch ovp (i nt er na l ) la tch ovp (protect p i n high) l atch otp (prot e ct pi n low ) l a tch undervoltage lockout (uvlo) restart [1] latch
a n 1098 1 a l l info r m atio n pr ov ide d in thi s d o cu ment is su bje c t t o le gal dis c l a i m er s. ? nx p b . v . 201 1. al l r i ght s r e se r v ed. application note rev. 1.1 ? 18 april 2011 21 of 44 nxp semiconductors AN10981 greenchip tea1738 series fixed frequency flyback controller 3.4 .6 inte r na l output overv o lt age protec tion (inte r na l ovp) an intern al ove r v o lt ag e pro t e c tio n set s the ic to latche d of f-st ate wh en th e volt ag e o n the vcc p i n exce ed s 30 v for e i ght consecu t ive switchin g cycles. it is also p o ssible to imple m en t an exte rn al ov p with a lo we r th resh old va lue by ad ding a circui t to th e pr otection pin ( e .g. zen e r fr om vcc to pr otection pin ) . 3.4 . 7 e xternal output overv o lt age protect ion (external ovp) th e pu rpo se of the ovp is to pr otect the d e vice s con nected to the o u tput bu t also the sup p ly it se lf ag ainst o u tpu t volt a ges th at a r e too h i gh ( e .g. wh en the volt a ge fee dba ck loo p is distu r b ed) . if an o v ervo lt age at the o u tpu t o ccu rs, th e a pplicatio n pu lls th e protect p i n a bove 0 . 8 v a nd the ovp is a c tivated . th e contro ller i mmed i ately stop s switch ing a nd en ters the la tche d- of f st ate (in all tea173 8 versio ns). se e section 3 .8 for how to a p p l y the protect pin. con nection o f an e x te rn al ovp app lica t io n is o n ly req u ir ed if th e th re sh old volt a g e n eed s to be lo we r tha n 30 v or e x tr a filter ing is re qu ired . withou t e x ter n a l ovp a pplicatio n th e fixed internal ovp will latch the ic when v cc exc e eds 30 v . 3.4 . 8 e xternal ove r t e mp erature protection ( e x t ernal otp) whe n th e temp era t ure in th e su pp ly r i se s ab ov e the r a ted le ve l, the a pplicatio n pulls the protect pin b e lo w 0.5 v and th e otp is a c tivated . th e co ntro ller im med i ately stop s switchin g an d ente r s th e latch e d - of f st a t e ( i n all tea17 3 8 ver s ions) . see section 3 .8 fo r h o w to ap ply th e protect pin. 3.4 .9 latc hed protec tion wh en o n e o f th e pr ot ect i on f e a t u r e s t r ig ge r s the latche d of f- st ate, th e ic imme diately stop s switchin g an d enter s po we r- do wn m ode . it clam p s th e vcc pin to 6 v , wh ich is just a bove the r e set level (5 v) . 3.4.1 0 rese tting a la tched protec tion in or de r to rese t a latche d pr otectio n , th e vcc pin sho u ld b e br oug ht b e lo w 5 v . if a la tche d pr otection is tr igg e re d, th e vcc pi n is auto m atically clam ped to a volt age ju st a bove the r e set level. as so on a s the ma ins is un plu gge d, th e st a r t- up cur r en t stop s a nd the vcc cap a citor is discha r ge d by th e 10 a supp ly cur r e n t to the t e a1 738 . be ca use it o n ly h a s to b e dischar ge d fr om 6 v to 5 v it re se t s quite fa st. with c vcc =4 . 7 f the d i scha rg e tim e is 0 . 4 7 s ( i n p r a c tice the st ar t- up cur r e n t doe s no t a l wa ys im med i ately stop ch ar ging the vcc ca p a cito r a f te r unp lug g ing the mai n s be ca use the x-c a p may still be char ged for about one second). 3.4.1 1 underv o lt age lockout (uvlo) res t art ver sions ( t ea173 8t , tea17 3 8 f t , tea173 8g t ) ? wh en du rin g no rma l o per ation the vcc vo lt age d r o p s be low th e und er vo lt ag e locko u t th re sh old (v th( u vl o) = 1 2.2 v typ.), th e ic sto p s switchin g and e n ter s po we r- down mo de . th e vcc pin is clamped to 21.6 v (typ.) by an internal clamp circ uit. the s t art-up circuit w ill charge th e vcc ca p a c i to r a n d a no rm a l st a r t - u p se qu en ce f o llo ws.
a n 1098 1 a l l info r m atio n pr ov ide d in thi s d o cu ment is su bje c t t o le gal dis c l a i m er s. ? nx p b . v . 201 1. al l r i ght s r e se r v ed. application note rev. 1.1 ? 18 april 2011 22 of 44 nxp semiconductors AN10981 greenchip tea1738 series fixed frequency flyback controller a re st a r t ca used b y un de rvolt a ge lockou t is n o t exactly the same a s a r e st ar t cau s e d by one of the othe r protection features. it will no t trigger the res t art delay (s o it w ill not charge the op tim e r cap a citor a nd wait s until it is disch a r ged aga in) . la tc h ver sion (tea17 38 l t ) ? wh en d u r i ng no rm al ope ra tio n vcc dr op s b e low the u nde rvolt a ge locko u t thr e shold , th e ic is se t to the l a tch ed pro t ectio n mo de . t h is en su re s th at a sh or te d ou tp u t a lwa ys trig g e r s t h e la tch e d pr ot ect i on m o de , also if vcc d r o p s below v th( u vl o) be fo re the opp h a s a ch ance to r e spon d. 3.5 o verpower protection (opp) 3.5 .1 c ontinu ous and temporary out put power limit a t ion t h e t ea1 73 8 has two m e ch an ism s t o pr ot ec t a g a in st ov er loa d : ? ov er po we r pr ot ec tio n ove r p o wer p r o t e c tion p e r f o r m s a safe re st art (o r en te rs th e la tche d pr otection mo de in the latched v e rsion) if th e rated power is c o ntinuously e xce ede d. opp is dela y e d to a llow tem por ar y o v e r lo ads. ? cyc l e by cyc le primary in du ct or cu rr en t limit ation pe ak cu rr en t lim i t a tio n pr ev en t s t h e c o r e fr om go ing into satu ra tio n an d th us th e m osf et f r o m cu rr en t s t h a t ar e to o hig h . 3.5 . 2 h ow the opp o perates whe n th e inter n a l con t r o l volt a ge excee d s the over power th re sh old ( 400 mv o n the isense pin ) , th e over powe r tim e r is ac tiv a te d (s ee f i gur e 1 6 o n p age 2 9 an d f i gu re 2 0 on page 31 . an in te rn al 10 .7 a current source charges th e ex te rn al cap a c i to r o n th e op timer p i n. wh en the o v e r p o wer co ndition la st s lon g en oug h to ch ar ge the op t i m e r pin to 2 . 5 v , the contr o ller ca rr ies out a safe re st a r t pr ocedu re ( o r enter s l a tch ed pr otection mo de in the la tche d versio n). if th e inter n a l con t r o l volt ag e dr op s be low 4 0 0 m v be fo re the op timer pi n rea c hes 2.5 v , the o p timer cap a c i tor is immediat ely d i scha rg ed. the m i nimu m re co mme nde d va lue for op timer resistor is 470 k (o th er wis e th er e is a ch an ce t h a t 1 0 . 7 a is not suf f ici ent to ch ar ge th e cap a citor to 2 . 5 v ) . 3.5 . 3 p eak current limit ation (ocp) whe n th e volt ag e on the isense pin exce ed s 50 0 m v th e cu rr en t switchin g cycle is imm edia t e l y e nde d. wh en the ocp limit s th e pe ak cur r ent, the outpu t volt a ge can n o longer be maint a ined. the converter will continue to switc h until the opp is triggered or until v cc has dr opp ed b e low v th (uv l o) . 3.5 . 4 i npu t volt a g e compe nsation in fixe d fr eq ue ncy dcm the pea k cur r e n t lim it a tio n ca n als o a ct a s over po we r pr otection b e cause the m a ximum o u tput po we r is in dep en den t of the inp u t vo lt age . but in fixe d fr eq ue n cy ccm th e m a x i m u m am o u n t of p o w er th at can be tra n sfe r r ed to the ou tput d oes not only depend on t h e primary pe ak current but also on the dut y cycle and therefore also on t h e in pu t vo lt ag e. th e tea17 38 h a s b u ilt-in in put volt ag e comp ensation to e n sur e accura te over power p r ote c tion , ind e p end en t of th e inp u t volt a g e . it ha s b een im plem ente d by m a king the cur r e n t se nse sig n a l d epe nd ent on the in put volt ag e mea s u r e d on the vinsense pin .
a n 1098 1 a l l info r m atio n pr ov ide d in thi s d o cu ment is su bje c t t o le gal dis c l a i m er s. ? nx p b . v . 201 1. al l r i ght s r e se r v ed. application note rev. 1.1 ? 18 april 2011 23 of 44 nxp semiconductors AN10981 greenchip tea1738 series fixed frequency flyback controller the input voltage measured on the vinsense pin is internally converted to a current and injected in the isense pin. the current flow s through the external series resistor r12 (see figure 1 ) on th e isense p i n, co nver tin g it to a volt ag e. the valu e of th e se rie s r e sisto r sho u ld be tu ned in such a way tha t the ma xim u m p o wer be co mes ind e p end en t o f the in put volt ag e. 3.5 .5 h ow to config ure the current s ense res istor befo re th e co rr ec t va lu e of th e cu rr en t s e n s e r e s i sto r can b e ca lcu l at ed , t h e m a xim u m pr im ar y p e a k cu rr en t mu st be c a lc ula t e d . t h is is do ne w i th equation 2 or equation 3 . in dc m mode: (2 ) in ccm mode: (3 ) wh er e: ? i p eak is the p eak cur r ent ? p o is th e maximu m co ntinu ous ou tp ut p o wer ? is th e expe cte d ef ficie n cy of th e flyb ack a t ma xim u m ou tp ut p o wer ? v i is th e m i n i m u m in pu t vo lt ag e (= 2 the min i mum m a ins volt ag e) a t which the su pp ly mu st b e a b l e to de live r th e ma xim u m co nt inu o u s ou tp ut p o w e r 2 ? n is the wind i ng r a tio of th e co il ? v o is th e ou tp ut vo lt age ? f sw is the switch ing fre q u ency , in this case 63 khz ( t h e "high power " are a of th e fre que ncy cur ve, se e figu re 1 8 ) now th e (m aximum ) cu rr en t sen s e resistor value can be calculated with equation 4 : (4 ) wh er e: ? i p eak is the p eak cur r en t ano t h e r wa y to dete rmin e th e cor r ect va lue fo r the se nse re sistor is by tr ial an d er ro r: 1. co nn e c t a lo ad to t h e ou tp ut a n d se t th e lo ad to t h e ra te d m a x i mu m c o n t in uo u s ou tp ut p o wer o f the a pplication . 2 . app l y the m i nimum mains voltage at which the supply must be able to deliver the maximum continuous output power. 2. t he peak cur r ent will be lar ger d uring the valley of t he mains ripple. so during the ma jor i ty of the time i pe ak r i s en se ex cee d s v th (s e n s e )o pp . t his is w i ll h owever not tr ig ger the opp because eac h 100 hz or 1 20 h z cycle du rin g the top of t he ripple i pe ak r i s en se will be just belo w v th (se n se)opp and th is discharges the op timer cap a citor . i peak dcm , 2p o l f sw ---- ---- ---- --- ---- ---- -- - = i peak ccm , p o -- --- - v i nv o + v i nv o -- ---- ---- --- ---- ---- - 1 2l f sw ---- ---- --- ---- ---- ---- - - v i nv o v i nv o + ---- --- ---- ---- ---- -- - + = r isense v th sense () opp i peak -- --- ---- ---- ---- ---- --- ---- - - 40 0 mv i peak ---- ---- ---- ---- -- - ==
a n 1098 1 a l l info r m atio n pr ov ide d in thi s d o cu ment is su bje c t t o le gal dis c l a i m er s. ? nx p b . v . 201 1. al l r i ght s r e se r v ed. application note rev. 1.1 ? 18 april 2011 24 of 44 nxp semiconductors AN10981 greenchip tea1738 series fixed frequency flyback controller 3. increase the current sense re sistor u n til th e su pply keep s r u n n in g and th e op timer pin remains just below 2.5 v . 3.5 . 6 c alcu lating the maxim um temp ora r y output po wer th e maximu m te mpo r a r y pea k cur r e n t ca n now be calcula t ed with equation 5 : (5 ) wh er e: ? i p eak (ma x ) is the maximum peak c u rrent no w t h e m a xim u m t e m p or ar y o u t p u t po we r ca n be ca lcu l at ed 3 . in dc m mode: (6 ) wh er e: ? i p eak (ma x ) is the maximum peak c u rrent in cc m mode: (7 ) wh er e: ? i p eak (ma x ) is the maximum peak c u rrent ? f sw is the switch ing fre q u ency , in th is case 78 khz ( t h e "pea k p o wer " a r ea of the fre que ncy cur ve, se e figu re 1 8 ) th is is th e maximu m te mpo r a r y outpu t po wer a t which the ou tp ut vo lt age rem a ins int a ct. v i is the va lue o f the r e ctified main s volt ag e du rin g th e valley of th e rip p le. if the tem por ar y o u tput po we r is n o t high e nou gh , the o n ly way to incre a se it is by d e cre a sing the curr en t se nse r e sistor value . t h is also in cr ea se s th e ma xim u m con t in uou s o u tput po we r . 3.5 . 7 h ow to config ure the opp compens ation (r st ar t(s o f t ) ) once th e curr en t sen s e r e sisto r valu e has be en de te rm ined , the sof t st a r t re sistor can be tun ed to ob t a in eq ua l m a ximum o u tput po we r for lo w an d hig h main s. th e re lation sh ip be twee n th e volt ag e on the vinsense pin a nd the r e sulting co mpensation current out of the isense pin is fixed in the chip (see figure 12 ): (8) 3. calculating the maximum tempor ary output p o wer is comp licate d because it depe nds o n the mains r i pp le on the bulk cap acitor , which it self depend s on t he output pow er . i peak max () v sense m ax () r isense ---- ---- ---- ---- --- ---- --- - 50 0 mv r isense ---- ---- ---- ---- --- - == p om a x () , dcm 12 ? l i peak max () () 2 f sw = p om a x () te mp , ccm v i nv o v i nv o + ---- --- ---- ---- ---- -- - i peak max () v i nv o 2l f sw v i nv o + () -- ---- --- ---- ---- ---- --- ---- ---- ---- ---- --- ---- ---- ---- --- - ? ?? ?? = i opp 0.71 10 6 ? v vinsense 0.43 1 0 6 ? ? 0.7 1 10 6 ? kv bulk a v () 0. 43 10 6 ? ? ==
a n 1098 1 a l l info r m atio n pr ov ide d in thi s d o cu ment is su bje c t t o le gal dis c l a i m er s. ? nx p b . v . 201 1. al l r i ght s r e se r v ed. application note rev. 1.1 ? 18 april 2011 25 of 44 nxp semiconductors AN10981 greenchip tea1738 series fixed frequency flyback controller wh er e: ? v vi nse n se is th e volt ag e on the vinsense pin ? v bu l k( av) is th e av er ag e re ct ified mains volt age ? k is th e r a tio of the re sistor divider on th e vinsense pin ( a r o u nd 1 : 1 2 2 fo r un iversa l ma ins) th e re su lting pe ak cu rr ent re duction ( i pe ak in equ ation ) can be ca lcu l ated with equation 9 : (9 ) wh er e: ? i p eak is th e pe ak cu rr e n t re du ct ion ? r st a r t ( s o f t )(t ot ) is the tot a l resist anc e from the is ense pin to the cur r e n t sen s e resistor (r 12 + r13 in figure 1 ) ? r isense is the value of the current sense resistor (r11 in figure 1 ) ? k is the r a tio of th e re si stor divider on the vinsense p i n (e .g. 1 : 12 2) sec tion 3.5.5 describ es h o w to calcu l ate th e pe ak cur r ent and th e re su ltin g ou tp ut p o wer withou t in put vo lt ag e co mpe n sation . t o calculate the o u tpu t po we r with i npu t volt a ge compens a t ion, the i pe ak mu st be subtr a cte d fr om the pe ak cu rr ent befor e calcula t in g th e ma xim u m ou tp ut powe r . although it s h ould be poss ible to c a lculate 4 the op tim a l valu e o f th e sof t st ar t re sistor , it is p r ob ab ly faste r to tune it in the ap plication . 1. connect a load and set it to the rat ed ma xim u m contin uou s ou tp ut powe r of th e flyback convert e r . 2 . app l y the h i gh est r a ted inp u t vo lt age (usu ally 2 64 v (ac)) . fig 12 . o v e rp ower co mp ens a tio n cu rr ent isen se p i n as a fun c ti on o f vinse n se pi n vo lt ag e 4. exact calcu l ation is complicated be c ause the vin s en s e pin measur es the aver age bulk volt age b u t the maximum continuous outpu t power depends on the to p of the r i pple. 019aaa15 0 0 0 1 i opc(isense) ( a) 2 3 0.28 v vinsense (v) 1.7 2.0 i peak i op c i s e n s e () r star t s oft () to t () r isense - ---- ---- --- ---- ---- ---- ---- --- ---- ---- ---- ---- --- ---- ---- ---- --- ---- - = 0. 71 10 6 ? kv ia v ) () 0.4 3 10 6 ? ? () r s t art s of t () tot () r isense --- ---- --- ---- ---- ---- ---- --- ---- ---- ---- --- ---- ---- ---- ---- --- ---- ---- ---- ---- --- ---- ---- ---- --- ---- ---- ---- ---- --- ---- ---- --- - ---- --- --- - =
a n 1098 1 a l l info r m atio n pr ov ide d in thi s d o cu ment is su bje c t t o le gal dis c l a i m er s. ? nx p b . v . 201 1. al l r i ght s r e se r v ed. application note rev. 1.1 ? 18 april 2011 26 of 44 nxp semiconductors AN10981 greenchip tea1738 series fixed frequency flyback controller 3 . incre a se the sof t st a r t re sistor valu e un til the volt a ge on th e op timer p i n alm o st ex ce ed s 2.5 v (e .g . s t art w i th 15 k ). now th e maximu m outp u t p o wer a t the m i nimu m a n d the m a ximum in pu t volt ag e shou ld b e exactly the same . remarks: ? t h e va lu e of th e to t a l sof t st a r t r e sis t an ce ( th e s u m o f r1 2 an d r1 3) sh ou ld n o t b e lo we r than 1 2 k , othe rwise the 55 a cu rr en t so ur ce m a y no t be a b le t o ch ar ge th e sof t st a r t ca p a cito r to 0.5 v d u r i ng st ar t- up . ? cha ngin g the sof t st a r t resistor valu e al so slightly i n fluen ce s the m a ximum o u tput p o wer a t ab so lute min i mum in put vo lt ag e. so a f te r con f ig ur ing r st a r t ( s o f t ) it shou ld be chec ked if it is neces sary to re tune th e cu rr en t sense r e sisto r . ? th e ou tp ut p o wer a s a fun c tio n of the inpu t volt a ge is n o t a linea r fun c tion (s ee figu re 1 3 ) . whe n the m a ximum outpu t p o wer has be en tu ned to be e qua l fo r the absolute highes t and lowest input v o lt ag e, the actual maximum output power will be sligh t ly hig her between th ese limit s. an ot he r way to c o n f ig ur e th e co mp e n sa tio n is t o tu ne it in su ch a wa y t h a t t h e ma xim u m outpu t po we r a t nom inal low ma ins ( 1 1 5 v) is e x actly e qua l to the ma xim u m output power at high mains (230 v). in that c a s e the maximum output power will be e x a c tly r i gh t at the no mina l inpu t volt a ges , som e wha t lower at th e absolu t e minim u m a nd ma xim u m inp u t vo lt age and so mewha t h i ghe r be twe en the h i gh a nd lo w no mina l in put vo lt ag e. ? fo r accur a te over po we r comp ensatio n it is best to connect the vinsen se input volt a ge af te r th e br idg e re ctifier . ? at lo w in put po we r , th e opp co mpe n sation is switched of f so th at th e minim u m pe ak cur r e n t is no t influe nced b y the opp com pen sa tio n cur r en t. ? t he maximum temporary output power also depends on the input voltage. when the opp compensation has been configured op timally for the maximum continuous output power, it will not be compensated optimally for th e maximum temporary output power. see figure 14 .
a n 1098 1 a l l info r m atio n pr ov ide d in thi s d o cu ment is su bje c t t o le gal dis c l a i m er s. ? nx p b . v . 201 1. al l r i ght s r e se r v ed. application note rev. 1.1 ? 18 april 2011 27 of 44 nxp semiconductors AN10981 greenchip tea1738 series fixed frequency flyback controller 3.5 . 8 h ow to disa ble the opp compe nsation (for dcm) in dcm , the ma xim u m ou tp ut power doe s n o t d e p end o n th e ma ins volt a g e , so th er e is no th in g to be c o m p en sa te d. th e ob vio u s wa y to disab l e th e opp co mpe n sation wo uld be to r e d u ce th e sof t st ar t re sis t or t o 0 , bu t tha t wou l d ca use a pr ob lem at st a r t- up: the tot a l so f t st ar t r e sist a n ce ( t h e sum of r1 2 an d r1 3) sho u ld b e at le ast 1 2 k , othe rwise the 55 a current source ma y n o t b e ab le to cha r g e the sof t st a r t r e sistor to 0.5 v dur ing st ar t-u p . f i g 1 3 . m a x i mum co nti n u o u s ou tpu t p o w e r a s a fu nc ti on of in pu t v o l t a g e fig 14 . m aximu m te mpo r ar y ou tp u t p o wer as a fun c tion o f in pu t v o lt a g e mains input voltage (v (rms)) 80 260 240 160 200 120 100 180 220 140 019aaa171 70 75 65 80 85 60 maxim um contin uous output po w er (w) not compensated compensated mains input voltage (v (rms)) 80 260 240 160 200 120 100 180 220 140 019aaa172 85 75 95 105 maxim um tempor ar y output po w er (w) 65 not compensated compensated
a n 1098 1 a l l info r m atio n pr ov ide d in thi s d o cu ment is su bje c t t o le gal dis c l a i m er s. ? nx p b . v . 201 1. al l r i ght s r e se r v ed. application note rev. 1.1 ? 18 april 2011 28 of 44 nxp semiconductors AN10981 greenchip tea1738 series fixed frequency flyback controller the only way to disable the opp compensation is to clamp the vinsense pin as shown in figure 12 . in st ea d of cla m pin g it t o 3 v it sho u l d b e clamp ed to e.g. 1.2 v so tha t the clamp disable s mo st of th e opp co mpe n sati on witho ut in flu e n c in g the st ar t- up a nd b r own out dete c tion le ve ls o n vinsense. of co ur se this also disab l es th e inp u t ovp . ( t o cla m p a t ap p r o x im at ely 1. 2 v : r6 a = 1. 8 m , r6b = 1.6 m ). 3.5.9 opp delay a nd rest art de lay if a sh or te d ou tp ut o ccu rs , th e su p p ly ke ep s switching on an d of f ( o n l y valid for th e n on- latched ve rsion ) . t he r a tio of th e on- time an d of f-time can b e man i pu lated to contr o l the m a ximum a v e r a ge ou tp ut power . bo th ti m i ngs ar e defin ed at th e op timer pin. see se ctio n 3 . 7 on p a g e 31 for op t i m e r pin in fo rm ation. 3.5.1 0 disab ling the o verpower pro t ection if the opp is not ap pre c iated it ca n be disa bled b y con necting a 1 8 0 k re sistor fr om the op ti me r p i n to gr o u n d . be ca us e of th e 18 0 k res istor , the 10.7 a cu rr ent so ur ce o f th e opp is n o t a b l e t o ch ar ge t h e cap a citor to 2.5 v anymore (10. 7 a 18 0 k =1 . 9 v ) . th e 18 0 k r e sisto r also influe nces th e re st a r t del ay , b u t th is can be co mpe n sated b y choosing a higher o p ti mer c a p a cit o r value. it is not re co mme nde d to re duce the r e sisto r value b e lo w 10 0 k , so th at th e inter nal 10 7 a cu rr en t sour ce is alwa ys able to cha r g e th e op timer pin to 4.5 v in ca se of a r e st ar t eve n t. 3.5.1 1 lea ding edg e blank ing th e isense i npu t is in tern ally blan ked for th e fir s t 300 ns o f ea ch switch ing cycle to pr e ven t th e spik e ca us ed b y p a r a s i tic c a p a cit a nce ( gate- sour ce ca p a cit ance o f the mosfet and th e p a ra sitic ca p a cit a nce of th e tran sfo rme r) tr igg e rin g the pe ak cu rr ent co m p ar a t or p r e m at ur ely . 3.6 c trl pin 3.6 .1 g eneral th e ctrl pin con t r o ls th e amo unt of outpu t p o wer , this is do ne b y chan gin g both the p eak cu rr en t an d th e switchin g fr eq uen cy , see fig u r e 18 . fig 15. leading edg e bl an k i ng t leb v sense(max) v isense t 019aaa15 1 leb
a n 1098 1 a l l info r m atio n pr ov ide d in thi s d o cu ment is su bje c t t o le gal dis c l a i m er s. ? nx p b . v . 201 1. al l r i ght s r e se r v ed. application note rev. 1.1 ? 18 april 2011 29 of 44 nxp semiconductors AN10981 greenchip tea1738 series fixed frequency flyback controller 3.6 . 2 i npu t biasin g an in te rna l resistor o f 7 k co nne cte d to 5 . 4 v en ab les d i re ct co nn ectio n of an o p tocoup ler tr ansistor withou t an y e x ter n a l co mp o nen t s , to co nver t the o u tput cu rr en t of the o p tocou p ler into th e contr o l vo lt ag e. t he r e lation sh ip be twe en the ctrl pin cur r e n t a nd ctrl pin volt a ge can b e ca lculated with eq ua tio n 10 (see figure 17 ). (1 0) 3.6 . 3 p eak current control th e ct rl volt a g e set s the p r im ary pea k cur r e n t. the p r im ary cu rr en t is me asur ed by th e isense pin a nd is co mp are d to th e pe ak cur r ent se t by the ctrl pin . as soo n as th e pr im ar y p e a k cu rr en t m e as ur ed by th e is ense p i n e xce e d s t h e lim it se t b y th e ct rl p i n, the driver outpu t is switch ed l o w . t he r elationship between ctrl input and isen se ou tp u t is ca lcu l at ed wit h eq uatio n 1 1 . fi g 16 . c trl pi n, isense pi n a n d dri ver pi n 019aaa168 modula tion oscilla t or slope compensa tion +5.4 v ctrl u2-1 7 k 4.7 r15 10 r14 q1 d2 1n4148w 1 k r13 33 k r12 c5 220 nf c9 10 nf 7 4 isense vinsense (from vinsense pin) opp compensation 3 driver analog pr ocessing set dutymax s r q leading edge blanking stop frequency reduction v ctr l(ipeak) v ctr l(ipeak) (to o v er po w er protection) v ctr l(ipeak) = (v ctrl ? 1.1) / 5.6 55 a 0 a to 2 a soft start switched on just before start-up until isense pin reaches 0.5 v r11 0.15 fi g 17 . v ctrl as a function of i o(ctrl) v ct r l 5. 4 v7 1 0 3 i oc t r l () ? = 019aaa16 9 1.8 i o(ctrl) (ma) 3.9 5.0 0 0 v ctrl (v) 0.5 0.2
a n 1098 1 a l l info r m atio n pr ov ide d in thi s d o cu ment is su bje c t t o le gal dis c l a i m er s. ? nx p b . v . 201 1. al l r i ght s r e se r v ed. application note rev. 1.1 ? 18 april 2011 30 of 44 nxp semiconductors AN10981 greenchip tea1738 series fixed frequency flyback controller (1 1 ) see figure 18 . 3.6 . 4 f reque ncy co ntro l fr eque ncy r e duc tion a t medium power ? t o en su re e f ficien t op er ation at med i um o u tput po we r , th e freq ue ncy for m ediu m out pu t p o wer is re duce d t o 26.5 kh z. this frequency reduction dec r eas e s the switching losses. the fre quency is s t ill w e ll abov e the a udib l e sp ectru m p r e v e n ting a u d i ble no ise. fr eque ncy r e duc tion a t lo w power ? t o e n su r e e f fic i en t o p e r at io n at low ou tp ut po we r , the pea k cu rr ent cann ot be re duced be low 25 % of it s maximu m value . in stea d, to re duce the output power, the switching frequency is reduced. see figure 18 . it is impo rt a n t to use th e e n tire ct rl pin inp u t ra ng e. if the chosen cur r e n t se nse r e sisto r value is too low , only the low e r p a rt of th e contr o l cu rve is u s ed. this mea n s th at fr eq ue n cy re du ct ion a l re ad y st a r t s at a re lat i vely high peak current whic h may result in a udib l e no ise . if o v e r p o wer p r o t e c tion is no t ap pr eciated ( e .g. be ca use it is han dle d by a se co nda ry ic) , it ca n b e disab l ed ( s e e s e ct ion 3 .5.10 ). so if the overpower protec tion is not used, it is s t ill p o ssib le to use th e full inpu t r a n ge of th e ctrl inpu t. fr eque ncy inc r ea se a t pea k power ? at p eak po we r , th e switchin g fr eq uen cy is in cr ea se d to e n a b le hig h e r ou tp ut p o wer fr om the sam e co re . th is also in cr ea se s the switching losses but this is us ually irr e le va nt d u r i ng tem por ar y p eak load s. fo r maximu m b ene fit of th e fr eq uen cy incr ease, th e supp ly mu st op er ate (ma in ly) in dcm, (in cc m mo de , the fre que ncy in cr ea se d o e s no t h a ve much influ ence) . remark: t he pe ak power fr eq uen cy of tea173 8g t is 1 1 8 khz in stea d of 78 khz. v ctrl ipeak () v ctrl 1.1 ? 5.6 -- ---- ---- ---- ---- --- ---- --- - = fi g 18 . v ct rl (ip e ak ) and f sw as a function of v ctrl v ctrl (v) 1 1.5 2 2.5 3 3.5 4 4.5 0 019aab057 medium power frequency = 26.5 khz high po w er frequency = 63 khz peak po w er frequency = 78 khz 600 v ctr l(ipeak) (mv) f sw (khz) 0 100 200 300 400 500 10 20 30 40 50 60 70 80 90 100
a n 1098 1 a l l info r m atio n pr ov ide d in thi s d o cu ment is su bje c t t o le gal dis c l a i m er s. ? nx p b . v . 201 1. al l r i ght s r e se r v ed. application note rev. 1.1 ? 18 april 2011 31 of 44 nxp semiconductors AN10981 greenchip tea1738 series fixed frequency flyback controller 3.6 . 5 s lope compen sation to prevent subharmonic oscillation in cc m mode at duty cycles above 50 %, the tea1738 has built-in slope compensation. the slope compensation is internally added to the ctrl input signal (see figure 19 ) . refer r e d to th e isense p i n, th e amo unt of slo pe co m p e n s a t i on is 19 m v / s. the slop e comp ensatio n is on ly a c tive on d u ty cycle s hig h e r than 45 %. 3.7 o p t imer pin 3.7 . 1 o verpower delay and rest a r t d e lay th e op timer pin pr ovide s two dif f e r e n t time co nst a n t s for : ? opp de lay (the time fro m exceed ing the p o we r limit to tr ig ge rin g th e pr ot ec tion ) ? rest ar t d e lay (the time fr om trig ger ing the pro t ectio n until the ne xt re st ar t attemp t) bot h tim e r fu nc tio n s c a n be mor e o r le ss in dep end en tly a d justed. t he r a tio of th ese time s d e ter m ine s the ma xim u m po we r that can be d e liver ed whe n the sup p ly is c o ntinuously r e st ar tin g , e.g. if th e ou tp ut is shor ted. fig 19 . s lo pe c o mp en sation wav efor m s 019aaa17 0 0 oscillator t / t (%) slope compensation 45 75 100 fig 20. optime r pi n 019aaa173 restart control optimer 8 restart 1.2 v 4.5 v 400 mv v ctr l(lpeak) v ctr l(lpeak) (from ctrl pin) driver (from driver pin) overpower protection 2.5 v qd 107 a 10.7 a r16 2.2 m c8 220 nf clamp (to 22 v clamp on vcc pin) restart (from digital control) overpwr (to digital control) pwrdwn (to digital control)
a n 1098 1 a l l info r m atio n pr ov ide d in thi s d o cu ment is su bje c t t o le gal dis c l a i m er s. ? nx p b . v . 201 1. al l r i ght s r e se r v ed. application note rev. 1.1 ? 18 april 2011 32 of 44 nxp semiconductors AN10981 greenchip tea1738 series fixed frequency flyback controller 3.7 . 2 o verpower delay whe n th e inter n a l con t r o l volt a ge excee d s the over power th re sh old o f 40 0 m v , th e ov er po we r tim e r is ac tiva te d (s ee fig u re 20 ) . an in te rn al 10.7 a cu rr en t sou r ce char ge s the e x ter n a l op timer cap a citor ( c 8) . when th e over powe r co nd itio n last s lo ng e nou gh to cha r g e the op timer p i n to 2 . 5 v , the co ntro ller ca rr ies ou t a sa fe re st art pr oced ur e ( o r e n ter s la tche d pr otection mo de in the la tch ed ver s io n) . if the in te rn al co ntro l vo lt age d r op s belo w 4 0 0 m v be fo re the op timer pin rea c hes 2.5 v , th e op timer cap a citor is imm edia t e l y d i scha rg ed . th e minimu m re co mme nde d value for th e op timer resistor (r 16 ) is 4 7 0 k ( o ther wise th ere is a cha n ce th at 10.7 a is not suf f ic ient to charge the capacitor up to 2.5 v). the opp attack time can be calculated with equation 12 . (1 2) wh er e r = r op t i me r (r16 ) an d c = c op timer (c8 ) . 3.7 . 3 r est a r t delay whe n a safe re st a r t pro c edu re is tr igg e r ed by on e of th e pr otectio n featur es (via the vin sense pin or the op timer pin), the op timer cap a citor will be quick l y c h arged to 4 . 5 v by an in te rna l 107 a cu rr en t so ur ce . t h e tea 1 7 3 8 e n te rs pow e r - d o w n mo d e an d d oes not st art ag ain un til the e x te rna l resi stor o n th e op timer pin ha s d i scha rg ed the capacitor to below 1.2 v . th e re st a r t tim e consist s of 2 pe rio d s: 1 . cha r g i ng the cap a citor fr om 2.5 v to 4 . 5 v by a 10 7 a cur r ent so ur ce . 2 . disch ar ging th e ca p a cito r fr om 4 . 5 v to 1.2 v by the e xte rn al re sistor . th e re st a r t tim e is ma inly deter min ed by the cap a citor dis charging from 4.5 v to 1. 2 v by r op t i me r ( eq uatio n 1 3 ). (13) fig 21 . o pt imer wavefo rms 019aaa174 v optimer v isense output v oltage 400 mv protection high load high load nor mal load v prot(optimer) output load t opp r ? c 1n 1 v pr ot optimer () ri pr o t o p t i me r () --- ---- --- ---- ---- ---- ---- --- ---- ---- ---- --- - - ? ?? ?? r ? c 1n 2.5 v r 10.7 a ---- --- ---- ---- ---- ---- --- --- - = = t re s t a r t , disch e ar g r ? c 1n v rest art o pti m er () lo w v res t art o ptime r () high --- ---- --- ---- ---- ---- ---- --- ---- ---- ---- --- ---- --- - ?? ?? r ? c 1n 1. 2 v 4. 5 v ---- --- ---- - - = =
a n 1098 1 a l l info r m atio n pr ov ide d in thi s d o cu ment is su bje c t t o le gal dis c l a i m er s. ? nx p b . v . 201 1. al l r i ght s r e se r v ed. application note rev. 1.1 ? 18 april 2011 33 of 44 nxp semiconductors AN10981 greenchip tea1738 series fixed frequency flyback controller wh er e r = r op t i me r (r16 ) an d c = c op timer (c8 ) . fo r a mo re a c cur a te calcula t io n the time r equ ire d to ch arg e the cap a citor fro m 2.5 v to 4.5 v should also be calculated and added to the discharge time ( equation 14 ). (1 4) wh er e r = r op t i me r (r16 ) an d c = c op timer (c8 ) . 3.7 .4 h ow to config ure r and c th e cap a cito r valu e has th e same in flu e n c e o n bo th d e lays. whe n the re sistor va lue is lar g e en ou g h (> 2 m ) it on ly inf l ue nc es th e re st a r t d e la y . s o t u n i n g th ese c o m p on e n t s is mo st conven ien t in the follo win g or de r: 1. t u n e or ca lcu l at e th e cap a c i to r v a lu e to o b t a in th e re qu ire d o pp time . 2. t u n e or ca lcu l at e th e re sist or va lue t o ob t a in t h e r e q u i re d re st a r t tim e . som e examp l es of opp d e lay an d re st a r t dela y for so me dif f ere n t rc co mbi nation s a r e sh ow n in ta b l e 6 . 3.8 p rotect pin 3.8 .1 g eneral t w o prot ec tio n f e a t u r e s ca n b e im ple m en t ed o n th e sa me protect pin u s i ng on ly a min i mum n u mb er o f comp on ent s: ? ove r v o lt age pr otection ( outp u t ovp) ? ove r t e mp er atur e pro t e c tion (ot p ) th e pr otection featu r es on th e prot ect p i n ar e always la tche d (a lso in th e no n- latch ed vers ion). 3.8 . 2 c ircuit de scription an in te rna l cu rr ent sour ce atte mpt s to ke ep the volt a g e o n th e protect pin eq ua l to 0 . 6 5 v . th is in te rn al cu rr en t sou r ce ha s a r ang e of ? 10 7 a to +32 a ( i .e . it ca n sin k 10 7 a and so urce 3 2 a). if th e inter nal cur r e n t so urce is out of ran g e the p i n can no lon g e r b e ke pt in th e 0.5 v to 0 . 8 v w i nd ow a n d a ctiv a t e s th e pr ot ec tio n . t restar t , ch e ar g rc 1n 1 v prot optimer () ri r estart o ptimer () --- ---- --- ---- ---- ---- --- ---- ---- ---- ---- --- ---- -- - ? ?? ?? 1n 1 v r estart o ptimer () hig h ri rest art o pti m er () ---- ---- --- ---- ---- ---- ---- --- ---- ---- ---- --- ---- -- - ? ?? ?? ? ?? ?? = rc 1 n 1 2. 5 v r 107 a ---- ---- --- ---- ---- ---- --- - - ? ?? ?? 1n 1 4.5 v r1 0 7 a - ---- --- ---- ---- ---- --- ---- - ? ?? ?? ? ?? ?? = t a ble 6. exam ples of opp att ack time an d re st a r t time r op t im e r (m ) c op timer (nf) t opp (ms) t re start (ms) ra tio t opp /t res t art 2.2 100 25 2 9 3 1 :12 2.2 220 54 6 4 4 1 :12 2.2 470 1 1 6 1 376 1:12 1 220 59 2 9 5 1 :5 4.7 220 53 1 371 1:26
a n 1098 1 a l l info r m atio n pr ov ide d in thi s d o cu ment is su bje c t t o le gal dis c l a i m er s. ? nx p b . v . 201 1. al l r i ght s r e se r v ed. application note rev. 1.1 ? 18 april 2011 34 of 44 nxp semiconductors AN10981 greenchip tea1738 series fixed frequency flyback controller 3.8 . 3 e xternal output ov ervolt age protection output ovp is activa ted wh en the vcc volt a g e excee d s the vo lt ag e o f th e zene r dio de (a t 10 7 a) p l us 0 . 8 v . th e ovp ca n be tun ed by pla c in g a re sistor (r ov p in figu re 2 2 ) in ser i es with the ze ne r dio de. a ser i es re sistor o f 10 k incr ease s the ovp volt ag e by a ppr oxima t e l y 1 v ( v = r ovp 10 7 m a). an ex te rn al ovp application is optional and is on ly r equ ire d if th e ovp lev e l must be lower tha n th e fixe d 30 v level of th e internal ovp protec tion (or if extr a filter ing of the au xili ary winding volt age is required). 3.8 . 4 o vertempe r a t ure protection th e otp is tr igge re d when the vo lt age o n the protect pin d r o p s belo w 0 . 5 v . th is h app ens when the resist an ce o f the ntc + ser i es resistor h a s d r o ppe d be low 0. 5 v / 32 a = 15.6 k . t he ot p is not influe nced b y vcc var i ation s be ca use the pro t ect p i n is in te rn ally b i as ed . t h e ot p is mo st accu ra te wh en the valu e of th e nt c is ch osen to be a s h i gh as po ssible . it is of ten r e q u ir ed for th erm a l re ason s, th at th e ntc is plac ed relatively far away from the con t r o lle r . placing r17 a s close as po ssible to the p r o t e c tio n pin he lp s to impr ove the imm unity to d i stur ba nces picke d up b y the lo ng pcb tr ack. ca p a cito r c10 sho u ld also b e p l aced a s clo s e as po ssib le to the pr otectio n p i n. the gr oun d con n e c tion of c10 sh ould be d i rectly to the g r ou nd p i n of th e co ntro ller . 3.8 . 5 c lamp an in te rna l cla m p keep s th e protect p i n volt ag e at 4.1 v to p r eve n t d a ma ge to the protect pin in ca se o f spikes. t he clamp vo lt age is specified a t a 2 0 0 a input current ( t h e exact volt age d epe nd s on th e cu rr en t) . in power - d o wn mod e , th e cl amp volt a ge d r op s to a ppr oxima t e l y 2 v . 3.9 d river pin 3.9 . 1 g ate drive r the driv er circuit has a current sourcing cap a bility of ty pic a lly 250 m a and a current sink cap a bility of typical l y 750 m a. this permit s fa st turn-on and turn-of f of the pow e r mosfet for e f ficien t op er ation . see f i gur e 1 6 o n p age 2 9 for driver pin control. f i g 2 2 . p ro tect pi n 019aaa153 ntc 470 k at 25 c 1 1 .2 k at 1 10 c r17 5.1 k 1 % c10 100 nf 4.1 v 0.8 v 0.65 v prothigh zd1 bzx84j-b24 vcc protect 6 r ovp (option) 0.5 v protlow current source sinks up to 107 a or sources up to 32 a to keep protect pin close to 0.65 v -30 0 0.50 0.65 0.80 100 i o(protect) (ma) v protect (v)
a n 1098 1 a l l info r m atio n pr ov ide d in thi s d o cu ment is su bje c t t o le gal dis c l a i m er s. ? nx p b . v . 201 1. al l r i ght s r e se r v ed. application note rev. 1.1 ? 18 april 2011 35 of 44 nxp semiconductors AN10981 greenchip tea1738 series fixed frequency flyback controller 3.9 . 2 f reque ncy mo dulation the switching frequency and its harmonics are usually responsible for a large part of the conducted emi problems. modulation of the switching frequency spreads all frequency peaks that are related to the switching frequency over 8 khz wide bands, significantly decreasing the so called "average measurement". see figure 16 on page 29 for loc a tion of oscillator and fr equency modulation. the oscillator is c o ntinuously modulate d at a rate of 280 h z and a range of 4k h z . 4. w ays to reduce no-load power th is section d e scr i be s ho w the n o - l oad p o wer ca n be min i mized in a n y t e a1 73 8-based flyback convert e r . 4.1 r emove power led som e ad apter s have a led con n e c ted to th e ou tp ut to indicate tha t the powe r is pre s ent. a led cu rr ent of 2 . 5 m a su pplie d fr om a 2 0 v o u tpu t volt ag e alr e a d y a d d s 50 m w to the no - l oa d po we r . a (h igh ef ficiency) led in se rie s with th e led of the o p tocou p le r do es n o t a d d to the power cons umption but it s bright ness will slightly vary w i th the load. another option is to su pp ly th e l e d fr om a se p a rate low vo lt age winding. 4.2 c han g e the primary rdc clamp to a z e ner c l amp th e ad va nt ag e of th e zen e r clam p is tha t it o n ly co ndu ct s when it is r e a lly ne ed ed an d is in dep end en t of th e switchin g fr eq uen cy . comp ar ed to a resisto r diode ca p a citor (rdc) cla m p it r e d u c e s no - l oa d po we r bu t in cr ea se s co st s a n d emi . fig 23 . f r e qu en cy mo du la tio n 019aaa17 5 70.5 f sw (khz) 66.5 62.5 t 1 / t = 280 hz f i g 2 4 . z en er cl am p 019aaa17 6
a n 1098 1 a l l info r m atio n pr ov ide d in thi s d o cu ment is su bje c t t o le gal dis c l a i m er s. ? nx p b . v . 201 1. al l r i ght s r e se r v ed. application note rev. 1.1 ? 18 april 2011 36 of 44 nxp semiconductors AN10981 greenchip tea1738 series fixed frequency flyback controller 4.3 m o d ify rdc clamp with a zener diode a z e ne r dio d e in s e r i es wit h t h e r o f th e rd c cla m p pr ev en t s the c a p a cit o r fr o m alm o st en tir e ly dis c h a r g in g at ea ch swit ch ing cy cle whe n ru nn in g a t lo w f r e q u e n c y du r i ng n o lo ad . add i ng th e ze ner dio de in cr ea se s co st s an d ma y a l so incre a se emi ( but no t a s m u ch a s a zener clamp). replacing r9 ( figure 1 ) by a 10 0 v ze ne r saves 5 m w at 23 0 v ( a c) . 4.4 r eco nsid er st art-up time specification usually th e ma xim u m st art- up time o f a po we r supply is s p ecified at low nominal mains volt a ge ( 1 1 5 v ( ac)) . but occa si ona lly the ma xi mum st ar t- up time is specified a t the ab so lu te m i nim u m ma in s v o lt a g e ( 9 0 v (ac )). in this case it is worth recons idering this requirement: 90 v ( ac) will probabl y be enc o untered in less than 1 % of the field but to a c h i eve a 2 s st ar t-u p tim e at 9 0 v ( ac) re qui res 17 m w extra st ar t-u p powe r at 23 0 v ( a c) 5 . ano t h e r 1 1 mw can be save d by allowing a maximu m st a r t-u p time of 3 s instea d of 2 s . se e figu r e f i g u r e 5 on p a g e 1 1 . 4.5 r edu ce vcc cap acitor value with a sm aller vcc ca p a cito r the ef ficiency o f the st ar t-u p cir c uit ca n be sign ifican tly imp r o v e d . ch ar ging o n ly half th e vcc cap a citor in the sam e tim e re quir e s on ly ha lf the p o wer . fo r a ma xim u m st ar t- up time o f 2 s a t 1 1 5 v (ac) , r edu cin g the vcc cap a cit a n c e from 4.8 f to 2.3 f a n d do ub lin g the s t ar t- up r e sis t o r v a lu e s sa ve s ap pr o x im at ely 20 m w . 4.6 x -cap quality use a goo d qu ality x- ca p. a po or q u a lity x-cap ( 3 3 0 nf) m a y d i ssip ate a s mu ch a s 25 m w at 2 3 0 v (ac) a t 6 0 hz . a go od q u a lity x- ca p diss ip a t e s le ss th an 2 m w . 4.7 x -cap value red u cing the value of the x-cap also decrease s the x-cap losses. it is better to solve emi problems at the source than by solving them with a very large x-cap. reducing the x-cap value not only reduces the losses in the x-cap itself but also in the required x-cap discharge circuit. fig 25 . rdc clamp with ze ner diode 019aaa17 7 5. if the two resistor st art- up circuit is used and th e vcc cap a cit a nce is 4.8 f ( 4 .7 f + 100 nf ).
a n 1098 1 a l l info r m atio n pr ov ide d in thi s d o cu ment is su bje c t t o le gal dis c l a i m er s. ? nx p b . v . 201 1. al l r i ght s r e se r v ed. application note rev. 1.1 ? 18 april 2011 37 of 44 nxp semiconductors AN10981 greenchip tea1738 series fixed frequency flyback controller 4.8 a ctive x-cap discharge rep l ace a p a ssive x- ca p dischar ge ( r e s istor ) by an a c tive dischar ge cir c u i t ( r e quir e s a h i gh volt a g e t ra nsistor ) . 4.9 a ctive st art-u p circuit rep l ace a p a ssive st ar t-up cir c u i t ( r e s istor s ) by a n active ch arg e circuit th at i s on ly active d u rin g st ar t- up ( r e quir e s a hig h vo lt ag e tr an sistor ). 4.10 in creasin g the impedance of th e vo lt age divider on vinsense w i t h r 4 =r 5=r 6 =1 0m and r7 = 2 4 0 k ap pr oximate l y 7 m w ca n be saved . in this case c6 can be reduc ed fr om 47 0 n f to 18 0 n f to k eep the same time const a nt. 4.1 1 in crease the impedance of the outp u t volt age divider doubling the impedance of the voltage divider on the output (r23 and r24 in figure 1 ) saves a ppr oxima t e l y 5 m w . in this case c1 6 a nd r2 2 a l so ha ve to b e a dap ted to keep the same loop r e spo n se. ho w h i gh the imp e d ance can b e incre a sed d epe nd s ver y mu ch o n th e lay o u t o f th e pcb a n d the in p u t cu rr en t of th e sh un t r e gu lat o r . 4.12 replacing the integrated shunt regulator (tl 431) by a discrete shunt regulator th e widely availa ble in te gra t ed tl 431 sh unt re gula t o r ver s io ns usually re qui re 1 m a for p r op er r e g u latio n . so me ma nufactur e r s specify 0 . 5 m a o r 0.6 m a. it is no t di f f icult to ma ke a lo w ( t e m pe ra tu re st ab le) d i scr e te alter n a t ive, se e fig u re 26 . fig 26 . d iscr ete shu n t re gu la to r 019aaa17 8 330 68 k 1 m 1 m 1 m 100 pf 8.2 v
a n 1098 1 a l l info r m atio n pr ov ide d in thi s d o cu ment is su bje c t t o le gal dis c l a i m er s. ? nx p b . v . 201 1. al l r i ght s r e se r v ed. application note rev. 1.1 ? 18 april 2011 38 of 44 nxp semiconductors AN10981 greenchip tea1738 series fixed frequency flyback controller 5. "zero w a tt" st andby power design ideas 5.1 l ess than 30 mw st andby power th e st and by p o wer ca n be r edu ced to less tha n 30 mw by switching the app lica t ion of f e n tire ly . (so n o ou tp ut vo lt age is availa ble . ) t he solu tio n s d e scrib ed in the follo wi ng sections do r e q u ire an exter nal sign al to switch th e su pply on o r of f. so the d e vice tha t is con nected to the p o wer supp ly switch es the pow e r sup p ly of f wh en it is n o lo nge r n e e ded . th is sho u ld be no pr ob lem for b a tte r y op era t e d eq uipm ent. 5.2 a ctive on figure 27 sh ow s h o w th e su pp ly ca n b e sw itch ed o n by a n ex ter n al a c t i ve -o n co ntr o l sign al. t he comp on ent s in re d ha ve to be add ed with re sp ect to t he existing ap plication . 5.2 . 1 s hut do wn sup p o s e the su pply is r unn ing a nd sud den ly the volt a g e o n the exter nal po wer- on sig nal is mad e low . t he tra n sistor of th e optoco upl er b l oc ks an d th e cur r e n t t h r o u g h r 1 an d r2 is f o r ce d int o ze n e r d i od e zd x. t r an sis t or q x p u lls vi nsens e p i n lo w . t h e t ea17 3 8 immediately stop s switching. the auxiliary winding does not s u pply the ic anymore and th e vo lt ag e on t h e vc c p i n dr op s b e lo w v uvl o . the ic e n ter s power - down mo de. 5.2 . 2 w ake -up whe n th e po we r- on sign al is ma de high, the o p tocou p ler co nd uct s . the vol t age o n the ze ne r dio de dr op s to 0 v an d stop s co ndu ct in g. qx blo cks and the vinsense pin is r e lea sed. the cur r ent th ro ugh r1 a nd r2 no w cha r ge s the vcc cap a citor . t he st ar t- up time will be the same as the normal st art-up time. 5.3 a ctive off fig u r e 28 show s how the supply can be sw itched o n by a n ex ter n al a c t i ve -o f f co ntr o l sign al. t he comp on ents in red have to be added with respect to t he existing application. fi g 27 . ?ze ro w a tt? a p p l i c a t io n with active-on control signal 019aab05 8 10 m 10 m 10 m 240 k rx 56 k r2 3.3 m r1 3.3 m active-on control signal ("power-on") l n c6 180 nf c11 2.2 f 50 v vinsense vcc 5 1 tea1738 zdx 30 v qx ux bd1b bd1a bd1d bd1c
a n 1098 1 a l l info r m atio n pr ov ide d in thi s d o cu ment is su bje c t t o le gal dis c l a i m er s. ? nx p b . v . 201 1. al l r i ght s r e se r v ed. application note rev. 1.1 ? 18 april 2011 39 of 44 nxp semiconductors AN10981 greenchip tea1738 series fixed frequency flyback controller 5.3 . 1 s hut do wn su pp os e th e sup p l y is ru n n in g an d th e ac tive - o f f con t r o l signa l is sudd en ly ma de high. th e tran sistor of the o p tocou p le r co nd uct s an d two thin gs hap pe n: ? t r an sistor qx con d u c t s and pulls vinsense pin l o w . the tea1 738 im med i ately stop s switchin g and th e ic en te rs po wer- do wn mod e . ? vcc is clamped to 18 v which is just below v st a r t u p . be cause of th is, tea17 38 cann ot d o any st a r t- up attemp t s. 5.3 . 2 w ake -up whe n th e po we r- do wn sign al is m ade l o w , th e optoco uple r blo c ks and the vinsense pin is im me d i at ely re le ase d . t h e vcc ca p a ci t o r wa s c l amp e d j u st be l o w v st a r t u p . this g uar an te es a sh ort star t- up time . fi g 28 . " ze ro w a tt" ap pl ic at ion with active-off signal 019aab05 9 10 m 10 m 10 m 240 k 180 k 2.2 m r2 3.3 m r1 3.3 m active-off control signal ("power-down") l n c6 180 nf c11 2.2 f 50 v vinsense vcc 5 1 tea1738 zdx 18 v qx ux bd1b bd1a bd1d bd1c
a n 1098 1 a l l info r m atio n pr ov ide d in thi s d o cu ment is su bje c t t o le gal dis c l a i m er s. ? nx p b . v . 201 1. al l r i ght s r e se r v ed. application note rev. 1.1 ? 18 april 2011 40 of 44 nxp semiconductors AN10981 greenchip tea1738 series fixed frequency flyback controller 6. layout recommendations 6.1 i n put section ? kee p the ma ins tr acks (l a n d n) lo w oh mic a n d close to ea ch o t her to a v o i d loo p s. ? position com m on m ode cho k es a w a y fro m th e po we r sectio n (m osfet an d tra n sform e r ) an d fr om e a ch othe r to p r e v e n t mag netic co uplin g to any of th e other comp on ent s. ? keep tracks from t h e bridge rec t ifier to c1 low ohmic and close to each ot her . 6.2 p ower section ? th e conn ectio n fro m th e neg ative te rmin a l of th e br idg e rectifier to the cur r e n t sen s e resis t or r 1 1 must go via c1. ? th e conn ectio n fro m th e positive te rmin a l of th e br idge rectifier to the tra n sfo r m e r mu st go via c1. ? kee p the cro s s se ctio n of th e loop fr om c1 via th e tr an sfor me r , mosfet q1 and th e cur r e n t se nse re sistor r1 1 ba ck to c1 a s small as po ssible . ? place c2 close to c1 . ? place pea k cla m p cir c uit r9, r10, c3 a n d d1 close to th e tra n sfor mer an d a w a y fr om tea1738. ? if mosfet q1 h a s a m e t a l t a b it mu st be in su lated fro m th e he at sin k . the h eat sink m u s t b e co nn ec te d to th e pr im ar y p o w e r g r o u n d . 6.3 a uxiliary winding ? place rectifier d3, r18 and vcc cap a c i to r c 1 1 close to the aux iliary w i nding. ? the connection of th e ground of the aux ilia ry w i nding to the c e ntral signal ground p o int must g o via c1 1 ( u se a sep a r a te tr ack to a v o i d th e no ise in th is gr ou nd cau s in g noise in vinsens e pin, protect pin, etc.). ? con nect th e centr a l signa l gr oun d with a low oh mic tr ack to th e centr a l po we r g r o und (c 1) . ? keep the cros s section of the loop from the auxiliary w i ndin g (via d3 and r18) to vcc cap a citor c1 1 and back to the auxilia ry winding as small as pos s ible. 6.4 f lyback controller ? place the t e a1 738 a w ay fr om the tra n sfo r m e r a nd the mosfet q1 . ? kee p conn ecti on fro m cu rr ent se nse r e sist or r1 1 to tea17 38 close to gr oun d tra c k. ? place vcc d e coup ling cap a citor c7 close to the vcc p i n. ? th e conn ectio n fro m th e vcc pin to the vcc cap a citor , c1 1, m u st go via the vcc decoupling cap a citor , c7. ? th e conn ectio n fro m th e gnd pi n to the ce ntra l sign al gr ou nd mu st go via the vcc decoupling cap a citor , c7. ? place r13 close to the isense pin.
a n 1098 1 a l l info r m atio n pr ov ide d in thi s d o cu ment is su bje c t t o le gal dis c l a i m er s. ? nx p b . v . 201 1. al l r i ght s r e se r v ed. application note rev. 1.1 ? 18 april 2011 41 of 44 nxp semiconductors AN10981 greenchip tea1738 series fixed frequency flyback controller ? pla c e c1 0 an d r1 7 clos e to th e pro t ect p i n. ot he r te rm in al o f c1 0 sho u l d ha ve sho r t co nne ctio n to gnd pin ? place c9 close to th e ctrl pin. ? place c6 close to th e vinsense pin . ? place c8 close to th e op timer pin. 6.5 m ains isolat ion ? kee p at least 6 mm dist an ce b e tween the co ppe r tra c ks o f the p r ima r y an d th e secondary side. ? place the y - cap cy1 close to th e tr an sfor me r . 6.6 s eco ndary side ? he at s i nk se co nd a r y dio d e d 9 an d d1 0: connect the met a l t a b (which is usua lly in tern ally con nected to the ca th od e) dir e ctly to th e he a t sin k. co n n e ct th e he at s i nk to the po sitive ou tp ut tr ack. ? kee p the cro s s se ctio n of th e loop fr om the tra n sfo r m e r via dio d e s d9 an d d1 0 an d ca p a cito rs c1 3 an d c1 4 ba ck to th e tr an sf or me r as sm a ll a s p o s sib le. ke ep o u t p u t tr ac ks c l os e to ea ch o t h e r . ? use a se p a ra te sig nal g r ou nd for r2 4 and sh unt re gula t or u3. co nn ect the sign al g r ou nd fro m r24 an d u3 via c19 to the p o wer gro u n d at c1 3 and c1 4. ? pla ce c1 9 clo se to r2 0 an d r2 3. ? th e co nn ectio n of r20 a n d r23 to the po siti ve ou tp ut volt a g e mu st go via c1 9 to c1 3 a nd c14. ? pla ce th e sh un t r e gu lat o r u3 a n d s u r r o u n d i ng c o m p on en t s aw ay fr om t r a n s f or m e r .
a n 1098 1 a l l info r m atio n pr ov ide d in thi s d o cu ment is su bje c t t o le gal dis c l a i m er s. ? nx p b . v . 201 1. al l r i ght s r e se r v ed. application note rev. 1.1 ? 18 april 2011 42 of 44 nxp semiconductors AN10981 greenchip tea1738 series fixed frequency flyback controller 7. legal information 7.1 definitions dr a f t ? the do c u m e nt is a draf t versi on onl y . the cont ent is st ill unde r int e rn al review and subje c t to f o rmal ap proval, which m a y re su lt in modif i cat i ons or add itio ns. nxp se miconduct o rs does not g i ve a n y rep resent a t io ns o r wa rrant ies as t o t he accu racy or compl e te ness o f inf o rma tio n in c l u ded her ein and shall hav e no liab ilit y fo r t he consequ ences o f use of such inf o rmat i on . 7.2 disclaimers li mi te d wa rr a n ty an d li a b il it y ? i n f o rmat i on in th is documen t is bel ieved to be accurat e and re liabl e. however , nxp s e micondu ct ors doe s not give any rep resent a t io ns o r wa rrant ies, e x p ressed or implie d, as to t he accuracy or completen e ss of such informa tio n a nd shall have no lia bility for the consequ ences o f use of such inf o rmat i on . in n o e v e n t shall nxp s e micond uctor s be lia ble fo r a n y in dire ct , in cid ent a l , pun itive, spe c i a l or consequ ent ial damag es (inclu ding - wit hou t limit a t io n - lost prof it s , lost savings, business int e rrupt ion, cost s related t o the remov a l or rep l acement of an y pro duct s o r rework ch arge s) whe t he r or not such dama ges a r e based on t o rt ( i ncludi ng negli gence) , warra nty , bre a ch of cont ract or an y ot her le gal th eory . not with s t andin g a n y d a mages th at cust omer might incur fo r any r eason what soe v e r , nxp semi co nduct o rs? ag greg at e and cumulat i ve l i abil i ty t o ward s custome r for t he pro duct s d e scr i bed he rein shall be li mite d i n a c cor dance wit h t he t e rms a nd condit i on s of comme rcial sale of nxp s e micondu ct or s. ri ght to m ake c h a n ge s ? nx p semicon ducto rs re s e rves t he rig h t t o ma k e chang es t o inf o rmat i on pu blished in t h is documen t, in cludin g wit ho ut limit a t io n sp ecificat ion s an d p r odu ct descript i ons, a t any time a nd with out not ice. this documen t super sed e s a nd repla c e s all inf o rma tio n sup p lied pr ior to t he pu blicat ion her eof . s u it a b il it y f o r us e ? nx p semicon ducto rs pr oduct s are no t design ed, aut hor ized or warran t e d t o be suit a b le fo r use i n l i fe supp ort , lif e-crit ical or safe ty-crit i cal syst ems o r e quip ment , nor in ap plicat ions where f a ilu re or malf unct i on of a n nx p semicond ucto rs pr oduct can re asonab ly be expe ct ed to result in per sonal inju ry , d eat h or seve re prop ert y or envi ronme n t a l damag e. nxp s e micondu c t ors accept s no liab ilit y f o r inclusion an d/o r use o f nxp semicon duct o rs p r odu ct s in such equip m ent o r a pplicat ion s and th eref ore such inclusion a nd/ or use is at the cust omer ? s own risk. ap plic ation s ? a ppli c a t io ns t hat a r e describe d h e rei n f o r an y of t hese prod uct s ar e for il lustra tive pu rpos es only . nxp se mico nduct o rs makes no repr esent a t io n o r wa rran t y tha t such a pplication s will be suit a b le for the sp ecifi ed use w i tho u t f u rt her t e sti ng or modif i cat i on. custome r s ar e responsib le for t he desig n a nd ope rat i on of t hei r a pplicat ion s and pr oduct s using nxp s emicondu ct or s pro duct s, an d nxp semi co nduct o rs acce pt s no liabi lity fo r any a s sist a n ce wit h app licati ons o r cu st omer pr oduct design . it is cust omer ? s sol e r e sponsib ilit y t o d e t e rmine whe t he r t h e nxp semicon ducto rs p r odu ct is sui t able a nd f i t f o r t he custome r ? s a pplicat ion s an d prod uct s pl anne d, as well as f o r t he plan ned app licati on and use of cu st ome r ? s t h ird p a rt y cust omer( s ) . custo mers sho u ld pro v id e appro p ria t e design an d o pera t in g saf e g uard s t o min i mize the r i sks asso cia t e d wit h t heir appl ica t io ns a nd prod uct s. nxp semicon duct o rs d oes n o t accept any liabil i ty rela ted t o any def ault , damag e, cost s o r probl em wh ich is based on a n y weakne ss or def aul t in th e cu st ome r ? s ap plicat ions or prod uct s, or t he appl ica t io n o r use b y custo m er ? s th ird p a rt y custo m er(s). c u st omer is respo n sible f o r doing a ll n e cessa r y te st ing f o r th e cu st omer ? s app lic at ions and pro duct s u s i ng nxp semicon ducto rs p r oduct s in orde r to av oid a de fau l t of the ap plicat ions and the p r odu ct s or of t he applicat ion or use by cu st omer ? s t hird p art y cu st ome r(s). nxp d oes n o t accept a n y lia b ilit y in t h is r e sp ec t. export c o nt r ol ? thi s docume n t as well as t h e it em(s) describ ed here i n may b e sub j ect t o e x p o rt con t ro l r egul atio ns. expo rt migh t requ ire a prio r aut hori z a t io n f r o m na tio nal aut hor iti e s. 7.3 t r ademarks noti ce : all r e fe renced b r ands, prod uc t name s , service names and t rad emarks are t he prop ert y of the i r respect i ve o w ners. gr een ch ip ? is a tr ade mark o f nxp b. v .
a n 1098 1 a l l info r m atio n pr ov ide d in thi s d o cu ment is su bje c t t o le gal dis c l a i m er s. ? nx p b . v . 201 1. al l r i ght s r e se r v ed. application note rev. 1.1 ? 18 april 2011 43 of 44 continued >> nxp semiconductors AN10981 gree nchip tea1 73 8 ser ie s fixe d fre que ncy f l y bac k con t ro ller 8. content s 1 i n trod uctio n . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.1 scope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.2 features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.3 applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.4 ne w fea t u r e s comp a r ed to the t ea1733 . . . . . 4 1.5 la tch ed version t ea1738 l t . . . . . . . . . . . . . . 4 1.6 lo w st artup volt ag e ve rsi ons tea17 38f t and t ea1738g t . . . . . . . . . . . . . . . . . . . . . . . . 4 1.7 application schematic . . . . . . . . . . . . . . . . . . . . 5 2 pi n d e scrip t io n . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3 f u n c ti on al d e scri p ti on . . . . . . . . . . . . . . . . . . . 9 3.1 gener a l . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 3.2 s t art - up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 3.2.1 ch argin g the vcc cap a citor . . . . . . . . . . . . . . . 9 3.2.2 meas uring st art - up time . . . . . . . . . . . . . . . . . 12 3. 2. 3 s t a r t-up ci rcu i t with di ode s . . . . . . . . . . . . . . . 1 2 3.2.4 s t art - up cir cuit wit h char ge pump . . . . . . . . . . 13 3.2.4.1 ch arge pu mp i n co mb ina t io n with pfc . . . . . 1 5 3.2.5 vcc cap a citor. . . . . . . . . . . . . . . . . . . . . . . . . 15 3.2.6 s t art - up conditions . . . . . . . . . . . . . . . . . . . . . 16 3.2.7 sof t st art . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 3.2.8 safe restart . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 3.2.9 clamp s . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 3.3 inpu t volt ag e se nsing (vinsense p i n) . . . . . 1 8 3.3.1 gener a l . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 3.3.2 s t art - up volt age . . . . . . . . . . . . . . . . . . . . . . . . 19 3.3.3 brownout protect i on . . . . . . . . . . . . . . . . . . . . 19 3.3.4 overpower com p ensation . . . . . . . . . . . . . . . . 19 3.3.5 filter cap a citor . . . . . . . . . . . . . . . . . . . . . . . . 19 3.3.6 clamp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 3.4 protection features . . . . . . . . . . . . . . . . . . . . . 20 3.4.1 gener a l . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 3.4.2 brownout protect i on . . . . . . . . . . . . . . . . . . . . 20 3.4.3 maximum on-time protection (tea 1738t / t ea1738l t) . . . . . . . . . . . . . . . . 20 3.4.4 internal overt e mpe r a t u r e pro t ectio n (internal ot p) . . . . . . . . . . . . . . . . . . . . . . . . . 20 3.4.5 overpower protection (o pp) . . . . . . . . . . . . . 20 3.4.6 internal o u tput overv o lt age protection (internal ovp) . . . . . . . . . . . . . . . . . . . . . . . . . 21 3.4.7 external o u tp ut overv o lt age protection (external ovp) . . . . . . . . . . . . . . . . . . . . . . . . 21 3.4.8 external overt e mpera t u r e protection (external ot p) . . . . . . . . . . . . . . . . . . . . . . . . 21 3.4.9 lat ched protection . . . . . . . . . . . . . . . . . . . . . 21 3.4.10 re settin g a l a tched pro t ectio n . . . . . . . . . . . . 2 1 3.4.1 1 underv o lt age locko ut (uvlo) . . . . . . . . . . . 21 3. 5 overpower protection (op p ) . . . . . . . . . . . . . 22 3 . 5 . 1 co ntinu ous and tempora r y ou tp ut po wer limit a t i on . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 3. 5. 2 how th e opp operates . . . . . . . . . . . . . . . . . 22 3. 5. 3 peak cur r ent lim i t a t i on (o cp) . . . . . . . . . . . . 22 3 . 5 . 4 inp u t vol t ag e compensa t i o n . . . . . . . . . . . . . . 22 3 . 5 . 5 ho w to con f i gure the current se nse res i st or . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 3 . 5 . 6 ca lcula t i ng the maximum tempo r ary output power . . . . . . . . . . . . . . . . . . . . . . . . . 24 3 . 5 . 7 ho w to con f i gure the opp compen sati on (r s t a r t( so f t ) ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 3. 5. 8 h o w t o d i sa b l e th e opp co mp en sa ti o n (for dcm) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 3. 5. 9 opp delay and r e st art delay . . . . . . . . . . . . . 28 3 . 5 . 10 di sabli ng the overpo wer protection . . . . . . . . 28 3 . 5 . 1 1 l eadi ng ed ge bla n king . . . . . . . . . . . . . . . . . . 28 3. 6 ctrl pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 3. 6. 1 general . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 3. 6. 2 input biasing . . . . . . . . . . . . . . . . . . . . . . . . . . 29 3. 6. 3 peak cur r ent control . . . . . . . . . . . . . . . . . . . . 29 3. 6. 4 frequency control . . . . . . . . . . . . . . . . . . . . . 30 3 . 6 . 5 sl ope compe n sation . . . . . . . . . . . . . . . . . . . 31 3. 7 op ti mer pin . . . . . . . . . . . . . . . . . . . . . . . . . 31 3. 7. 1 overpower delay and rest ar t delay . . . . . . . . 31 3. 7. 2 overpower delay . . . . . . . . . . . . . . . . . . . . . . 32 3. 7. 3 rest ar t delay . . . . . . . . . . . . . . . . . . . . . . . . . 32 3. 7. 4 how to conf igure r and c . . . . . . . . . . . . . . . 33 3. 8 prot ect pin . . . . . . . . . . . . . . . . . . . . . . . . 33 3. 8. 1 general . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 3. 8. 2 circuit description . . . . . . . . . . . . . . . . . . . . . 33 3 . 8 . 3 externa l o u tput overvolt age p r ote cti on . . . . . 34 3. 8. 4 overtemperature prot ec tion . . . . . . . . . . . . . . 34 3. 8. 5 clamp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 3. 9 dri ver pin . . . . . . . . . . . . . . . . . . . . . . . . . . 34 3. 9. 1 gate driver . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 3. 9. 2 frequency m o dulat ion . . . . . . . . . . . . . . . . . . 35 4 w ays to redu ce no -lo a d p o w e r . . . . . . . . . . . 35 4. 1 remove power led . . . . . . . . . . . . . . . . . . . . 35 4 . 2 ch ang e the p r imary rd c cl amp to a zener clam p . . . . . . . . . . . . . . . . . . . . . . . . . . 35 4. 3 mo di fy r d c cl am p wi t h a ze n e r d i o d e . . . . . 3 6 4 . 4 re consid er st art-up time sp ecification . . . . . . 36 4. 5 reduce vcc cap a citor value . . . . . . . . . . . . . 36 4. 6 x-cap qualit y . . . . . . . . . . . . . . . . . . . . . . . . . 36 4. 7 x-cap value . . . . . . . . . . . . . . . . . . . . . . . . . . 36 4. 8 active x-cap discharge . . . . . . . . . . . . . . . . . 37 4. 9 active st ar t-up circuit . . . . . . . . . . . . . . . . . . . 37
nxp semiconductors AN10981 greenchip tea1738 series fixed frequency flyback controller ? nxp b . v . 20 11 . a l l r i g h t s re se rv ed. for m o r e i n for m a t i o n , plea se visit: htt p :// w ww.n x p.co m for sale s of fice a d d r e sses, plea se se nd an ema i l t o : s a lesa ddre sses@ nxp . com date of release: 18 april 2011 document identifier: AN10981 please be aware that important notices concerning this document and the product(s) described herein, have been included in section ?legal information?. 4.10 increasi ng th e imped ance of the vo lt a ge divider on vinsense . . . . . . . . . . . . . . . . . . . 37 4.1 1 increase the impe dan ce o f the outpu t volt age divider. . . . . . . . . . . . . . . . . . . . . . . . . 37 4.12 re placi ng the integra t e d sh unt re gula t o r (t l431 ) b y a di screte shu n t reg u lator . . . . . . . 3 7 5 "ze r o w a tt" st and b y p o wer d esign id eas . . . 3 8 5.1 le ss than 3 0 mw st and by p o we r . . . . . . . . . . 3 8 5.2 active on . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 5.2.1 shut down . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 5.2.2 w a ke-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 5.3 active of f . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 5.3.1 shut down . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 5.3.2 w a ke-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 6 l a yo ut recommendati on s . . . . . . . . . . . . . . . . 40 6.1 input section . . . . . . . . . . . . . . . . . . . . . . . . . . 40 6.2 power section . . . . . . . . . . . . . . . . . . . . . . . . . 40 6.3 auxiliary winding . . . . . . . . . . . . . . . . . . . . . . . 40 6.4 flyback controller . . . . . . . . . . . . . . . . . . . . . . 40 6.5 mains is olation . . . . . . . . . . . . . . . . . . . . . . . . 41 6.6 seco ndary side . . . . . . . . . . . . . . . . . . . . . . . . 4 1 7 l e g a l i n fo rmatio n . . . . . . . . . . . . . . . . . . . . . . . 42 7.1 def i nitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 7.2 dis claimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 7.3 t r ademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 8 co ntent s . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43

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