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tb6585fg/ftg 2011-09-09 1 toshiba bi-cmos integrated circuit silicon monolithic tb6585fg, TB6585FTG 3-phase sine-wave pwm driver for bldc motors features ? sine-wave pwm drive ? triangular-wave generator ? hall amplifier ? lead angle control ? current limit control input (v rs = 0.5 v (typ.)) ? rotation pulse output (3 pulse/electrical degree 360) ? operating supply voltage range: vm = 4.5 to 42 v ? reference supply output: v refout = 4.4 v (typ.), 20 ma (max) ? output current: i out = 1.8 a (max), 1.2 a (typ.) (fg type) i out = 1.0 a (max), 0.8 a (typ.) (ftg type) ? output on-resistance: r on (p-channel and n-channel sum) = 0.7 ? (typ.) tb6585fg TB6585FTG weight: hsop36-p-450-0.65: 0.79 g (typ.) qfn48-p-0707-0.50: 0.137 g (typ.) the following conditions apply to solderability: about solderability, following conditions were confirmed (1)use of sn-37pb solder bath solder bath temperature: 230 dipping time: 5 seconds the number of times: once use of r-type flux (2)use of sn-3.0ag-0.5cu solder bath solder bath temperature: 245 dipping time: 5 seconds the number of times: once use of r-type flux
tb6585fg/ftg 2011-09-09 2 pin assignment tb6585fg note: pins 1 and 36 and pins 18 and 19 are respective ly connected together on the frame inside the ic. the nc pin can be used as a jumper. the fin and the package bottom are electrically connected. to stabilize the chip, the fin pins should be connected to s-g nd and p-gnd at a location as close to the tb6585fg as possible. v refout hup 1 2 hum hvp 3 4 hvm n.c 5 6 hwp hwm 7 8 cw/ccw s-gnd 9 10 n.c osc/c 11 12 osc/r reset 13 14 vsp fg 15 16 rs 17 18 fin 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 fin v refout g in + g in - g out ph lpf iv la ul ll tr ml vm u v w ir p-gnd vm tb6585fg/ftg 2011-09-09 3 TB6585FTG 13 14 15 16 17 18 19 20 24 37 39 38 41 40 43 42 48 44 25 26 27 28 29 30 31 32 36 1 3 2 5 4 7 6 12 8 nc tr nc nc nc o sc/r vsp nc n c nc nc nc nc nc g out nc vm u nc w ir p-gnd hvp nc fg iv ph la g in reset hvm ul ll nc 21 22 23 33 34 35 46 45 47 10 9 11 nc cw / cc w g in ml v refout hup hum lpf hwm hwp s-gnd osc/c v rs 13 14 15 16 17 18 19 20 24 37 39 38 41 40 43 42 48 44 25 26 27 28 29 30 31 32 36 1 3 2 5 4 7 6 12 8 nc tr nc nc nc o sc/r vsp nc n c nc nc nc nc nc g out nc vm u nc w ir p-gnd hvp nc fg iv ph la g in reset hvm ul ll nc 21 22 23 13 14 15 16 17 18 19 20 24 37 39 38 41 40 43 42 48 44 25 26 27 28 29 30 31 32 36 1 3 2 5 4 7 6 12 8 nc tr nc nc nc o sc/r vsp nc n c nc nc nc nc nc g out nc vm u nc w ir p-gnd hvp nc fg iv ph la g in reset hvm ul ll nc 21 22 23 33 34 35 46 45 47 10 9 11 nc cw / cc w g in ml v refout hup hum lpf hwm hwp s-gnd osc/c v rs tb6585fg/ftg 2011-09-09 4 pin description pin no. tb6585fg TB6585FTG symbol description 1, 36 7 vm motor power supply pin (vm = 4.5 to 42 v) 2 8 fg rotation speed output pin (3 pulses per electrical degree) 3 9 hwm w-phase hall-signal input ( ?) 4 10 hwp w-phase hall signal input (+) 5 11 s-gnd signal ground 7 12 osc/c connection pin for a capa citor to control pwm oscillation 8 13 osc/r connection pin for a resist or to control pwm oscillation 9 15 vsp speed control input 10 22 tr time setting pin for the anti-lock system 12 24 cw/ccw rotation direction select input 13 25 reset reset pin for disabling the outputs 14 26 hvm v-phase hall-signal input ( ? ) 15 27 hvp v-phase hall-signal input (+) 16 28 hum u-phase hall-signal input ( ? ) 17 29 hup u-phase hall-signal input (+) 18, 19 30 v refout reference voltage output (v refout = 4.4 v (typ.), i refout = 20 ma (max)), connection pin for an oscilla tion prevention capacitor 20 31 ml restart operation select input for the anti-lock system 21 32 ll lower limit control for lead angle 22 33 ul upper limit control for lead angle 23 34 la lead angle select input (this input is us ed to determine the lead-angle under the automatic lead-angle control.) 24 35 iv voltage output converted from the output current 25 36 lpf connection pin for a filter capacitor 26 37 ph connection pin for a peak-hold capacitor 27 39 gout amplified shunt voltage 28 46 g in - connection pin for an amplifier resistor 29 48 g in + shunt voltage input 30 1 rs overcurrent protection input (disables outputs when rs ? 0.5 v) 31 2 p-gnd power ground 32 3 ir connection pin for an output shunt resistor 33 4 w w-phase output 34 5 v v-phase output 35 6 u u-phase output 6, 11 14, 16, 17, 18, 19, 20, 21, 23, 38, 40, 41, 42, 43, 44, 45, 47 n.c no-connect tb6585fg/ftg 2011-09-09 5 i/o equivalent circuits some parts are omitted from the eq uivalent circuit diagrams or simp lified for the sake of simplicity. pin description symbol i/o signal internal circuit diagram position signal inputs hup hum hvp hvm hwp hwm analog hysteresis: ? 8 mv (typ.) speed control input v sp analog input range: 0 to v refout rotation direction select input l: clockwise (cw) h: counterclockwise (ccw) cw/ccw digital l: 0.8 v (max) h: 2.0 v (min) hysteresis: 200 mv (typ.) reset input l: drives a motor h: reset reset digital l: 0.8 v (max) h: 2.0 v (min) hysteresis: 200 mv (typ.) at reset: outputs are disabled; internal counter keeps running. lead angle control input 0 v: 0 3.0 v: 28 (5-bit ad converter) la when fixing the lead angle externally, connect ll to gnd and ul to v refout . also, apply a control voltage to the la pin. input range: 0 to 4.4 v (v refout ) when an input voltage of 3.0 v or higher is applied, the lead angle is clipped to a maximum of 28. the la pin should be left open when using the automatic-lead-angle control. at this time, the la pin can be used for determining the lead angle. v refout v refout v refout 150 k ? 100 ? v refout 100 ? cw/ccw 100 k ? v refout 100 ? reset 100 k ? v refout 200 k ? 100 ? 100 ? lower limit control input upper limit and automatic-lead- angle control input la tb6585fg/ftg 2011-09-09 6 pin description symbol i/o signal internal circuit diagram gain control inputs (lead-angle controller) g in ? g in ? g out non-inverting amplifier 25db (max) g out output voltage low: gnd high: v refout ? 0.4 v peak-hold (lead-angle controller) ph this pin is connected to a peak-hold capacitor and a discharge resistor. 100 k ? /0.1 ? f low-pass filter (lead-angle controller) lpf this pin is connected to an rc filter (low-pass filter) capacitor. this pin has an internal resistor of 100 k ? (typ.). 0.1 ? f lead-angle lower-limit control ll the lead angle is clipped to the lower limit. ll ? 0 v to 4.4 v (v refout ) when ll ? ul, la is fixed to the value determined by ll. lead-angle upper-limit control ul the lead angle is clipped to the upper limit. ul ? 0 v to 4.4 v (v refout ) when ll ? ul, la is fixed to the value determined by ll. g in ? v refout g in ? g out to peak-hold circuitr y 100 ? 100 ? v refout 100 ? v refout v refout 100 ? 100 ? ph v refout 100 ? 100 ? lpf 100 ? v refout ll 100 ? v refout ul tb6585fg/ftg 2011-09-09 7 pin description symbol i/o signal internal circuit diagram restart operation select input for the anti-lock system l: restart with power cycling h: automatic restart ml digital l: 0.8 v (max) h: 2.0 v (min) voltage output converted from output current iv analog iv = 0.5 v to 3.5 v ( ? 2 ma (max)) gain = 1.2 (typ.) current-limiting input rs analog digital filter: 1 ? s (typ.) the gate block protection is activated when rs reaches 0.5 v. (disabled every carrier cycle) u-phase, v-phase and w-phase outputs u v w motor drive output i out ? 1.2 a (typ.), 1.8 a (max) (tb6585fg) i out ? 0.8 a (typ.), 1.0 a (max) (TB6585FTG) 100 k ? 100 ? v refout v refout iv 10 k ? 60 k ? v refout 0.5 v 200 k ? 5 pf comparator rs v m ir u, v, w tb6585fg/ftg 2011-09-09 8 absolute maximum ratings (t a = 25c) characteristics symbol rating unit power supply voltage vm 45 v input voltage v in 4.7 v tb6585fg 1.8 (note 1) output current i out TB6585FTG 1.0 (note 1) a 1.3 (note 2) power dissipation p d 3.2 (note 3) w operating temperature t opr ?30 to 85 storage temperature t stg ?55 to 150 c note 1: output current may be limited by the ambient temperature or a heatsink. the maximum junction temperature should not exceed t jmax = 150c. note 2: measured for the ic only. (t a = 25c) note 3: measured on a board. (100 mm ? 200 mm ? 1.6 mm, cu: 50%) operating ranges (t a = 25c) characteristics symbol min typ. max unit power supply voltage vm 4.5 24 42 v oscillation frequency bandwidth f osc 4 5 6 mhz tb6585fg/ftg 2011-09-09 9 package power dissipation tb6585fg (1) rth (j-a): 96c/w (2) measured on a board (114 mm ? 75 mm ? 1.6 mm, cu: 20%) r th (j-a) = 65c/w (3) measured on a board (140 mm ? 70 mm ? 1.6 mm, cu: 50%) r th (j-a) = 39c/w TB6585FTG measured on a board (140 mm ? 70 mm ? 1.6 mm, cu: 50%) rth (j-a) = 38c/w ambient temperature t a (c) p d ? t a power dissipation p d (w) (2) (3) (1) 0 0 3.5 25 50 75 100 125 150 0.5 1 1.5 2 2.5 3 p d ? t a power dissipation (w) ambient temperature (c) tb6585fg/ftg 2011-09-09 10 electrical characteristics (t a = 25c, vm = 24 v) characteristics symbol test conditions min typ. max unit power supply current i m pre-drive current ? control current, i refout = 0 ma ? 7 14 ma i in (1) v in = 4.4 v la ? 22 40 i in (2) v in = 4.4 v v sp ? 30 60 input current i in (3) v in = 4.4 v reset, ml, cw/ccw ? 44 80 ? a in-phase input voltage range v cmrh 1.5 ? 3.5 v input voltage swing v h 50 ? ? mvpp input hysteresis v hysh (note) ?4 ?8 ? 12 mv hall amplifier input current i inh v cmrh = 2.5 v, single phase ? 1 ? 1 ? a high 2.0 ? v refout + 0.2 v in low cw/ccw, reset, ml 0 ? 0.8 v in hys cw/ccw, reset, ml ? 0.2 ? v sp (4.4) modulated wave: max v refout - 0.2 ? v refout + 0.2 input voltage v sp (0.5) commutation off ? start motor operation 0.3 0.5 0.7 v i out = 1.2 a u, v, w ? 0.7 1.0 tb6585 fg i out = 1.6 a u, v, w ? 0.7 1.0 output on-resistance r on (h+l) tb6585 ftg i out = 0.8 a u, v, w ? 0.7 1.0 ? v refout output voltage v refout i refout = 20 ma v refout 4.0 4.4 4.8 v v fg (h) i out = 1 ma fg v refout - 1.0 v refout - 0.2 ? fg output voltage v fg (l) i out = ? 1 ma fg ? 0.2 1.0 v i l (h) v out = 0 v ? 0 1 output leakage current i l (l) v out = 24 v ? 0 1 ? a current detection v rs rs 0.46 0.5 0.54 v input delay t rs rs ? output off ? 2.0 ? ? s amp out g out output current, i out = 5 ma, g in+ = 0.2 v g in- , g out : gain = 12 (11 k ? /1 k ? ) 2.25 2.3 ? v gain-controlling amplifier for lead-angle controller amp ofs g in , g out 11 k ? /1 k ? ? ?40 ? mv ? l ll = 0.7 v ?20 ? 20 voltage error for lead-angle limit control ? u ul = 2.0 v ?30 ? 30 mv ph out (0 ma) ph output current, i out = 0 ma, g out = 2.4 v 2.35 2.4 2.45 ph output current for lead-angle controller ph out (5 ma) ph output current, i out = 5 ma, g out = 2.4 v ? 1.9 ? v t la (0) la = 0 v or open, hall in = 100 hz ? 0 ? t la (1.5) la = 2.5 v, hall in = 100 hz ? 15 ? lead angle correction t la (3) la = 5 v, hall in = 100 hz ? 29 ? ? tml(on) lock detection time, tr = 180 pf ? 500 ? tml (off) output off time when ml = high, tr = 180 pf ? 500 ? ms automatic restart from motor lock f tr oscillation frequency, tr = 180 pf 1.5 2.0 2.5 khz vm (h) output start point 3.8 4.0 4.2 vm (l) output stop point 3.3 3.5 3.7 vm power supply monitor v h hysteresis width ? 0.5 ? v ? tb6585fg/ftg 2011-09-09 11 characteristics symbol test conditions min typ. max unit pwm frequency f c (5m) osc/c = 150 pf osc/r = 16 k ? 18 20 22 khz tsd (note) 150 165 180 thermal shutdown tsdhys thermal shutdown hysteresis ? 15 ? c note: product testing before shipment is not performed. functional description 1. basic operation at startup, the motor is driven by a square-wave commutation signal that is generated based on the position detection signal. when the position detection signal ex ceeds the rotational frequency of f = 2.5 hz, the rotor position is determined by the position detection sign al and the modulated wave signal is generated. then, the sine-wave pwm signal is generated by comparing th e modulated wave signal with the triangular wave signal to start a motor in pwm drive mode. startup to 2.5 hz: square-wave drive (120 commutation) f = fosc/(2 12 ? 32 ? 6) 2.5 hz or higher: sine-wave pwm drive (180 commutation) f ? 2.5 hz when f osc = 5 mhz 2. speed control input (vsp) (1) speed control input: 0 v ? v sp ? 0.5 v the motor-driving output is turn ed off. (motor is stopped.) (2) speed control input: v sp > 0.5 v when f osc = 5 mhz, the motor is driven by a square wave until f reaches 2.5 hz. then, the motor-driving signal is swit ched to a sine-wave signal. note: an amplitude of the modulated waveform becomes maximum when v sp = v refout . the pwm duty cycle that is obtained with the v sp voltage of v refout is defined as 100%. 3. carrier frequency setting the frequency of the triangular wave (carrier frequency) required for the pwm signal generation is fixed at the following value: f c = f osc /252 (hz), where f osc = reference clock frequency (rc oscillator frequency) example: when f osc = 5 mhz, f c = 19.8 khz 4. lead angle correction the lead angle of the motor driving signal generated in accordance with the induced voltage (hall signal) is corrected by an angle between 0 and 30. the lead angle control can be achieved by directly appl ying a voltage to the pa pin, or by using the motor current. modulated waveform triangular wave (carrier) gnd v refout 100% v refout v sp pwm duty cycle 0.5 v 0 v (1) (2) tb6585fg/ftg 2011-09-09 12 tb6585fg/ftg 2011-09-09 13 tb6585fg/ftg 2011-09-09 14 8. various protections (1) overcurrent protection (rs pin) when a dc link current exceeds the internal referenc e voltage, output transist ors are turned off. the tb6585fg/ftg exits overcurrent protection mode ever y carrier cycle. reference voltage = 0.5 v (typ.) (2) external reset (reset pin) output transistors are turned off when reset is high; they are turn ed on again when reset is low or open. the reset pin is activated if any abnormality is detected externally. (3) internal protections ? position detection fault protection when the position detection signals are all set to high or low, output tran sistors are turned off. otherwise, the motor is restarted every carrier cycle. ? anti-lock capability when the operation mode is not properly switched as configured from 120 ? commutation mode of startup operation to 180 commutation mode, the motor is deemed to be locked and output transistors are turned off. the re start operation can be selected fr om either the automatic restart or the power cycling. ? setting the time of motor-lock detection and the time while the motor is stationary ? the time required for the motor-lock detection and the time while the motor driving signal is inactive can be adjusted by the external capacitor c 1 . (these periods are set to be the same.) time setting ??? ? ? s1024 i v c t th1 i = 0.72 a, v th = 2 v example: when c 1 = 180 pf, t ? 500 ms (typ.). ? automatic restart (ml = high) ? when the hall signal frequency is kept below 2.5 hz for at least 500 ms (typ.), the tb6585fg/ftg becomes active and inactive periodically every 500 ms (typ.). the protection is disabled when the hall signal fr equency reaches 2.5 hz and the op eration mode is switched to 180 commutation mode. ? restart with power cycling (ml = open or low) ? when the hall signal frequency is kept below 2.5 hz for at least 500 ms (typ.), output transistors are disabled. the tb6585fg/ftg can be restarted by turning off and back on the vm power supply, which must be kept below 3.5 v (typ.). the tb6585fg/ftg can also be restarted by turning off and back on vsp, which must be kept below 1 v (typ.). ml ? high motor-lock detection (if hall signal frequency continues to be below 2.5 hz) hall u hall v hall w restart operation selector ml automatic restart ? protection is automatically disabled using the pulse counter pulse counter (10 bits) restart with power cycling ? protection is disabled by turning off and back on the v m power supply or v sp ml ? low tr drive output controller c 1 tb6585fg/ftg 2011-09-09 15 ? undervoltage protection (vm power supply monitoring) when the vm power supply is turned on or off, commutation signal outputs are disabled while vm is outside the operating voltage range. operation flow output: of f commutation signal power supply voltage 4.0 v (typ.) 3.5 v (typ.) gnd v m v m output: off output: on sine waveform (modulated signal) triangular wave (carrier frequency) position detector counter system clock generator phase alignment position signal (hall sensor) speed control (v sp ) comparator phase w phase v phase u u-phase out p ut output power transistors (p-channel+ n-channel) cr oscillation v-phase out p ut w-phase out p ut tb6585fg/ftg 2011-09-09 16 ? sine-wave pwm signal generation ? the modulated waveform is generated using the hall signals. the sine-wave pwm signal is then generated by comparing the modulated waveform with the triangular wave. the time between the rising edges (falling edges) and the immediately-following falling edges (rising edges) of any of the three hall signals (inter val of 60 electrical degrees) are calculated by the counter. this period is used for data generation of the next 60-electrical-degree interval. the modulated waveform of 60-electrical-degree interval consists of 32 data items. the time period for a single data item is 1/32 of the pr evious 60-electrical-degree interval. the modulated waveform advances by this period. (operating waveforms when cw/ccw = low) as illustrated above, the modulated waveform ) (1)?advanc es by 1/32 of the period between the rising edge ( ) of hu and the falling edge ( ) of hw. likewise, th e modulated waveform (2)? advances by 1/32 of the period between the falling edge ( ) of hw and the rising edge ( ) of hv. if the next edge does not occur even after comple ting the generation of 32 data, data for the next 60-electrical-degree in terval are generated based on the same time period until the next edge occurs. also, the phase alignment with th e modulated waveform is performe d at every zero-cross point. the modulated waveform is reset by being synchronized with the rising and falling edges of the position detection signal at every 60 electrical degrees. ther efore, the modulated waveform becomes discontinuous sw hup hvp hwp s u s v (5) (2) (6) (1) (3) (6) (1) (2) (3) *: though the hup, hvp and hwp pins are hall effect inputs, they are indicated as square waveforms for the sake of simplicity. * t s v (1)? 1 2 3 4 5 6 30 31 32 32 data * t * t ? t (1) ? 1/32 tb6585fg/ftg 2011-09-09 17 at every reset if there occurs a zero-cross point error of the hall signal, or when motor is being accelerated or decelerated. also, the phase alignment with th e modulated waveform is perfor med at every zero-cross point. the modulated waveform is reset by being synchronized with the rising and falling edges of the position detection signal (hall amplifier outp ut) at every 60 electrical degrees. therefore, if the next zero-cross point occurs before completing the generation of 32 data for 60-electrical-degree inte rval due to the zero-cross point error of the position detection signal, the current data is reset and the data generation for the next 60-electrical-degree inte rval is then started. in such cases, the modulated waveform is discontinuous at every reset. ha hb hc (2) (1) s b (1)? 1 2 3 4 28 29 30 31 1 3 2 reset tb6585fg/ftg 2011-09-09 18 |
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