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0.5 ? cmos 1.65 v to 3.6 v dual spdt/2:1 mux adg836 rev. a in fo rmation furn ished by an alog d e v i c e s is believed to be accurate and reliable. how e ver, n o resp on sibili ty is assume d b y a n alog de vices fo r its use, nor for an y i n fri n geme nt s of p a t e nt s or ot h e r ri ght s o f th ird parties th at may result fro m its use . specifications subjec t to chan g e witho u t n o tice. no licen s e is g r an te d by implicati o n or ot herwi s e u n der a n y p a t e nt or p a t e nt ri ghts of analog de v i ces. trademarks an d registered tra d ema r ks are the prop erty o f their respective ow ners. one technolog y way, p.o . box 9106, norwood, ma 02062-9106, u.s.a. t e l: 781. 329. 4 700 www.analog.com fax: 781. 461. 31 13 ? 2005 analog de vices, i n c. al l r i ght s r e ser v ed . features 0.5 ? typical o n resistance 0.8 ? maximum on resistance at 1 25c 1.65 v to 3.6 v operation automotive te mperature ran g e: C40c to +1 25c high current ca rrying capability: 300 ma cont inuous rail-to-rail swit ching operation fast-switching times <2 0 ns typical power consumption ( < 0.1 w) applic ati o ns cellu lar phones pdas mp3 players power routing battery-powered systems pcmcia cards modems audio an d v i de o signal ro uting communication systems 04308-001 s1a s1b s2a s2b in2 adg836 d1 d2 switches shown for a logic 1 input in1 fi g u r e 1 . general description the ad g836 is a lo w v o l t a g e cm os de vice con t a i nin g tw o indep e n d en tl y s e le c t a b le sin g le-p ole , do u b le-thro w (s p d t) s w itc h e s . t h i s d e v i c e of f e r s u l t r a l ow on re s i st an c e of l e ss t h an 0.8 ? o v er th e f u l l t e m p er a t ur e ra n g e . th e ad g836 is f u l l y s p ecif ie d f o r 3.3 v , 2.5 v , a nd 1.8 v s u p p l y o p era t io n. e a c h s w i t c h cond uc ts eq ual l y w e l l in bo th dir e c t io n s w h en o n , a nd has an i n p u t sig n al ra n g e t h a t ext e n d s t o t h e s u p p lies. th e ad g836 exhib i ts b r eak-bef o r e -mak e s w i t c h ing ac tio n . the ad g 836 is a v ail a b l e in a 10 -le a d m s o p and a 3 mm 3 mm 12-l e ad lf cs p . product highlights 1. <0.8 ? o v er f u l l t e m p era t ur e ra n g e o f C40c t o +125c. 2. s i n g le 1.65 v t o 3.6 v o p era t ion. 3. c o m p a t i b le wi th 1.8 v cm os l o g i c. 4. h i g h c u r r en t han d l i n g c a p a b i li ty (300 ma co n t in uo us c u r r en t a t 3.3 v). 5. l o w th d + n ( 0 .02% typ). 6. 3 mm 3 mm lfcs p p a c k a g e a nd 10-lead ms o p p a c k a g e .
adg836 rev. a | page 2 of 16 table of contents specifications..................................................................................... 3 absolute maximum ratings............................................................ 6 esd caution.................................................................................. 6 pin configurations ........................................................................... 7 typical performance characteristics ..............................................8 test circuits..................................................................................... 11 outline dimensions ....................................................................... 13 ordering guide .......................................................................... 13 revision history 4/05rev. 0 to rev. a updated format..................................................................universal changes to table 1............................................................................ 3 changes to table 2............................................................................ 4 changes to table 3............................................................................ 5 changes to ordering guide .......................................................... 13 revision 0: initial version
adg836 rev. a | page 3 of 16 specifications v dd = 2.7 v to 3.6 v, gnd = 0 v, unless otherwise noted. table 1. temperature 1 parameter +25c ?40c to +85c ?40c to +125c unit test conditions/comments analog switch analog signal range 0 v to v dd v on resistance (r on ) 0.5 ? typ v dd = 2.7 v, v s = 0 v to v dd , i s = 100 ma; 0.65 0.75 0.8 ? max figure 19 on resistance match 0.04 ? typ v dd = 2.7 v, v s = 0.65 v, i s = 100 ma between channels (?r on ) 0.075 0.08 ? max on resistance flatness (r flat (on) ) 0.1 ? typ v dd = 2.7 v, v s = 0 v to v dd 0.15 0.16 ? max i s = 100 ma leakage currents v dd = 3.6 v source off leakage i s (off) 0.2 na typ v s = 0.6 v/3.3 v, v d = 3.3 v/0.6 v; figure 20 channel on leakage i d , i s (on) 0.2 na typ v s = v d = 0.6 v or 3.3 v; figure 21 digital inputs input high voltage, v inh 2 v min input low voltage, v inl 0.8 v max input current i inl or i inh 0.005 a typ v in = v inl or v inh 0.1 a max c in , digital input capacitance 4 pf typ dynamic characteristics 2 t on 21 ns typ r l = 50 ?, c l = 35 pf 26 28 29 ns max v s = 1.5 v/0 v; figure 22 t off 4 ns typ r l = 50 ?, c l = 35 pf 7 8 9 ns max v s = 1.5 v; figure 22 break-before-make time delay 17 ns typ r l = 50 ?, c l = 35 pf (t bbm ) 5 ns min v s1 = v s2 = 1.5 v; figure 23 charge injection 40 pc typ v s = 1.5 v, r s = 0 ?, c l = 1 nf; figure 24 off isolation ?67 db typ r l = 50 ?, c l = 5 pf, f = 100 khz; figure 25 channel-to-channel crosstalk ?90 db typ s1a?s2a/s1b?s2b, r l = 50 ?, c l = 5 pf, f = 100 khz; figure 28 ?67 db typ s1a?s1b/s2a?s2b, r l = 50 ?, c l = 5 pf, f = 100 khz; figure 27 total harmonic distortion (thd + n) 0.02 % r l = 32 ?, f = 20 hz to 20 khz, v s = 2 v p-p insertion loss ?0.05 db typ r l = 50 ?, c l = 5 pf; figure 26 ?3 db bandwidth 57 mhz typ r l = 50 ?, c l = 5 pf; figure 26 c s (off) 25 pf typ c d , c s (on) 75 pf typ power requirements v dd = 3.6 v i dd 0.003 a typ digital inputs = 0 v or 3.6 v 1 4 a max 1 temperature range for y version is ?40c to +125c. 2 guaranteed by design, not subject to production test.
adg836 rev. a | page 4 of 16 v dd = 2.5 v 0.2 v, gnd = 0 v, unless otherwise noted. table 2. temperature 1 parameter +25c ?40c to +85c ?40c to +125c unit test conditions/comments analog switch analog signal range 0 v to v dd v on resistance (r on ) 0.65 ? typ v dd = 2.3 v, v s = 0 v to v dd, i s = 100 ma; 0.72 0.8 0.88 ? max figure 19 on resistance match between 0.04 ? typ v dd = 2.3 v, v s = 0.7 v, i s = 100 ma channels (?r on ) 0.08 0.085 ? max on resistance flatness (r flat (on) ) 0.16 ? typ v dd = 2.3 v, v s = 0 v to v dd, i s = 100 ma 0.23 0.24 ? max leakage currents v dd = 2.7 v source off leakage i s (off) 0.2 na typ v s = 0.6 v/2.4 v, v d = 2.4 v/0.6 v; figure 20 channel on leakage i d , i s (on) 0.2 na typ v s = v d = 0.6 v or 2.4 v; figure 21 digital inputs input high voltage, v inh 1.7 v min input low voltage, v inl 0.7 v max input current i inl or i inh 0.005 a typ v in = v inl or v inh 0.1 a max c in , digital input capacitance 4 pf typ dynamic characteristics 2 t on 23 ns typ r l = 50 ?, c l = 35 pf 29 30 31 ns max v s = 1.5 v/0 v; figure 22 t off 5 ns typ r l = 50 ?, c l = 35 pf 7 8 9 ns max v s = 1.5 v; figure 22 break-before-make time delay (t bbm ) 17 ns typ r l = 50 ?, c l = 35 pf 5 ns min v s1 = v s2 = 1.5 v; figure 23 charge injection 30 pc typ v s = 1.25 v, r s = 0 ?, c l = 1 nf; figure 24 off isolation ?67 db typ r l = 50 ?, c l = 5 pf, f = 100 khz; figure 25 channel-to-channel crosstalk ? 90 db typ s1a?s2a/s1b?s2b, r l = 50 ? , c l = 5 pf, f = 100 khz; figure 28 ?67 db typ s1a?s1b/s2a?s2b, r l = 50 ?, c l = 5 pf, f = 100 khz; figure 27 total harmonic distortion (thd + n) 0.022 % r l = 32 ?, f = 20 hz to 20 khz, v s = 1.5 v p-p insertion loss ?0.06 db typ r l = 50 ?, c l = 5 pf; figure 26 C3 db bandwidth 57 mhz typ r l = 50 ?, c l = 5 pf; figure 26 c s (off) 25 pf typ c d , c s (on) 75 pf typ power requirements v dd = 2.7 v i dd 0.003 a typ digital inputs = 0 v or 2.7 v 1 4 a max 1 temperature range for y version is ?40c to +125c. 2 guaranteed by design, not subject to production test.
adg836 rev. a | page 5 of 16 v dd = 1.65 v 1.95 v, gnd = 0 v, unless otherwise noted. table 3. temperature 1 parameter +25c ?40c to +85c ?40c to +125c unit test conditions/comments analog switch analog signal range 0 v to v dd v on resistance (r on ) 1 ? typ v dd = 1.8 v, v s = 0 v to v dd , i s = 100 ma; 1.4 2.2 2.2 ? max figure 19 2 4 4 ? max v dd = 1.65 v, v s = 0 v to v dd , i s = 100 ma; figure 19 on resistance match between 0.1 ? typ v dd = 1.65 v, v s = 0.7 v, i s = 100 ma channels (?r on ) leakage currents v dd = 1.95 v source off leakage i s (off) 0.2 na typ v s = 0.6 v/1.65 v, v d = 1.65 v/0.6 v; figure 20 channel on leakage i d , i s (on) 0.2 na typ v s = v d = 0.6 v or 1.65 v; figure 21 digital inputs input high voltage, v inh 0.65 v dd v min input low voltage, v inl 0.35 v dd v max input current i inl or i inh 0.005 a typ v in = v inl or v inh 0.1 a max c in , digital input capacitance 4 pf typ dynamic characteristics 2 t on 28 ns typ r l = 50 ?, c l = 35 pf 37 38 39 ns max v s = 1.5 v/0 v; figure 22 t off 7 ns typ r l = 50 ?, c l = 35 pf 9 10 11 ns max v s = 1.5 v; figure 22 break-before-make time delay (t bbm ) 21 ns typ r l = 50 ?, c l = 35 pf 5 ns min v s1 = v s2 = 1 v; figure 23 charge injection 20 pc typ v s = 1 v, r s = 0 v, c l = 1 nf; figure 24 off isolation ?67 db typ r l = 50 ?, c l = 5 pf, f = 100 khz; figure 25 channel-to-channel crosstalk ? 90 db typ s1a?s2a/s1b?s2b; r l = 50 ?, c l = 5 pf, f = 100 khz; figure 28 ?67 db typ s1a?s1b/s2a?s2b; r l = 50 ?, c l = 5 pf, f = 100 khz; figure 27 total harmonic distortion, thd 0.14 % r l = 32 ?, f = 20 hz to 20 khz, v s = 1.2 v p-p insertion loss ?0.08 db typ r l = 50 ?, c l = 5 pf; figure 26 C3 db bandwidth 57 mhz typ r l = 50 ?, c l = 5 pf; figure 26 c s (off) 25 pf typ c d , c s (on) 75 pf typ power requirements v dd = 1.95 v i dd 0.003 a typ digital inputs = 0 v or 1.95 v 1.0 4 a max 1 temperature range for y version is ?40c to +125c. 2 guaranteed by design, not subject to production test.
adg836 r e v. a | pa ge 6 o f 1 6 absolute maximum ratings t a = 2 5 c , u n l e ss ot he r w i s e not e d. table 4. parameter rating v dd to gnd ?0.3 v to +4.6 v analog inputs 1 ?0.3 v to v dd + 0.3 v digital inputs 1 ?0.3 v to 4.6 v o r 10 ma, whichev e r occu rs first peak current, s or d 3.3 v operation 500 ma 2.5 v operation 460 ma 1.8 v operation 420 ma (pulsed at 1ms, 10% duty cycle max) continuous current, s or d 3.3 v operation 300 ma 2.5 v operation 275 ma 1.8 v operation 250 ma operating tem p erature range automotive (y versio n) ?40c to +125c storage temperature range ?65c to +150c junction tempe r ature 150c msop package ja thermal impedance 206c/w jc thermal imp e dance 44c/w lfcsp package ja thermal imp e dance (3-layer board) 61.1c/w ir reflow, peak temperature <20 sec 235c 1 overvo l tages at in, s, or d are clampe d by internal dio d e s . current should b e l imited to the maxi m um ratings given. s t r e s s es a b o v e t h os e lis t e d u n de r a b s o l u t e m a xi m u m r a t i n g s ma y c a us e p e r m a n en t dama ge t o t h e de vice . this is a s t r e s s ra t i n g onl y ; f u n c t i o n al o p era t ion o f t h e de vice a t t h es e o r an y o t h e r con d i t io ns a b o v e t h o s e i ndic a te d i n t h e op er a t io na l s e c t io n o f t h is sp e c if ic a t io n is no t im plie d . e x p o sur e t o a b s o l u te max i m u m ra t i ng co ndi t i on s fo r ex ten d e d p e r i o d s ma y a f fe c t de vice r e l i ab i l i t y . on ly o n e abs o lu te max i m u m r a t i n g ma y b e a pplie d a t an y o n e ti m e . table 5. truth table logic switch a switch b 0 o f f o n 1 o n o f f esd caution esd (electrostatic discharge) se nsiti ve device . e l ectrostatic char ges as high as 4 000 v readily accumulate on the human body and tes t eq uipment and can dis c harge w i t h out detection. although this product features proprietary esd protection circ uitry, permanent dama ge may occur on dev i ces subj ected to high energy electrostatic di scharge s . t h erefore, proper esd precautions are recom m ended to avoid performan c e degradation or l o ss of functiona l ity.
adg836 r e v. a | pa ge 7 o f 1 6 pin conf igurations in1 1 s1a 2 gnd 3 s2a 4 in2 5 d1 10 s1b 9 v dd 8 s2b 7 d2 6 adg836 top view (not to scale) 04308-002 f i g u re 2. 10-l e ad m s op (r m - 1 0 ) pin 1 indicator nc = no connect 1 s1a 2 gnd 3 s2a 9 s1b 8v dd 7 s2b 4 n c 5 i n 2 6 d 2 1 2 n c 1 1 n 1 1 0 d 1 top view (not to scale) adg836 04308-003 f i g u re 3. 12-l e ad l f csp (c p - 12) table 6. termi n ology v dd m o st positive p o wer supp ly pot ential. i dd positive supp ly current. gnd ground (0 v ) ref e rence. s source terminal. may be an input or output. d drain terminal. may be an input or output. in logic control input. v d (v s ) analog vo ltage on terminal s d, s. r on ohmic resi stanc e between d an d s. r fl a t (o n) flatness is defined as the differe nce between th e maximum and minimum value of on resistan ce as measured ov er the specified ana l og signal range. ?r on on resista n ce m a tch be tween any two channels. i s (off) source leakage current with the switch off. i d ( o ff) drain lea k age c u rrent with the switch off. i d , i s ( o n) channe l lea k ag e current with the switch o n . v inl maximum input voltage for logic 0. v inh minimum input voltage for logi c 1. i inl (i inh ) input current of the digital input. c s (off) off switch source capacitance. measured with reference to ground. c d (off) off switch drain capacita nce. measured with reference to ground. c d , c s (on) on switch c a pac i tance. meas ured with reference to ground. c in digital input capacitance. t on delay time between the 50% and the 90% point s of the digital input and switch on condition. t of f delay time between the 50% and the 90% point s of the digital input and switch off condition. t bbm on or off time measured betw een the 80% points of both swit c hes wh en switc hing from one to another. charge injection a measure of the glitch impulse transferred fr om the digital input to the anal og output d u ring on-off switchin g. off isolation a measure of unwanted si gnal coupling through an off switch. crossta l k a measure of unwanted signal, which is c o uple d through from one cha nnel to another, as a res u lt of parasitic capacita nce. ?3 db bandwidth the freq uency at whic h the output is attenuate d by 3 db. on respo n se t h e frequency respon se of the on switch. insertion los s t h e loss d u e to the on resi stance of the switch. t h d + n t h e ratio of the harmoni c s amp l itude pl us noise of a signal to the fundamental.
adg836 r e v. a | pa ge 8 o f 1 6 typical perf orm ance cha r acte ristics 0.60 0.55 0.50 0.45 on re s i s t ance ( ? ) 0.40 0.35 0.30 0.25 0.20 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 v d , v s (v) v dd = 2.7v v dd = 3v t a = 25c v dd = 3.6v v dd = 3.3v 04449-0-004 f i gure 4. o n res i stanc e v s . v d (v s ) v dd = 2. 7 to 3. 6 v 0.8 on re s i s t ance ( ? ) 0.3 0.4 0.5 0.6 0.7 0.2 0 0.5 2.5 04308-005 2.0 1.5 1.0 v d , v s (v) t a = 25c v dd = 2.5v v dd = 2.3v v dd = 2.7v f i gure 5. o n res i stanc e v s . v d (v s ) v dd = 2. 5 v to 0. 2 v 1.8 on re s i s t ance ( ? ) 0.4 0.6 0.8 1.0 1.2 1.4 1.6 0.2 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 v d , v s (v) t a = 25 c v dd = 1.65v v dd = 1.8v v dd = 1.95v 04308-006 f i gure 6. o n res i stanc e v s . v d (v s ) v dd = 1. 8 3.6 1.2 on re s i s t ance ( ? ) 0.2 0.4 0.6 0.8 1.0 0 0 3.0 2.5 2.0 1.5 1.0 0.5 v d , v s (v) +125 c +85 c +25 c ?40 c v dd = 3.3v 04308-007 f i gure 7. o n res i stanc e v s . v d (v s ) fo r di ffer e nt t e m p er a t ure , 3 . 3 v 1.2 on re s i s t ance ( ? ) 0.2 0.4 0.6 0.8 1.0 0 0 2.5 2.0 1.5 1.0 0.5 v d , v s (v) +125c +25 c v dd = 2.5v +85 c ?4 0 c 04308-008 f i gure 8. o n res i stanc e v s . v d (v s ) fo r di ffer e nt t e m p er a t ure , 2 . 5 v 1.4 on re s i s t ance ( ? ) 0.2 0.5 0.7 0.8 1.0 1.2 0 0 1.8 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 v d , v s (v) +25c ?4 0 c +85 c +125c v dd = 1.8v 04308-009 f i gure 9. o n res i stanc e v s . v d (v s ) fo r di ffer e nt t e m p er a t ure , 1 . 8 v
adg836 r e v. a | pa ge 9 o f 1 6 0 ?20 ?80 ?60 20 40 60 80 curre nt (na) ?40 02 0 6 0 40 80 100 120 temperature ( c) i d , i s (on) i s (off) v dd = 3.3v 04308-010 f i g u re 10. l e akag e current v s . t e mpe r at ure , 3. 3 v 60 curre nt (na) ?30 ?20 ?10 0 10 20 30 40 50 ?40 0 120 100 80 60 40 20 temperature ( c) v dd = 2.5v i d , i s (on) i s (off) 04308-011 f i g u re 11. l e akag e current v s . t e mpe r at ure , 2. 5 v 50 curre nt (na) ?20 ?10 10 0 20 30 40 0 120 100 80 60 40 20 temperature ( c) v dd = 1.8v i s , i d (on) i s (off) 04308-012 f i g u re 12. l e akag e current v s . t e mpe r at ure , 1. 8 v 0 10 20 30 40 50 60 70 80 90 q inj (pc) 04308-013 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 v s (v) t a = 25c v cc = 3.3v v cc = 2.5v v cc = 1.8v f i gure 1 3 . char ge i n jectio n vs . s o u r c e v o l t a g e 0 5 10 15 20 25 30 35 time (ns) 60 40 02 0 ? 4 0 ? 2 0 80 10 0 1 20 temperature ( c) t on t off v dd = 3v v dd = 3v v dd = 2.5v v dd = 2.5v v dd = 1.8v v dd = 1.8v 04308-014 f i g u re 14. t on /t of f ti mes v s . t e mpe r at u r e ?1 0 ?1 1 ?1 2 ?1 3 ?8 ?4 ?2 0 1 ?6 ?9 ?5 ?3 ?1 ?7 atte nuation (db) 0.01 0.1 1 1 0 100 1000 frequency (mhz) t a = 25c v cc = 3.3v/2.5v/1.8v 04308-015 f i gure 15. bandwid t h
adg836 rev. a | page 10 of 16 ?8 0 ?7 0 ?6 0 ?5 0 ?4 0 ?3 0 ?2 0 ?1 0 0 atte nuation (db) 04308-016 0.01 0.1 1 1 0 100 1000 frequency (mhz) t a = 25c v cc = 3.3v/2.5v/1.8v f i gure 16. o ff isolation vs. f r eque nc y ? 100 ?90 ?80 ?70 ?60 ?50 ?40 ?30 ?20 ?10 atte nuation (db) s1a ?s1b s1a ?s2a 0.01 0.1 1 1 0 100 1000 frequency (mhz) v cc = 3.3v/2.5v/1.8v t a = 25c 04308-017 fi g u r e 1 7 . c r o s s t a l k v s . fr e q u e n c y 0.10 thd + n (%) 0 0.02 0.04 0.06 0.08 20 20k 100 50 200 1k 500 2k 10k 5k frequency (hz) v dd = 2.5v t a = 25c s1a ?d1 32v load 1.5v p-p 04308-018 f i gure 18. t o t a l h a rm oni c d i s t o r ti on + n o is e
adg836 rev. a | page 11 of 16 test circuits sd v s r on = v1/i ds i ds v1 04308-019 f i g u re 19. o n r e s i s t anc e sd v s v d i s (off) i d (off) a a 04308-020 f i g u re 20. o f f l e akag e sd v d i d (on) nc a 04308-021 f i g u re 21. o n l e akag e 04308-022 d in gnd r l 50 ? c l 35pf v dd v in v out v s v dd v out t on t off 50% 50% 90% 90% 0.1 f s1b s1a f i gure 2 2 . s w i t chin g t i m e s , t on , t of f v out v in t bbm t bbm 50% 50% 80% 0v d in gnd r l 50 ? c l 35pf v dd v out v s v dd 0.1 f s1b s1a 80% 04308-023 f i gure 23. break-b e fore -mak e tim e d e lay , t bbm 04308-024 in gnd v dd v s v in v out 1n f v out nc sw on q inj = cl ? v out sw off ? v out s1b s1a d f i gure 2 4 . char ge i n jectio n
adg836 rev. a | page 12 of 16 04308-025 v dd v s v dd nc network analyzer s1b s1a gnd off isolation = 20 log d 50 ? 50 ? v out r l 50 ? 0.1 f v out vs f i g u re 25. o f f is ol a t ion network analyzer r l gnd v dd v dd v out v s s1a s1b 0.1 f d 50 ? 50 ? insertion loss = 20 log v out with switch v out without switch 04308-026 f i gure 26. bandwid t h 04308-027 v out v dd v dd gnd v s r l 50 ? r l 50 ? 0.1 f 50 ? s1a d s1b channel-to-channel crosstalk = 20 log v out vs network analyzer f i gure 27. channe l-to - c hann el crosstalk (s 1aCs1b) 04308-028 v out 50 ? 50 ? 50 ? v s network analyzer s2a s2b d1 d2 nc nc s1a s1b channel-to-channel crosstalk = 20 log v out vs f i gure 28. channe l-to - c hann el crosstalk (s 1aCs2a)
adg836 rev. a | page 13 of 16 outline dimensions 0.23 0.08 0.80 0.60 0.40 8 0 0.15 0.00 0.27 0.17 0.95 0.85 0.75 seating plane 1.10 max 10 6 5 1 0.50 bsc 3.00 bsc 3.00 bsc 4.90 bsc pin 1 coplanarity 0.10 compliant to jedec standards mo-187-ba f i gure 29. 1 0 -l ead m i ni s m al l o u tl ine p a ck ag e [msop ] (r m - 10) di me nsio ns sho w n i n mi ll im e t e r s * compliant t o jedec standards mo-220-veed-1 except for exposed pad dimension. 1 0.50 bsc 0.60 max pin 1 indicator 0.75 0.55 0.35 0.25 min 0.45 top view 12 max 0.80 max 0.65 typ pin 1 indicato r 1.00 0.85 0.80 0.30 0.23 0.18 0.05 max 0.02 nom 0.20 ref * 1.45 1.30 sq 1.15 12 4 10 6 7 9 3 2.75 bsc sq 3.00 bsc sq 2 5 8 11 coplanarity 0.08 exposed pad (bottom view) seating plane f i gure 30. 1 2 -l ead l e ad f r a m e ch ip s c a l e p a ck ag e [lfcs p _vq] 3 x 3 m m body , v e r y thin q u ad (c p - 1 2 - 1 ) di me nsio ns sho w n i n mi ll im e t e r s ordering guide model temperature r a nge package descri ption package option branding 1 adg836yrm C40c to +125c mini sma ll outli n e package (msop) rm-10 s9a adg836yrm-re el C40c to +125c mini sm all outli n e package (msop) rm-10 s9a adg836yrm-re el7 C40c to +125c mini small outli n e package (msop) rm-10 s9a adg836yrmz 2 C40c to +125c mini small outli n e package (msop) rm-10 s05 adg836yrmz-reel 2 C40c to +125c mini small outli n e package (msop) rm-10 s05 adg836yrmz-r eel7 2 C40c to +125c mini small outli n e package (msop) rm-10 s05 adg836ycp-re el C40c to +125c lead frame ch ip scale package (lfcsp_vq) cp-12-1 s9a adg836ycp-re el7 C40c to +125c lead frame chip scale package (lfcsp_vq) cp-12-1 s9a 1 brand i ng on this p a ckage is l imited to three characters due to s p ace cons tra i nts . 2 z = pb-free part.
adg836 rev. a | page 14 of 16 notes
adg836 rev. a | page 15 of 16 notes
adg836 rev. a | page 16 of 16 notes ? 2005 analo g de vices, inc. all rights reserve d . tra d em arks and registered tra d ema r ks are the prop erty of their respective owners . c04308-0-4/05(a)

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