10 single ended ac 24.0 2.0 33.0 3.40 c/w 36 1.0 7.50 1.0 55 0.60 3.00 5.0 50 0.10 36 parameter symbol min typ max units test conditions common source power gain drain efficiency total device dissipation junction to case thermal resistance maximum junction temperature storage temperature dc drain current drain to source voltage gate to source voltage -65 c to 150 c c a v load mismatch tolerance vswr drain to gate voltage relative 0.40 0.10 ids = ma, vgs = 0v v, vgs = 0v ciss crss coss vds = idq = a, vds = v, f = 0.40 bvdss idss drain breakdown voltage v ma pf pf pf common source output capacitance common source feedback capacitance idq = idq = 0.40 500 vgs = 20v, ids = rdson saturation resistance forward transconductance gm vds = 10v, vgs = 5v polyfet rf devices 1110 avenida acaso, camarillo, ca 93012 tel:(805) 484-4210 fax: (805) 484-3393 email:sell@polyfet.com url:www.polyfet.com 500 500 common source input capacitance 36 v igss vgs idsat zero bias drain current gate leakage current gate bias for drain current saturation current 25 ua v mho ohm amp parameter symbol min typ max units test conditions electrical characteristics ( each side ) rf characteristics ( 8.0 absolute maximum ratings ( t = gps 12.5 a, vds = v, f = a, vds = v, f = 12.5 12.5 watts v 1 mhz mhz mhz watts package style 8.0 vds = 0v vgs = 30v vgs = 20v, vds = 10v high efficiency, linear high gain, low noise general description 12.5 vds = a, vgs = vds ids = a db % o o o o o silicon vdmos and ldmos transistors designed specifically for broadband rf applications. suitable for military radios, cellular and paging amplifier base stations, broadcast fm/am, mri, laser driver and others. "polyfet" process features low feedback and output capacitances, resulting in high f transistors with high input impedance and high efficiency. tm t silicon gate enhancement mode rf power transistor ldmos vgs = 0v, f = 1 mhz 12.5 vds = vgs = 0v, f = 1 mhz 12.5 vds = vgs = 0v, f = 1 mhz 12.5 revision 10/01/2007 20 25 c ) watts output ) 200 polyfet rf devices lc821 10:1 rohs compliant
lc821 f=500mhz, vds=12.5vdc, idq=.4a 0 1 2 3 4 5 6 7 8 9 10 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 pin in w atts 9 10 11 12 13 14 pout gain efficiency = 60% polyfet rf devices pout vs pin graph capacitance vs voltage id & gm vs vgs iv curve zin zout package dimensions in inches lc821 l2c 1 die i v 0 1 2 3 4 5 6 7 8 9 02468101214161820 vds in volts id in amps vg=2v vg=4v vg=6v vg=8v vg=10v vg=12v 1110 avenida acaso, camarillo, ca 93012 tel:(805) 484-4210 fax: (805) 484-3393 email:sell@polyfet.com url:www.polyfet.com revision 10/01/2007 tolerance .xx +/-0.01 .xxx +/-.005 inches
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