1/10 AN1729 application note june 2003 qr zvs flyback topology in figure 1 a typical flyback topology is illustrated. c d is the total capacitance of the drain node. it is the sum of the mosfet' s c oss, transformer intrawinding capacitance, stray capacitance due to the layout of the circuit as well as other contributions reflected from the secondary side. figure 1. flyback topology llk lm ls lp cin rp vin vout cd v ds d03in1462 by: r.d. stracquadaini, c. leonardi l6565-based low cost smps for tv with less then 1w standby consumption the need for energy consumption reduction brings to the design of more and more efficient power sup- plies. high efficiency is required not only when the system supplied is fully operating but also when it is in standby condition and absorbs very little power. a common design target for many home appliances is that their power consumption in standby mode be less than 1w. in this paper a cost-effective solution for the power supply of a 60w 14" tv, with a standby power con- sumption of less then 1w is presented. the topology used for this switch mode power supply is a quasi-resonant flyback converter (see an1326) in order to reduce the switching losses (zvs at turn-on) and then to increase efficiency. in or- der to increase the performance in standby condition the start up network was designed with particular care and the 2 nd level of overcurrent protection of the l6565 qr controller is used to obtain an enhanced burst mode operation of the power supply when the system is in standby condition. the power mos stp7nk80 (bv dss = 800v, r dson = 1.5 w ) is used as the power switch.
AN1729 application note 2/10 the power mos is turned off when the drain current reaches a threshold that is fixed by the controller depending on the input and the output voltages. as the secondary winding has run dry of energy, the secondary rectifier no longer conducts and the power mos is still off, the tank circuit, made up l p and c d , resonates. it is an rlc circuit (considering the sum of dissipative effects concentrated in a equivalent resistor r p ) and the drain voltage follows the natural evolution of such circuit starting from the condition of c d charged at v dss at t = 0 (see waveforms in figure 2). r p is normally by far less than the critical damping impedance of the tank circuit. at the point where the drain voltage has a valley (a minimum) we can turn on the power mos and we can have a zero voltage turn on (if v in v r ) or a turn on where v d is as close as possible to zero compared with a square wave flyback (see figure 2). this is quasi-resonant (qr) operation. figure 2. typical waveforms of qr operation the main advantages of this kind of control technique are: 1) at turn-on of the power mosfet the energy stored in the capacitor c d is dissipated into the power mosfet itself. being the energy stored in c d proportional to v 2 d , turning on the mosfet when v d is minimum means minimizing this kind of losses. 2) probably the main benefit concerns the conducted emi emission. in mains-operated applications, due to the ripple appearing across the input bulk capacitor, the switching frequency is modulated at twice the mains frequency, with a depth depending on the ripple amplitude. this causes the spectrum to be spread over fre- quency bands, rather than to be concentrated on single frequency values. especially when measuring con- ducted emissions, with the average detection method, the level reduction can be of several db m v. 3) another important benefit is a high safety degree under short circuit conditions: since the conduction cycles of the mosfet are inhibited until the transformer is fully demagnetised, flux run away and, therefore, trans- former saturation are not possible. moreover, as during a short circuit the demagnetisation voltage is very low, the system will be led to work at very low fr equency, with a very small duty cycle. as a result, the power that the converter will be able to carry is very low. 4) finally, the way the system processes power does not change, thus designer's experience with standard flyback can be fully exploited and there is very little additional know-how needed. v r l lk & c d v ds v dss v in i p i pks i pkp p ri t on t fw t = 1/f sw t v sec l p & c d v ds @ v in2 >v in i s @ v in2 >v in i p @ v in2 >v in v in2 zvs t no zvs! d03in1463
3/10 AN1729 application note for further information concerning a qr flyback converter based on controller l6565 you can refer to the ap- plication note an1326 and to the datasheet of the controller. standby consumption issues when the tv set is in standby we need to supply the micro controller, the led and the ir receiver for the remote control. this supply voltage can be obtained through a linear voltage regulator from one of the low voltage out- puts of the converter. under such conditions the load is very light also because we have to consider that the micro controller is in low consumption working mode. most of power consumption in a lightly loaded switching converter is due to the switching losses, thus the lower the switching frequency the lower the losses. in most of the modern power supply circuits, when the converter is very lightly loaded, a low frequency working mode is often used. the switching frequency cannot be too low to avoid audible noise. in order to further lower switching frequency the converter can be operated in a "burst" mode, where there are short periods of time where the mos switches at the normal operation switching frequen- cy spaced out by long periods of time where the mos does not switch; in this way the average switching fre- quency can be very low and switching losses can be minimized. burst-mode operation in a normal converter realized using the l6565 controller, when the load is very light, a burst-mode operation automatically takes place thanks to the "frequency foldback function" (see app. note an1326 and the datasheet of the l6565 controller for details). it is important to notice that with this kind of burst- mode operation the control loop is still active and the output voltages are st ill r egulated. in a tv power supply, when the system is in standby mode, generally we do not need to have all the output voltages regulated, we need only to guarantee a minimum voltage at the input of the linear voltage regulator that supplies the micro controller. moreover, the loss reduction offered by the natural burst-mode described be- fore is not enough to meet the "less than 1 watt" target in this application. with a simple and low-cost additional circuitry it is possible to have an enhanced burst-mode operation that decreases the average switching frequen- cy to a very low value, hence considerably reducing the total losses in the converter. in that case the regulation loop is skipped but the required minimum voltage at the input of the linear voltage regulator can be guaranteed. description of the tv set power supply circuit the complete schematic of the realized circuit is shown in figure 3. it is a two output switch mode power supply with a third output for the micro controller, obtained through a voltage regulator (le50c), from the secondary output (v out2 =14v). the electrical specification is listed in table 1: table 1. input voltage range 88 to 264 vac mains frequency 50-60 hz maximum output power 60 w output voltages vout1 = 114v; pout1 = 55 w vout2 = 14v; pout2 = 4.2 w output of the voltage regulator vout 3 =5v; iout wup = 70ma; iout stand-by =10ma minimum switching frequency 70 khz target efficiency h > 80% maximum standby consumption (@ 220 vac) < 1w
AN1729 application note 4/10 figure 3. complete schematic of the 60w smps for 14" tv ac_main- zero_current_detect vcomp_pin voltage_feed_forward_pin gate_driver filtred_ac+ current_sense_pin vcc auxiliar_output ac_main+ filtred_ac- br in + drain source high_voltage_bus 114v 50w 14v 4.2w r4 10 d2 1n4148 cx1 100nf 450v cx2 100nf 450v l1 27mh 1 4 2 3 c4a 22uf 25v r5 47k d9 1n4148 cy1 1nf 400v q2 stp7nc80z 1 2 3 cy2 1nf 400v q3 bc547 1 2 3 c1 150uf 450v r10b 0.8 1/2w r9 680 2 dz2 bz x79 c10 t3 trasformer 1 7 6 3 9 14 11 8 r3 220k 1w d1 stth1l06 r26 3.3k r25 5.6k c16 0. 56uf c3 47nf 450v rh3 10 k r17 82k c4 100uf 160v d4 stth1l06 r14 56 c7 220 pf 630v q5 stq1nc60 1 2 3 d8 diode r15 82k 1/2w r16 820 r8 15 d3 1n4148 r7 100 r10a 0.8 1/2w ntc1 22r c17 2.2nf 2kv c9 4700uf 25v d5 stth102 ic1 l6565 1 2 3 6 8 5 7 4 inv comp vff gnd vcc zcd gd cs u1 le05/to92 1 3 2 out in ground sw1 1 2 iso1 pc817 1 2 4 3 f1 fuse r1b 2.2m r1a 2.2m c8 4.7u c2 1nf r2 22k d10 1n4148 d11 15v 1 2 -+ br1 stbr406 3 4 2 1 q6 bc547 1 2 3 r11 10k j8 con4 1 2 3 4 r23 22k c4b 100nf (220 nf) rh1 4.7m r21 220 ic3 tl431 2 1 3 rh2 4.7m r19 270 r20 2.2k d7 1n4148 trim117 20k r24 100k dz 3 bzx79c7v5 1 2 r18 220k c14 3.3 nf c13 180pf r22 180 instead of the sw the microcontroller control the stand-byfunction sw1 close - normal mode sw1 open - stand-by mode 14v 4.2 grou n 114v 5 5 5v 350 m ac_main- zero_current_detect vcomp_pin voltage_feed_forward_pin gate_driver filtred_ac+ current_sense_pin vcc auxiliar_output ac_main+ filtred_ac- br in + drain source high_voltage_bus 114v 50w 14v 4.2w r4 10 d2 1n4148 cx1 100nf 450v cx2 100nf 450v l1 27mh 1 4 2 3 c4a 22uf 25v r5 47k d9 1n4148 cy1 1nf 400v q2 stp7nc80z 1 2 3 ac_main- zero_current_detect vcomp_pin voltage_feed_forward_pin gate_driver filtred_ac+ current_sense_pin vcc auxiliar_output ac_main+ filtred_ac- br in + drain source high_voltage_bus 114v 50w 14v 4.2w r4 10 d2 1n4148 cx1 100nf 450v cx2 100nf 450v l1 27mh 1 4 2 3 c4a 22uf 25v r5 47k d9 1n4148 cy1 1nf 400v q2 stp7nc80z 1 2 3 cy2 1nf 400v q3 bc547 1 2 3 c1 150uf 450v r10b 0.8 1/2w r9 680 2 dz2 bz x79 c10 t3 trasformer 1 7 6 3 9 14 11 8 r3 220k 1w d1 stth1l06 r26 3.3k r25 5.6k c16 0. 56uf c3 47nf 450v rh3 10 k r17 82k cy2 1nf 400v q3 bc547 1 2 3 c1 150uf 450v r10b 0.8 1/2w r9 680 2 dz2 bz x79 c10 t3 trasformer 1 7 6 3 9 14 11 8 r3 220k 1w d1 stth1l06 r26 3.3k r25 5.6k c16 0. 56uf c3 47nf 450v rh3 10 k r17 82k c4 100uf 160v d4 stth1l06 r14 56 c7 220 pf 630v q5 stq1nc60 1 2 3 d8 diode r15 82k 1/2w r16 820 r8 15 d3 1n4148 r7 100 r10a 0.8 1/2w ntc1 22r c17 2.2nf 2kv c9 4700uf 25v d5 stth102 ic1 l6565 1 2 3 6 8 5 7 4 inv comp vff gnd vcc zcd gd cs u1 le05/to92 1 3 2 out in ground sw1 1 2 c4 100uf 160v d4 stth1l06 r14 56 c7 220 pf 630v q5 stq1nc60 1 2 3 d8 diode r15 82k 1/2w r16 820 r8 15 d3 1n4148 r7 100 r10a 0.8 1/2w ntc1 22r c17 2.2nf 2kv c9 4700uf 25v d5 stth102 ic1 l6565 1 2 3 6 8 5 7 4 inv comp vff gnd vcc zcd gd cs u1 le05/to92 1 3 2 out in ground sw1 1 2 iso1 pc817 1 2 4 3 f1 fuse r1b 2.2m r1a 2.2m c8 4.7u c2 1nf r2 22k d10 1n4148 d11 15v 1 2 -+ br1 stbr406 3 4 2 1 q6 bc547 1 2 3 r11 10k j8 con4 1 2 3 4 r23 22k c4b 100nf (220 nf) rh1 4.7m r21 iso1 pc817 1 2 4 3 f1 fuse r1b 2.2m r1a 2.2m c8 4.7u c2 1nf r2 22k d10 1n4148 d11 15v 1 2 -+ br1 stbr406 3 4 2 1 q6 bc547 1 2 3 r11 10k j8 con4 1 2 3 4 r23 22k c4b 100nf (220 nf) rh1 4.7m r21 220 ic3 tl431 2 1 3 rh2 4.7m r19 270 r20 2.2k d7 1n4148 trim117 20k r24 100k dz 3 bzx79c7v5 1 2 r18 220k c14 3.3 nf c13 180pf r22 180 220 ic3 tl431 2 1 3 rh2 4.7m r19 270 r20 2.2k d7 1n4148 trim117 20k r24 100k dz 3 bzx79c7v5 1 2 r18 220k c14 3.3 nf c13 180pf r22 180 instead of the sw the microcontroller control the stand-byfunction sw1 close - normal mode sw1 open - stand-by mode 14v 4.2 grou n 114v 5 5 5v 350 m
5/10 AN1729 application note enhanced burst-mode operation the start-up circuit plays an important role and it is important to look at its schematic redrawn in fig. 4. the circuit is basically a current generator including a high-voltage mos (q5) that can be disabled through the switch q6 driven by the output of the error amplifier of the l6565 (comp). note that the inverting input of the error amplifier (inv) is connected to ground, while the non-inverting one is internally connected to a voltage ref- erence of 2.5v. when the l6565 is on, the voltage on pin comp (v comp ) is high (always > 2.5v) and, when the controller is off, comp is floating. during the start-up phase the high voltage mos is on and the current that charges the capacitor c4 on the v cc pin flows through it. as soon as the l6565 is turned on, v comp goes high, which turns on q6 and, consequently, turns off q5. thus, the current flowing in the start up network during normal operation is only that through the two resistors rh1 and rh2 (4.7m w each), therefore a really low power is dissipated (10 mw @ 220 vac). as previously said, the start-up circuit is arranged as a constant current generator, with the advantage of having a start-up time of the converter independent of the mains voltage. the analytic expression of the current deliv- ered by the generator is: (eq.1) v z is the breakdown voltage of the zener diode dz1, v drop is the voltage drop across d10 and v th is the con- duction threshold gate-source voltage of the mos q5 (stq1nc60). figure 4. start up circuit in the circuit shown in the schematic of figure 3, the l6565 internal e/a is not used in the feedback loop. during the normal operation of the converter his output (v comp ) is always at his maximum value of 5.8v. the feedback loop is closed summing the feedback signal to the current sense signal through a resistor (r9 in the schematic) between the current sense resistor and the current sense pin of the l6565. this arrangement allows realizing the enhanced burst-mode operation during standby through the circuit whose schematic is redrawn in figure 5. if a large current is forced to flow in the resistance r9, the voltage on the current sense pin will exceed the sec- ond overcurrent protection threshold and this w ill disable the gate driver. to re- enable the driver, first the ic must be turned off, that is the v cc voltage must fall below the uvlo threshold. i st up C v z v drop v th C + rh3 ------------------------------------------- = mains bulk capacitor rh1 rh2 rh3 c 4 l6565 pin2 v comp pin8 v cc pin1 inv q5 stq1nc60 q6 bc547 dz1 d10 1n4148 r24 100k r24 22k
AN1729 application note 6/10 when the micro controller of the tv gives the standby command, the switch sw1 is open and the 14v output turns on the small signal bipolar transistor q3. as a result, a big current (as compared to the current that flows during normal operation) is forced to flow in the led of the opto-coupler and thereby in both the phototransistor and r9. as explained before, this big current will disable the gate driver of the l6565. when the gate driver is disabled the quiescent current is unchanged and, since no energy is coming from the self-supply circuit, the v cc capacitor (c4) will be discharged below the uvlo threshold after some time. then the start-up generator w ill be enabled and a new start-up cycle will begin. the resulting behaviour w ill be a low frequency intermittent operation that we w ill refer to as " enhanced burst-mode operation". with such operation the regulation loop used in normal operation of the converter is skipped; another kind of regulation takes place. the secondary output of the converter starts to rise until it reaches a threshold v omax fixed by the zener diode dz3 as v dz3 +v be +v d where v be is the base emitter voltage of the small signal transistor q3 (bc547) and vd is the voltage drop of the diode d8 (1n4148) (we can neglect the voltage drop on resistor r21). at this point the gate driver of the controller is disabled and switching is stopped. the length of this idle period is fixed by the discharge time of the capacitor c4 as above explained. during this idle period the output voltages will go down and the minimum values that they reach depends on their individual load. in order to obtain some design equations we can divide the burst-mode period in three time intervals: C phase 1. from the moment when the l6565 controller has been just turned off and the start-up circuit starts to re-charge the v cc capacitor c4, to the moment when the controller is turned on, that is the v cc voltage exceeds the turn-on threshold. C phase 2. from when the l6565 is turned on until the transistor q3 is turned on and the l6565 stops. C phase 3. from when the l6565 stops to when the v cc voltage goes down under the low uvlo threshold and the l6565 is turned off. our purpose is to obtain simple equations, so some approximations will be introduced. an optimisation can be done, looking at the measurement results, in order to have as good performance as possible. C phase 1. after the v cc voltage has fallen below the uvlo off threshold, the start-up cycle begins. the high voltage low current mos q5 is on and the capacitor c4 is charged through it and the resistor rh3. the starting value of the voltage on c4 is the uvlo off threshold. the voltage value on c4 when the l6565 is turned on is the turn-on threshold. their difference is the hysteresis v cchys . considering the equation 1 that gives the charging current of the capacitor c4 the charging time of c4 (t ch-c4 ) is the following: (eq. 2) C phase 2. when the l6565 is turned on the voltage on the secondary output is v omin , the mosfet starts switching and the output voltages rise. as soon vout2 reaches the threshold v dz3 + v be + v d the bjt q3 will be turned on and the gate driver of the l6565 disabled. the duration of this switching phase is typically much shorter than the others and will be neglected. C phase 3. the converter is stopped until the v cc voltage falls under the uvlo off threshold. let's call i q the quiescent current of the l6565; the time for discharging the c4 capacitor is: t ch c4 C v th on C v th off C C () c4 i st up C -------------------------------------------------------------- vcc hys rh3 c4 v z v drop v th C + ------------------------------------------------- - ==
7/10 AN1729 application note (eq. 3) summarizing, the total period of the enhanced burst-mode cycle will be: (eq. 4) figure 5. stand by circuit how to set the timing of the enhanced burst-mode operation. to have a well working circuit a minimum input voltage on the linear voltage regulator (v omin ) has to be guar- anteed considering its dropout specification. we can summarize the power absorbed by the load (in this case the micro controller, the led, the receiver for the remote control of the tv and, of course, the power consump- tion of the voltage regulator) with a constant current source because of the linear voltage regulator. the consumption of the micro controller that has to be considered in the design is that featured between the turn-on instant and the complete exit of the system from the standby condition. this is due to the fact that if the tv is turned on at the beginning of the idle phase of the burst period, the dis- charge of the output capacitor w ill be faster because the micro is on and absorbs more current. we have to guar- antee the correct voltage on the voltage regulator with the micro in on state until the complete restart of the converter. let us call i stb the total output current absorbed during the stand by condition and i wup (wake up current) the total output current at the turn on of the micro. most of the power in standby condition will be dissipated by the start up network and can be written as: (eq. 5) t disch c4 C vcc hys c4 i q -------------------------------- = t ch c4 C t disch c4 C vcc hys c 4 i q ------------------------------- - vcc hys rh3 c4 v z v drop v th C + ------------------------------------------------- - + = + tl1431 bzx79c10 r22 r19 r11 le50c c 9 equivalent load d5 stth102 dz3 bzx79c7v5 secondary output r21 m c r.c. r9 r10a//r10b (rsense) q3 d8 r26 compensation network stand by circuit pd st up C c4 vcc hys v in t burst --------------------------------------------- =
AN1729 application note 8/10 being v in the dc voltage on the input bulk capacitor. switching losses, the power dissipated on the output rectifier diode, and the power dissipated in the input stage are not easy to be evaluated analytically but they are anyway almost independent from the burst period and considerably lower than pd stup . another quantity that can be evaluated is the power absorbed by the load: (eq. 6) v omin-stb in the valley voltage at the input of the linear regulator while this is absorbing i stb and it is therefore greater than v omin , which corresponds to i wup consumption. we can use the previous equations in order to have a minimum possible value of t burst and, as a rule of thumb, we can assume that the power consumption calculated (p dstb + p load) is 70% of the total power consumption in standby. hence, considering the 1w con- sumption target, we have: (eq. 7) from equation 5 we see that increasing t burst the power consumption in standby can be made as low as de- sired, however there is a maximum limit to t burst . considering that a minimum voltage on the input of the voltage regulator has to be guaranteed, t burst is related to the maximum voltage that we have at the input of the voltage regulator v omax (fixed by the zener diode dz3) and at the value of the output capacitor c9, according to the following equation: (eq. 8) v omax in any case has to be lower then the output voltage of the converter during the normal operation; if it were not, the normal control loop would be activated and the behaviour of the converter would be different from what is required. fixing a low value for v omax means decreasing the power consumption of the voltage regulator but, as it can be seen, it is not a big part of the total power consumption. at this point the value of t burst and then the values of c9 and v omax is a trade-off between lowering the standby consumption and a not too big output ca- pacitor. once fixed all the component values, the v omin-stb can be calculated as: (eq. 9) standby calculations in the experimental board in the board assembled for testing the standby function the zener diode dz3 has a zener voltage of 7.5v. it means that the v omax value is about 7.5v+0.6v+0.6v=8.7v. the output capacitor (c9) value is: 4700 m f so from eq. 8 the maximum t burst value has to be: where the tolerance of the electrolytic capacitor c9 (-20%) and the maximum quiescent current id of the linear voltage regulator has been considered. the maximum discharge time of the capacitor c4 can be calculated as: p load v omax v omin stb C + () i stb 2 ----------------------------------------------------------------------- - = t burst c4 vcc hys v hv 700mw p load C ----------------------------------------------- - 3 v omax v omin t burst i wup c9 -------------------------------- - + = v ominstb v omax t burst i stb c9 ----------------------------- C = t burstmax v omax v omin C () c9 0.8 () i wup i d + ---------------------------------------------------------------------------- 8.7v 5.5v C () 70ma 3ma + ------------------------------------ 3760 m f164ms = == t disch c4 C max C vcc hys c4 1.2 i qmin --------------------------------------------- 4.3 26.4 m f 1.6ma -------------------------------- 71ms ===
9/10 AN1729 application note the value of the capacitor c4 has been multiplied by 1.2 to account for its tolerance, the value of the quiescent current is the minimum from the datasheet of the controller and also the maximum hysteresis of the on/off v cc thresholds has been considered. the charge time of the capacitor c4 has to be less then t burstmax -t disch-c4-max . following the previous consid- erations and using eq. 2, a minimum i st-up , of 1.2 ma is needed. as a result, the values of 10k w , for the resis- tance rh3, and 15v, for the zener voltage of the zener diode dz1, were chosen. experimental results in this section the results of experimental tests on a board manufactured according to the schematic in figure 3 are reported. in table 2 the measured standby consumption at different values of the input voltage are shown: table 2. standby input power measurements fig. 6 shows the measured waveforms of the output voltages and of the voltage at the v cc pin. channel 1 is the output of the voltage regulator and its value is constant (~5v). channel 2 is the input of the voltage regulator and here we can see that during the idle phase the voltage decreases linearly (the output ca- pacitor is discharged with a constant current i stb ), during the switching phase (note, it is actually very short) this output voltage rises up from v ominstb (ch2min = 7.48v) to v omax (ch2max = 8.68v). figure 6. standby waveforms: steady state with 10 ma load current channel 3 shows the voltage on v cc pin of the controller l6565. as soon as this voltage reaches the uvlo on- threshold the system starts switching but, as soon as the voltage regulator input voltage reaches a value such that the small signal bipolar q3 is turned on, the gate driver of the l6565 is disabled, the switching is stopped and the v cc voltage decreases until the uvlo off-threshold. at this point the start-up network is on again and v in 88vac 110vac 220vac 264vac p in-stand-by 320mw 390mw 682mw 835mw
information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsibility for the co nsequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specifications mentioned in this publicati on are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectronics prod ucts are not authorized for use as critical components in life support devices or systems without express written approval of stmicroelectro nics. the st logo is a registered trademark of stmicroelectronics ? 2003 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - brazil - canada - china - finland - france - germany - hong kong - india - israel - italy - japan -malaysia - malta - morocco - singapore - spain - sweden - switzerland - united kingdom - united states. http://www.st.com 10/10 AN1729 application note the voltage on v cc pin starts rising. in fig. 7 the measured waveforms with 70ma load are shown. 70ma load is used to simulate the wake-up of the micro controller. as can be seen, the voltage regulator input voltage (ch2) minimum value (v omin ) is 5.52v, something more then the minimum voltage input for the le50c voltage regulator. figure 7. standby waveforms: steady state with 70ma load current conclusions a low-cost solution for implementing an enhanced burst-mode operation, externally activated, that guarantees a very low consumption in standby condition was proposed. it is based on a different but very simple strategy of control that does not affect the behaviour of the circuit in normal operation. an analytic method to design the standby circuit and estimate the power consumption of the converter in such condition was explained. references [1] "l6565 quasi-resonant controller" (an1326) [2] l6565 datasheets
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