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january 2010 doc id 16021 rev 2 1/14 AN3008 application note stod2540, single inductor dc-dc converter generates multiple supply vo ltages for e-paper display introduction this application note describes how to use the stod2540 dc-dc converter to generate two output voltages using a single inductor and an external charge pump. the circuit shown in figure 1 generates a 70 v output from a 3.7 v input voltage. the stod2540 is a highly integrated boost converter that can provide an adjustable output up to 35 v from a 3.0 to 5.5 v input voltage. the stod2540 operates in pfm (pulsed frequency modulation) mode. pfm control simply means that the part only switches when the charge needs to be delivered to the output in order to keep the output voltage regulated. the converter is ideal for generating the necessary voltages to supply thin-film transistor (tft) lcds, oleds and e-paper shelf labels. the low operating supply current makes the device ideal for small, portable, battery supplied applications. in shutdown mode the load is disconnected from the input and the quiescent current is less than 3 a. figure 1. high voltage power supply based on stod2540 cin: 4.7 f cout: 2 x 1 f 100 v c1: 100 nf 50 v c2: 4.7 f 50 v l1: 4.7 h d1, d2, d3: stps2l40af r3 550k cout cin c1 c2 d3 d2 r4 10k l1 d1 u1 stod2540 vin 1 rset 2 agnd 3 fb 4 vo 5 vcap 6 enable 7 sw 8 pgnd 9 cin: 4.7 f cout: 2 x 1 f 100 v c1: 100 nf 50 v c2: 4.7 f 50 v l1: 4.7 h d1, d2, d3: stps2l40af r3 550k cout cin c1 c2 d3 d2 r4 10k l1 d1 u1 stod2540 vin 1 rset 2 agnd 3 fb 4 vo 5 vcap 6 enable 7 sw 8 pgnd 9 www.st.com
contents AN3008 2/14 doc id 16021 rev 2 contents 1 high voltage power supply base d on stod2540 . . . . . . . . . . . . . . . . . . 3 1.1 stod2540 function description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.2 load disconnect . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.3 output adjust . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.4 inductor selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 1.5 c out selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 1.6 diode selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 1.7 single inductor circuit based on stod2540 derives 35 v / 70 v . . . . . . . . 5 2 test results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.1 start-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.2 output voltage ripple . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.3 efficiency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.4 line regulation 70 v / 35 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.5 load regulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 3 layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 3.1 input / output connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 4 application schematic and bill of materials . . . . . . . . . . . . . . . . . . . . . 12 5 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 AN3008 high voltage power supply based on stod2540 doc id 16021 rev 2 3/14 1 high voltage power supply based on stod2540 1.1 stod2540 function description the stod2540 uses a pfm control scheme to reach high efficiency in low load conditions. the dc-dc has a current mode control scheme that uses a minimum off time and a maximum on time. the converter monitors the output voltage through the resistor dividers r1 and r2 by comparing the feedback voltage with the internal reference voltage of 1.24 v. the integrated main power switch is turned on as soon as the feedback voltage falls below the internal reference. the switch stays on until the inductor current reaches the peak current limit or for a maximum on time equal to 5.5 sec. the peak current limit value is adjustable through an external resistor connected between the rset pin and gnd. the main switch stays off for at least a minimum off time (300 ns typical) and remains in the off state for as long as the feedback voltage remains above the internal reference voltage. during the on time, the load current is only supplied by the charge stored in the output capacitor until the feedback voltage drops below the reference voltage again. pfm regulation is particularly useful when output currents are low and the part is prevalently in the off state. 1.2 load disconnect when the device is in shutdown mode, a dc current path exists between the power source and the load. a high-side switch lds isolates the load from the source when the device is disabled. 1.3 output adjust choose the r4 value in the range of 10 to 200 k . the value of r3 can be calculated from the following equation. equation 1 where r u is the upper resistor of the voltage divider. r l is the lower resistor of the voltage divider. 1% tolerance resistors should be chosen for a more accurate v out . the stod2540 shows a pulses burst behavior that causes a high output voltage ripple. to decrease the output ripple it is possible to insert a capacitor across the upper feedback resistor. the following formula can be used to obtain a first estimation of the value of the capacitor. ? ? ? ? ? ? ? ? ? = 1 v v r r fb out l u high voltage power supply based on stod2540 AN3008 4/14 doc id 16021 rev 2 equation 2 where r u is the upper resistor of the voltage divider. f sw is the switching frequency. the following equation gives the switching frequency at the nominal load current. equation 3 the cf capacitor increases the amplitude of the voltage ripple on the fb pin, causing a deterioration of the line regulation; therefore, the value of cf should be as small as possible. 1.4 inductor selection since the hysteretic control scheme is inherent ly stable, the inductor value does not affect the stability of the regulator. using the pfm peak current control scheme, the converter operates in discontinuou s conduction mode (dcm). the inductance value must be calculated so as to ensure that the inductor curr ent reaches the current limit before the maximum on time expires. the following equation can be used to calculate the maximum value of the inductance. equation 4 where i pk is the controlled inductor peak current. in this case the maximum value of the load current is given by equation 5 . equation 5 1.5 c out selection the output voltage ripple very much depend s on the application conditions. the output capacitor has a significant effect on the output voltage ripple magnitude because it supplies the load current through the char ge stored during the on state. the output voltage ripple consists of two parts: the first is caused by the esr, the second by the charging and discharging process of the output capacitor. u sw r 20 f 2 1 cf = 2 pk in out load load sw i l ) v v ( i 2 ) i ( f ? = max _ on pk min _ in t i v l ? ? ? ? ? ? ? ? + ? + = min in pk in out 2 pk max _ load toff v l i ) v vd v ( 2 l i i AN3008 high voltage power supply based on stod2540 doc id 16021 rev 2 5/14 the output ripple can be approximately given by the following equation. equation 6 the magnitude of the ripple will typically be linearly proportio nal to the outp ut capacitance present. for the best output voltage filterin g, a low esr output capacitor is recommended. 1.6 diode selection the output diode in a boost converter conducts current only when the power switch is off. the average current is equal to the output current and the maximum current is equal to the peak inductor current. to maximize efficiency, we recommend using a schottky diode characterized by: 1. a small forward voltage drop. 2. a rated current larger than the peak inductor current. 3. a reverse voltage larger than the output voltage. 4. a small reverse leakage current. 1.7 single inductor circuit ba sed on stod2540 derives 35 v/70 v the circuit shown in figure 2 is capable of deriving +35 / +70 v from a [3; 5.5] input voltage range. the stod2540 dc-dc converter generates the 35 v output voltage. the addition of an external charge pump consisting of two schottky diodes (d2 and d3) and two capacitors (c1 and c2) allows delivering output voltages of over 70 v. in steady-state operation, the voltage on c2 is 35 v and the voltage on c out is 70 v. during the on time the main switch is closed and th e current flows from the input to ground through l1 and the internal switch. during this time, t he voltage at node sw is 0 v and c1 is charged up to 35 v. in these conditions, d1 is revers e-biased, d2 is forward-biased, d3 is reverse- biased and the load current is supplied only by the output capacitor c out . ? ? ? ? ? ? ? ? ? + ? = in d out pk sw out out out v v v l i f 1 c i v figure 2. external charge pump - t on state 70 v cout cin c1 c2 d3 d2 l1 d1 35 v sw = 0 v + 35 v + 70 v cout cin c1 c2 d3 d2 l1 d1 35 v sw = 0 v + 35 v + high voltage power supply based on stod2540 AN3008 6/14 doc id 16021 rev 2 when the power switch is opened, d1 is forward-biased and current flows through l1 and d1 into c2. therefore, the voltage at node sw is equal to the voltage on c2 (35 v). c1, which was previously charged to 35 v, is now referenced to node 35 v. the voltage across c1 remains at 35 v, but the left side is 35 v with respect to ground and the right side is 70 v with respect to ground. d3 becomes forward-biased and c out is charged to 70 v. d2 is reverse-biased during this time period. the output is regulated to 70 v through the feedback divider that goes back to the fb pin of the stod2540. an unregulated output voltage of 35 v is available from the c2 output capacitor in this configuration. since the 35 v ou tput voltage is not regulated, it is not stable like the 70 v output voltage and varies with the current drawn from the 70 v. if desired, the feedback can be recalculated for a 35 v output. this provides a regulated 35 v output and an unregulated 70 v output. d1, d2 and d3 must be rated for at least half the higher output voltage. the peak current ratings for the diodes must be greater than half the peak switch current of the stod2540. c2 and c3 must have voltage ratings greater than half the output voltage, while c4 must be rated for the full output voltage. figure 3. external charge pump - t off state 70 v cout cin c1 c2 d3 d2 l1 d1 35 v sw = 35 v + 70 v 35 v + 70 v cout cin c1 c2 d3 d2 l1 d1 35 v sw = 35 v + 70 v 35 v + AN3008 test results doc id 16021 rev 2 7/14 2 test results 2.1 start-up figure 4 and figure 5 show the output voltage and inductor current waveforms of the evaluation module in th e following conditions. v in = 3.7 v v out = 73 v i load = 5 ma 2.2 output voltage ripple the traces in figure 6 and figure 7 show the output voltage ripple on a 70 v output with different input voltages and i load equal to 10 ma. figure 4. start-up/v out figure 5. start-up/inductor current figure 6. 70 v output voltage ripple vs. v in figure 7. 70 v output voltage ripple vs. i load v in = 5 v v in = 4.2 v v in = 3.7 v v in = 3.2 v v in = 5 v v in = 4.2 v v in = 3.7 v v in = 3.2 v no load 5 ma 10 ma no load 5 ma 10 ma test results AN3008 8/14 doc id 16021 rev 2 2.3 efficiency 2.4 line regulation 70 v / 35 v figure 8. output efficiency for the 70 v output 55% 60% 65% 70% 75% 80% 85% 02468101214161820 i load v in 3,7v v in 3v v in 4,2 v v in 3,2 v efficiency - % ma 55% 60% 65% 70% 75% 80% 85% 02468101214161820 i load v in 3,7v v in 3v v in 4,2 v v in 3,2 v efficiency - % ma figure 9. 70 v line regulation figure 10. 35 v line regulation load 1 ma 72.0 72.2 72.4 72.6 72.8 73.0 3.0 3.5 4.0 4.5 5.0 5.5 vin - v vout - v vout 70 v load 1 ma 72.0 72.2 72.4 72.6 72.8 73.0 3.0 3.5 4.0 4.5 5.0 5.5 vin - v vout - v vout 70 v load 1 ma on 70 v output 36.0 36.2 36.4 36.6 36.8 37.0 3.0 3.5 4.0 4.5 5.0 5.5 vin - v vout 35 v vout - v load 1 ma on 70 v output 36.0 36.2 36.4 36.6 36.8 37.0 3.0 3.5 4.0 4.5 5.0 5.5 vin - v vout 35 v vout - v AN3008 test results doc id 16021 rev 2 9/14 2.5 load regulation figure 13 shows the behavior of the 35 v output when the load current is drowned from 35 v and the fb pin is closed on 70 v. figure 11. 70 v output load regulation figure 12. 35 v output changes when load current is drowned from the 70 v 72.0 72.2 72.4 72.6 72.8 73.0 73.2 024681012141618 i load v out -v ma v in = 3.7 v 72.0 72.2 72.4 72.6 72.8 73.0 73.2 024681012141618 i load v out -v ma v in = 3.7 v 36.0 36.2 36.4 36.6 36.8 37.0 024681012141618 i load v out -v ma v in = 3.7 v 36.0 36.2 36.4 36.6 36.8 37.0 024681012141618 i load v out -v ma v in = 3.7 v figure 13. 35 v unregulated output 20 25 30 35 40 0 2 4 6 8 1012141618202224 i load vout - v ma v in = 3.7 v 20 25 30 35 40 0 2 4 6 8 1012141618202224 i load vout - v ma 20 25 30 35 40 0 2 4 6 8 1012141618202224 i load vout - v ma v in = 3.7 v layout AN3008 10/14 doc id 16021 rev 2 3 layout to minimize the occurrence of problems related to noise and duty cycle jitter, attention has been given to the routing of high-frequency curr ent loops. it is essential to keep the high switching current circulating paths as small as possible. in general the following rules should be applied. the gnd connections of the cout, cin capacitors and stod2540 pgnd should be placed as close as possible to each other. the connection from the ic pins (vin, sw) and the inductor must be kept short. cin should be placed close to the vin pin of the chip. the ground area should be as large as possible. if a two-layer pcb is used, one layer should be assigned as the ground layer and a good connectivity between both layers should be observed. figure 14. assembly layer figure 15. top layer AN3008 layout doc id 16021 rev 2 11/14 3.1 input / output connections figure 16. bottom layer table 1. input / output connections reference designator name description jp1 vin/gnd vin: positive connection to the input power supply. gnd: return connection to the input power supply. jp2 en use this connector to enable and disable the dc-dc converter. connect the en pin to gnd to disable the converter. if the en pin is left floating, the evm operates correctly. jp3 v out hv: high voltage ? 70 v. positive connection for the load. mv: medium voltage ? 35 v. positive connection for the load. gnd: return pin for the load. application schematic and bill of materials AN3008 12/14 doc id 16021 rev 2 4 application schematic and bill of materials figure 17. demonstration board schematic cout2 hv j3 out 1 2 3 gnd mv hv gnd gnd cout1 l1 j1 vin 1 2 d1 r2 cin c2 c1 u1 stod2540 v in 1 rset 2 agnd 3 fb 4 v o 5 v cap 6 enable 7 sw 8 pgnd 9 d3 j2 en 1 2 d2 r3 r4 r1 0 sw r5 mv cf cout2 hv j3 out 1 2 3 gnd mv hv gnd gnd cout1 l1 j1 vin 1 2 d1 r2 cin c2 c1 u1 stod2540 v in 1 rset 2 agnd 3 fb 4 v o 5 v cap 6 enable 7 sw 8 pgnd 9 d3 j2 en 1 2 d2 r3 r4 r1 0 sw r5 mv cf table 2. bill of materials quantity reference description part/value pcb footprint 1 u1 dc-dc converter stod2540pmr qfn8 3 x 3 mm 1 cin capacitor, ceramic, 4.7 f, 16 v, x5r 0805 1 c1 capacitor, ceramic, 100 nf, 50 v, x5r 0805 2 cout capacitor, ceramic, 1 f, 100 v, x5r grm31cr72a105ka01l 0805 1 cf capacitor, ceramic, 47 pf 0603 1 l1 inductor, 4.7 h lps3314-472mlc 3 d1, d2, d3 diode, schottky 2 a 30 v stps2l40af smaflat 1 r1 resistor, 1 k , 1/16 w, 1% 0603 1 r2 resistor, 1/16 w, 1% 0603 1 r3 resistor, 680 k , 1/16 w, 1% 0603 1 r4 resistor, 10 k , 1/16 w, 1% 0603 1 r5 potentiometer, 100 k 2 jp1, jp2 header, 2-pin, 100-mil spacing 1 jp3 header, 3-pin, 100-mil spacing AN3008 revision history doc id 16021 rev 2 13/14 5 revision history table 3. document revision history date revision changes 10-nov-2009 1 initial release. 08-jan-2010 2 modified: figure 14 on page 10 , figure 15 on page 10 , figure 16 on page 11 , figure 17 and table 2 on page 12 . AN3008 14/14 doc id 16021 rev 2 please read carefully: information in this document is provided solely in connection with st products. stmicroelectronics nv and its subsidiaries (?st ?) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described he rein at any time, without notice. all st products are sold pursuant to st?s terms and conditions of sale. purchasers are solely responsible for the choice, selection and use of the st products and services described herein, and st as sumes no liability whatsoever relating to the choice, selection or use of the st products and services described herein. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. i f any part of this document refers to any third party products or services it shall not be deemed a license grant by st for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoev er of such third party products or services or any intellectual property contained therein. unless otherwise set forth in st?s terms and conditions of sale st disclaims any express or implied warranty with respect to the use and/or sale of st products including without limitation implied warranties of merchantability, fitness for a parti cular purpose (and their equivalents under the laws of any jurisdiction), or infringement of any patent, copyright or other intellectual property right. unless expressly approved in writing by an authorized st representative, st products are not recommended, authorized or warranted for use in milita ry, air craft, space, life saving, or life sustaining applications, nor in products or systems where failure or malfunction may result in personal injury, death, or severe property or environmental damage. st products which are not specified as "automotive grade" may only be used in automotive applications at user?s own risk. resale of st products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by st for the st product or service described herein and shall not create or extend in any manner whatsoev er, any liability of st. st and the st logo are trademarks or registered trademarks of st in various countries. information in this document supersedes and replaces all information previously supplied. the st logo is a registered trademark of stmicroelectronics. all other names are the property of their respective owners. ? 2010 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - philippines - singapore - spain - sweden - switzerland - united kingdom - united states of america www.st.com |
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