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this is information on a product in full production. for further information contact your local stmicroelectronics sales office. september 2013 doc id 14095 rev 4 1/14 1 STA8058 teseo? high performance gps multichip module (mcm) data brief ? production data features gps multichip module: ? sta2058 teseo baseband ? sta5620 rf front-end complete embedded memory system: ? flash 256 kb + 16 kbytes ? ram 64 kbytes. 66-mhz arm7tdmi 32 bit processor high performance gps engine (hpgps) sbas (waas and egnos) supported sensitivity (-146 dbm acquisition, -159 dbm tracking) time to first fix (1 s reacquisition, 2.5 s hot start, 34 s warm start, 39 s cold start) accuracy (2 m autonomous) extensive gps receiver interfaces: 32 gpios, 4 uarts, 2 spis, 2 i2cs, 1 can 2.0, 1 usb 1.1, 1 hdlc and 4 channels adc compatible with l1 signal (c/a code) st proprietary technology ? cmos flash embebbed technology for sta2058 ? bicmos sige technology for sta5620 lfbga104 lead-free package -40 c to 85 c operating temperature range evaluation kits: ? STA8058 module reference designs (17x19 mm and 25x25 mm) ? evaluation board hosting STA8058 module description STA8058 teseo mcm is a fully embedded gps engine integrating sta2058 teseo baseband. and sta5620 rf front-end. the embedded flash memory enables the equipment manufacturer to load the entire gps software (including tracking, acquisition, navigation and data output) after customising its interfaces to his needs. a standard gps library is available from st. by combining the arm7tdmi microcontroller core with on-chip flash/ram, 16-channel gps correlator dsp, rf front-end and an extensive range of interfaces on single package solution, the STA8058 provides a highly-flexible and cost- effective solution for gps applications. lfbga104 (7x11x1.4 mm) table 1. device summary order code package packing automotive grade can STA8058 lfbga104 (7 x 11 x 1.4 mm) tray no no STA8058tr lfbga104 (7 x 11 x 1.4 mm) tape and reel no no STA8058a lfbga104 (7 x 11 x 1.4 mm) tray yes yes STA8058atr lfbga104 (7 x 11 x 1.4 mm) tape and reel yes yes www.st.com
contents STA8058 2/14 doc id 14095 rev 4 contents 1 features summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2.1 logic symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2.2 system block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.3 lfbga104 ball out . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.4 power supply pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 3 electrical characteristi cs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 4 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 5 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
STA8058 features summary doc id 14095 rev 4 3/14 1 features summary arm7tdmi 16/32 bit risc cpu based host mi crocontroller running at a frequency up to 66 mhz. complete embedded memory system: ? flash 256 kbytes + 16 kbytes (100 kb erasing/programming cycles) ? ram 64 kbytes. 16 channel high performance gps correlation dsp. st propietary technology: ? cmos flash embedded technology for baseband ? bicmos sige for radio front-end sbas (waas and egnos) supported. -40 c to 85 c operating temperature range. 104-pin lfbga104 package. power supply: ? 3.0 v to 3.6 v operating supply range for input/output periphery ? 3.0 v to 3.6 v operating supply range for a/d converter reference ? 1.8 v operating supply range for core supply provided by internal voltage regulator with external stabilization capacitor or by external supply voltage ? 2.4 v to 3 v operating supply range for rf front-end section reset and clock control unit able to provide low power modes (wait, slow, stop, standby) and to generate the internal clock from the external reference through integrated pll. 32 programmable general purpose i/o, each pin programmable independently as digital input or digital output; 30 are multiplexed with peripheral functions; 16 can generate an interrupt on input level/transition. real time clock module with 32 khz low powe r oscillator and separate power supply to continue running during stand-by mode. 16-bit watchdog timer with 8 bits presca ler for system reliability and integrity. one can module compliant with the can specific ation v2.0 part b (active) and bit rate can be programmed up to 1 mbaud. four 16-bit programmable timers with 7 bit prescaler, up to two input capture/output compare, one pulse counter function, one pwm channel with selectable frequency each. 4 channels 12-bit sigma-delta analog to digital converter, single channel or multi channel conversion modes, single-shot or continuous conversion modes, sample rate 1 khz, conversion range 0-2.5v . three serial communication interfaces (uart) allow full duplex, asynchronous, communications with external devices, independently programmable tx and rx baud rates up to 625k baud. one uart adapted to suit smart card interface needs, for asynchronous sc as defined by iso 7816-3. it includes sc clock generation. two serial peripheral interfaces (spi) allow full duplex, synchronous communications with external devices, master or slave operation, max baud rate of 5.5mb/s. one spi may be used as multimedia card interface.
features summary STA8058 4/14 doc id 14095 rev 4 tw o i 2 c interfaces provide multi-master and slave functions, support normal and fast i 2 c mode (400 khz), 7/10 bit addressing modes. one i 2 c interface is multiplexed with one spi, so either 2 x spi + 1 x i 2 c or 1 x spi + 2 x i 2 c may be used at a time. enhanced interrupt controller supports 32 interrupt vectors, independently maskable, with interrupt vector table for faster response and 16 priority levels, software programmable for each source. up to 2 maskable interrupts may be mapped on fiq. wake-up unit allows exiting from powerdown modes by detection of an event on two external pins (one is active high and other is active low) or on internal real time clock alarm. usb unit v1.1 compliant, software configurable endpoint setting, usb suspend/resume support high level data link controller (hdlc) unit supports full duplex operating mode, nrz, nrzi, fm0 and manchester modes, and internal 8-bit baud rate generator. rf front-end features: ? low if (4 mhz) architecture ? compatible with gps l1 signal ? vga gain internally regulated ? on chip programmable pll ? spi interface
STA8058 pin description doc id 14095 rev 4 5/14 2 pin description 2.1 logic symbol figure 1. STA8058 teseo mcm symbol avss ck spi (di,do,cs, clk) jtdi jtdo jtck jtms rstinn jtrstn rf_in booten v18bkp v18 [2] v33 [7] v27 [8] xtal (in,out,clk) avdd power clock & reset jtag port teseo gpsclk gpsdat pads vss [10] vssrf [11] rf pads sign gps_clk enable (chip,rf) mode if_test agc_cntr p0.[15:0] p1.[15:0] rtcxti rtcxto usbdp usbdn wakeup generai purpose i/o rtc usb pads & wkup pads nstdby_i mcm
pin description STA8058 6/14 doc id 14095 rev 4 2.2 system block diagram figure 2. STA8058 teseo baseband block diagram $0 $0 !& $0 !& )/ !& $0 !& !& !& !& $0 !& !& !& $0 !& !& !& !& !& $0 !& !2-4$-) #05 + &lash + 2!- 34# *4!' 62%' 2##5 0,, )nterrupt #ontr bit !$# 4)-%2 4)-%2 4)-%2 4)-%2 24# /3#),, 7akeup 7!4#( $/' &ully0rog )/0/243 !0' "2)$'% !0' "2)$'% !0' "2)$'% (0'03 ch correlator %marald$30 )# )# 30) 30) 5!24 5!24 5!24 5!24 ;53"= ;#!.= ($,# !2-.ative"53 !0""53 !0""53 /nlyfor34!!and34!!42 '!0'#&4
STA8058 pin description doc id 14095 rev 4 7/14 figure 3. sta5620 rf front-end spi interface cp cmos dri ver s 2 bi ts combi ne r rf a buffer x tal osc pfd / n ir mixer pol yphase filter if filt er gps_cl k / 48 0? 90? xtal_cl k rf_en a gc_ctrl rf_in mag sign / 2 / r spi_c s / spi_clk spi_di spi_d o mode si gn mag gp s_clk gc e xc e a d c x i x o test_en2 hc e lo48_clk gp s_clk sample_mode (1:0) lo96 variable xtal gc e & rfe enabl ed by rfe & sp eci fic enables reset gener at or reset if_tes t test_en1 test _clk s ign mag a gc if_out _en chip_en xt al_clk xt al_clk mag test lo gi c test_clk
pin description STA8058 8/14 doc id 14095 rev 4 figure 4. STA8058 teseo mcm block diagram 2&?). 3ign '03?$at #()0?%. 3!7&ilter !'#?#.42 2&?%. 6?2&;= ,.! *4$)*4#+*4-3*4234n*4$/ 34!4eseo-#- 34! 2&&ront %nd 34! "aseband 30)?$) 30)?$/ 30)?#,+ 3?-/3) 3?-)3/ 3?3#,+ '03?#,+ #+ 84!,?). -/$% )&?4%34 6?0,,;= 6332&;= 7ake?5p 24#84/ 24#84) 4imers;=!$#;= 4hetwodicemustbeinterconnectedeachotheratboardleve l 30);=)#;=5!243;= 0003 .234). 002. "//4"//4"//4%. .34$"9?). 6;= 6;= 633;= 6)/?0,, 6?2%'?"+0 !6$$ 6"+0 633;= !633 633?"+0 633?2%' 633)/?0,, 84!,?#,+ '03#,+ '0)/ '0)/ 6332&?!;= 6332&?)/ 4#8/ 6 3?33. 30)?#3 53";=#!.;= ($,#;= /nlyfor34!!and34!!42 ("1($'5
STA8058 pin description doc id 14095 rev 4 9/14 2.3 lfbga104 ball out 2.4 power supply pins table 2. ball out for lfbga104 package 1234 567 8910111213 a vss avss avdd v18bkp rtcxto rtcxti v33reg_bkp gpsdat njtrst rf_en xtal_out xtal_in vssrf b p1.2/ t3_ocmpa/ ain.2 vss18 v18 vssbkp nstdby_in v33 vssreg gpsclk gps_clk chip_en v27pll v27pll v27pll c p1.1/ t3_icapa/ ain.1 p1.0/ t3_ocmpb/ ain.0 p1.4/ t1_icapa p1.5/ t1_icapb nrstin po.15/ wakeup ck p0.5/ s1_mosi spi_di xtal_clk vssrf v27pll v27rf d v33io_pll p1.3/ t3_icapb/ ain.3 p1.7/ t1_ocmpa vss vss jtck jtdo p0.6/s1_sclk spi_clk mode vssrf vssrf vssrf_a e vssio_pll p1.8/pps p1.9/ prn.11 p1.6/ t1_ocmpb vss18 p0.13/ u2_rx/ t2.ocmpa jtms jtdi spi_cs if_test vssrf vssrf rf_in f p1.11/ canrx (1) usbdp p1.10/ usbclk p0.3/ so_ssn/ i1.sda v18 p0.14/ u2_tx/ t2.icapa v33 p0.4/ s1_miso spi_do agc_cntr vssrf vssrf vssrf_a g p1.12/ cantx (1) usbdn p0.1/ so_mosi/ u3.rx p0.0/ so_miso/ u3.tx p0.7/s1_ssn p0.9/ uo_tx/ boot.0 p0.11/ u1_tx/ boot.1 booten sign v27rf v27rf v27rf vssrf h vss p1.13/ hclk/ io.scl p1.14/ hrxd/ io.sda p1.15/ htxd p0.2/ so_sclk/ i1.scl po.12/ scclk po.8/ uo_rx/ u0.tx p0.10/ u1_rx/ u1.tx v33 vssrf:io v33 v27rf vssrf 1. only for STA8058a and STA8058atr. table 3. power supply pins symbol i/o function lfbga104 v 33 - digital supply voltage for i/o circuitry (3.3 volt) b6, f7, g10, h9, h11 v ss - digital ground for i/o circuitry a1, d4, d5, h1 v 33io-pll - digital supply voltage for i/o circuitry and for pll reference (3.3v) d1 v ssio-pll - digital ground for i/o circuitry and for pll reference e1 v 33reg_bkp - digital supply voltage for backup block i/o circuitry and for ballast i/o (3.3v) a7 v ssreg - digital ground for ballast i/o b7 v 18 - digital supply voltage for core circuitry (1.8 volt): when using the internal voltage regulator, this pin shall not be driven by an external voltage supply, but a capacitance of at least 10 ? f (tantalum, low series resistance) + 33nf (ceram ic) shall be connected between these pins and v ss18 to guarantee on-chip voltage stability. b3, f5 v ss18 - digital ground for core circuitry b2, e5 v 18bkp - digital supply voltage for backup block (rtc, oscillator, wake-up controller - 1.8 volt): when using t he internal voltage regulator, this pin shall not be driven by an external voltage supply, but a capacitance of at least 1 ? f shall be connected between this pin and v ssbkp to guarantee on-chip voltage stability. a4
pin description STA8058 10/14 doc id 14095 rev 4 note: v 33 and v 33io-pll are all internally connected. same for v ss and v ssio-pll . all v ss , v ss18 , v ssbkp , av ss ,v ssrf ,v ssrf_a and v ssrf_io pins must be tied together to the common ground plane, taking care of noise filtering, especially on av ss , v ssrf , v ssrf_a and v ssrf_io v ssbkp - digital ground for backup logic b4 av dd - analog supply voltage for the a/d converter a3 av ss - analog supply ground for the a/d converter a2 v 27rf - analog supply voltage for rf chain (2.7v) c13, g10, g11, g12, h12 v 27pll - analog supply voltage for pll embedded into rf part (2.7v) b11, b12, b13, c12 v ssrf - analog supply ground for rf core a13, c11, d11, d13, e11, e12, f11, f12, g13, h13 v ssrf_a - analog supply ground for rf amplifier d13, f13 v ssrf_io - analog supply ground for rf io circuirty h10 table 3. power supply pins (continued) symbol i/o function lfbga104
STA8058 electrical characteristics doc id 14095 rev 4 11/14 3 electrical characteristics see sta2058 (teseo baseband) and sta5620 (rf front-end) datasheet for related data.
package information STA8058 12/14 doc id 14095 rev 4 4 package information in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions and product status are available at: www.st.com . ecopack ? is an st trademark. figure 5. lfbga104 (11x7x1.4mm) mechanical data and package dimensions outline and mechanical data dim. mm inch min. typ. max. min. typ. max. a 1.400 0.0551 a1 0.210 0.0083 a2 0.990 0.0390 a3 0.200 0.0079 a4 0.800 0.0315 b 0.350 0.400 0.450 0.0138 0.0157 0.0177 d 10.900 11.000 11.100 0.4291 0.4331 0.4370 d1 9.600 0.3780 e 6.900 7.000 7.100 0.2717 0.2756 0.2795 e1 5.600 0.2205 e 0.800 0.0315 f 0.700 0.0276 ddd 0.100 0.0039 eee 0.150 0.0059 fff 0.080 0.0031 lfbga104 l ow profile f ine pitch b all g rid a rray body: 11 x 7 x 1.4mm 8054244 b
STA8058 revision history doc id 14095 rev 4 13/14 5 revision history table 4. document revision history date revision changes 25-oct-2007 1 initial release. 19-mar-2009 2 updated table 1: device summary on page 1 . updated ecopack description in section 4: package information on page 12 . 23-oct-2012 3 updated table 1: device summary updated figure 2: STA8058 teseo baseband block diagram and figure 4: STA8058 teseo mcm block diagram updated table 2: ball out for lfbga104 package 17-sep-2013 4 updated disclaimer
STA8058 14/14 doc id 14095 rev 4 rev 4 please read carefully: information in this document is provided solely in connection with st products. stmicroelectronics nv and its subsidiaries (?st ?) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described he rein at any time, without notice. all st products are sold pursuant to st?s terms and conditions of sale. purchasers are solely responsible for the choice, selection and use of the st products and services described herein, and st as sumes no liability whatsoever relating to the choice, selection or use of the st products and services described herein. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. i f any part of this document refers to any third party products or services it shall not be deemed a license grant by st for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoev er of such third party products or services or any intellectual property contained therein. unless otherwise set forth in st?s terms and conditions of sale st disclaims any express or implied warranty with respect to the use and/or sale of st products including without limitation implied warranties of merchantability, fitness for a particul ar purpose (and their equivalents under the laws of any jurisdiction), or infringement of any patent, copyright or other intellectual property right. st products are not designed or authorized for use in: (a) safety critical applications such as life supporting, active implanted devices or systems with product functional safety requirements; (b) aeronautic applications; (c) automotive applications or environments, and/or (d) aerospace applications or environments. where st products are not designed for such use, the purchaser shall use products at purchaser?s sole risk, even if st has been informed in writing of such usage, unless a product is expressly designated by st as being intended for ? automotive, automotive safe ty or medical? industry domains according to st product design specifications. products formally escc, qml or jan qualified are deemed suitable for use in aerospace by the corresponding governmental agency. resale of st products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by st for the st product or service described herein and shall not create or extend in any manner whatsoev er, any liability of st. st and the st logo are trademarks or registered trademarks of st in various countries. information in this document supersedes and replaces all information previously supplied. the st logo is a registered trademark of stmicroelectronics. all other names are the property of their respective owners. ? 2013 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - philippines - singapore - spain - sweden - switzerland - united kingdom - united states of america www.st.com

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