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  hexfet ? power mosfet this design of hexfet ? power mosfets utilizes the lastest processing techniques to achieve extremely low on-resistance per silicon area. additional features of this hexfet power mosfet are a 175c junction operating temperature, fast switching speed and improved repetitive avalanche rating. these combine to make this design an extremely efficient and reliable device for use in a wide variety of applications. s d g v dss = 75v r ds(on) = 0.0126 ? i d = 75a description  www.irf.com 1 features typical applications  industrial motor drive to-220ab irf3007pbf parameter typ. max. units r jc junction-to-case ??? 0.74 r cs case-to-sink, flat, greased surface 0.50 ??? c/w r ja junction-to-ambient ??? 62 thermal resistance parameter max. units i d @ t c = 25c continuous drain current, v gs @ 10v (silicon limited) 80 i d @ t c = 100c continuous drain current, v gs @ 10v (see fig.9) 56 a i d @ t c = 25c continuous drain current, v gs @ 10v (package limited) 75 i dm pulsed drain current   320 p d @t c = 25c power dissipation 200 w linear derating factor 1.3 w/c v gs gate-to-source voltage 20 v e as single pulse avalanche energy  280 mj e as (6 sigma) single pulse avalanche energy tested value  946 i ar avalanche current  see fig.12a, 12b, 15, 16 a e ar repetitive avalanche energy  mj t j operating junction and -55 to + 175 t stg storage temperature range soldering temperature, for 10 seconds 300 (1.6mm from case ) c mounting torque, 6-32 or m3 screw 1.1 (10) n?m (lbf?in) absolute maximum ratings  ultra low on-resistance  175c operating temperature  fast switching  repetitive avalanche allowed up to tjmax  lead-free 

 2 www.irf.com parameter min. typ. max. units conditions v (br)dss drain-to-source breakdown voltage 75 ??? ??? v v gs = 0v, i d = 250a ? v (br)dss / ? t j breakdown voltage temp. coefficient ??? 0.084 ??? v/c reference to 25c, i d = 1ma r ds(on) static drain-to-source on-resistance ??? 10.5 12.6 m ? v gs = 10v, i d = 48a  v gs(th) gate threshold voltage 2.0 ??? 4.0 v v ds = 10v, i d = 250a g fs forward transconductance 180 ??? ??? s v ds = 25v, i d = 48a ??? ??? 20 a v ds = 75v, v gs = 0v ??? ??? 250 v ds = 60v, v gs = 0v, t j = 150c gate-to-source forward leakage ??? ??? 200 v gs = 20v gate-to-source reverse leakage ??? ??? -200 na v gs = -20v q g total gate charge ??? 89 130 i d = 48a q gs gate-to-source charge ??? 21 32 nc v ds = 60v q gd gate-to-drain ("miller") charge ??? 30 45 v gs = 10v t d(on) turn-on delay time ??? 12 ??? v dd = 38v t r rise time ??? 80 ??? i d = 48a t d(off) turn-off delay time ??? 55 ??? r g = 4.6 ? t f fall time ??? 49 ??? v gs = 10v  between lead, ??? ??? 6mm (0.25in.) from package and center of die contact c iss input capacitance ??? 3270 ??? v gs = 0v c oss output capacitance ??? 520 ??? pf v ds = 25v c rss reverse transfer capacitance ??? 78 ??? ? = 1.0mhz, see fig. 5 c oss output capacitance ??? 3500 ??? v gs = 0v, v ds = 1.0v, ? = 1.0mhz c oss output capacitance ??? 340 ??? v gs = 0v, v ds = 60v, ? = 1.0mhz c oss eff. effective output capacitance  ??? 640 ??? v gs = 0v, v ds = 0v to 60v nh electrical characteristics @ t j = 25c (unless otherwise specified) l d internal drain inductance l s internal source inductance ??? ??? s d g i gss ns 4.5 7.5 i dss drain-to-source leakage current s d g parameter min. typ. max. units conditions i s continuous source current mosfet symbol (body diode) ??? ??? showing the i sm pulsed source current integral reverse (body diode)  ??? ??? p-n junction diode. v sd diode forward voltage ??? ??? 1.3 v t j = 25c, i s = 48a, v gs = 0v  t rr reverse recovery time ??? 85 130 ns t j = 25c, i f = 48a, v dd = 38v q rr reverse recovery charge ??? 280 420 nc di/dt = 100a/s   t on forward turn-on time intrinsic turn-on time is negligible (turn-on is dominated by l s +l d ) source-drain ratings and characteristics 80  320    repetitive rating; pulse width limited by max. junction temperature. (see fig. 11).   starting t j = 25c, l = 0.24mh r g = 25 ? , i as = 48a, v gs =10v (see figure 12).  i sd 48a, di/dt 330a/s, v dd v (br)dss , t j 175c  pulse width 400s; duty cycle 2%.   c oss eff. is a fixed capacitance that gives the same charging time as c oss while v ds is rising from 0 to 80% v dss .  limited by t jmax , see fig.12a, 12b, 15, 16 for typical repetitive avalanche performance.  this value determined from sample failure population. 100% tested to this value in production.
 www.irf.com 3 fig 2. typical output characteristics fig 1. typical output characteristics fig 3. typical transfer characteristics 0. 1 1 10 100 v ds , drain-to-source voltage (v) 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) 4.5v 20s pulse width tj = 25c vgs top 1 5v 10v 8.0v 7.0v 6.0v 5.5v 5.0v bottom 4.5v 0. 1 1 10 100 v ds , drain-to-source voltage (v) 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) 4.5v 20s pulse width tj = 175c vgs top 1 5v 10v 8.0v 7.0v 6.0v 5.5v 5.0v bottom 4.5v 4.0 5.0 6.0 7.0 8.0 9.0 v gs , gate-to-source voltage (v) 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) t j = 25c t j = 175c v ds = 25v 20s pulse width 0 40 80 120 160 i d, drain-to-source current (a) 0 20 40 60 80 100 g f s , f o r w a r d t r a n s c o n d u c t a n c e ( s ) t j = 25c t j = 175c v ds = 25v 20s pulse width fig 4. typical forward transconductance vs. drain current
 4 www.irf.com fig 8. maximum safe operating area fig 6. typical gate charge vs. gate-to-source voltage fig 5. typical capacitance vs. drain-to-source voltage fig 7. typical source-drain diode forward voltage 1 10 100 v ds , drain-to-source voltage (v) 0 1000 2000 3000 4000 5000 6000 c , c a p a c i t a n c e ( p f ) cos s crss ciss v gs = 0v, f = 1 mhz c iss = c gs + c gd , c ds shorted c rss = c gd c oss = c ds + c gd 0 40 80 120 160 q g total gate charge (nc) 0 4 8 12 16 20 v g s , g a t e - t o - s o u r c e v o l t a g e ( v ) v ds = 60v vds= 38v vds= 15v i d = 48a 1 10 100 1000 v ds , drain-tosource voltage (v) 0.1 1 10 100 1000 10000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) tc = 25c tj = 175c single pulse 1msec 10msec operation in this area limited by r ds (on) 100sec 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 v sd , source-todrain voltage (v) 0.1 1.0 10.0 100.0 1000.0 i s d , r e v e r s e d r a i n c u r r e n t ( a ) t j = 25c t j = 175c v gs = 0v
 www.irf.com 5 fig 11. maximum effective transient thermal impedance, junction-to-case fig 9. maximum drain current vs. case temperature 0.01 0.1 1 0.00001 0.0001 0.001 0.01 0.1 notes: 1. duty factor d = t / t 2. peak t = p x z + t 1 2 j dm thjc c p t t dm 1 2 t , rectangular pulse duration (sec) thermal response (z ) 1 thjc 0.01 0.02 0.05 0.10 0.20 d = 0.50 single pulse (thermal response) 25 50 75 100 125 150 175 0 20 40 60 80 t , case temperature ( c) i , drain current (a) c d limited by package fig 10. normalized on-resistance vs. temperature -60 -40 -20 0 20 40 60 80 100 120 140 160 180 0.0 0.5 1.0 1.5 2.0 2.5 3.0 t , junction temperature ( c) r , drain-to-source on resistance (normalized) j ds(on) v = i = gs d 10v 80a
 6 www.irf.com 25 50 75 100 125 150 175 0 100 200 300 400 500 600 starting t , junction temperature ( c) e , single pulse avalanche energy (mj) j as i d top bottom 20a 34a 48a q g q gs q gd v g charge d.u.t. v ds i d i g 3ma v gs .3 f 50k ? .2 f 12v current regulator same type as d.u.t. current sampling resistors + -   fig 13b. gate charge test circuit fig 13a. basic gate charge waveform fig 12c. maximum avalanche energy vs. drain current fig 12b. unclamped inductive waveforms fig 12a. unclamped inductive test circuit t p v (br)dss i as fig 14. threshold voltage vs. temperature r g i as 0.01 ? t p d.u.t l v ds + - v dd driver a 15v 20v v gs -75 -50 -25 0 25 50 75 100 125 150 175 t j , temperature ( c ) 1. 0 2. 0 3. 0 4. 0 - v g s ( t h ) g a t e t h r e s h o l d v o l t a g e ( v ) i d = 250a
 www.irf.com 7 fig 15. typical avalanche current vs.pulsewidth fig 16. maximum avalanche energy vs. temperature notes on repetitive avalanche curves , figures 15, 16: (for further info, see an-1005 at www.irf.com) 1. avalanche failures assumption: purely a thermal phenomenon and failure occurs at a temperature far in excess of t jmax . this is validated for every part type. 2. safe operation in avalanche is allowed as long ast jmax is not exceeded. 3. equation below based on circuit and waveforms shown in figures 12a, 12b. 4. p d (ave) = average power dissipation per single avalanche pulse. 5. bv = rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. i av = allowable avalanche current. 7. ? t = allowable rise in junction temperature, not to exceed t jmax (assumed as 25c in figure 15, 16). t av = average time in avalanche. d = duty cycle in avalanche = t av f z thjc (d, t av ) = transient thermal resistance, see figure 11) p d (ave) = 1/2 ( 1.3bvi av ) =   t/ z thjc i av = 2  t/ [1.3bvz th ] e as (ar) = p d (ave) t av 25 50 75 100 125 150 175 starting t j , junction temperature (c) 0 100 200 300 e a r , a v a l a n c h e e n e r g y ( m j ) t op single pulse bottom 50% duty cycle i d = 48a 1.0e-08 1.0e-07 1.0e-06 1.0e-05 1.0e-04 1.0e-03 1.0e-02 1.0e-01 tav (sec) 0.1 1 10 100 1000 a v a l a n c h e c u r r e n t ( a ) 0.05 duty cycle = single pulse 0.10 allowed avalanche current vs avalanche pulsewidth, tav assuming ? tj = 25c due to avalanche losses. note: in no case should tj be allowed to exceed tjmax 0.01
 8 www.irf.com fig 17.       for n-channel hexfet   power mosfets 
   ?  
    ?      ?            p.w. period di/dt diode recovery dv/dt ripple 5% body diode forward drop re-applied voltage reverse recovery current body diode forward current v gs =10v v dd i sd driver gate drive d.u.t. i sd waveform d.u.t. v ds waveform inductor curent d = p. w . period    
     + - + + + - - -       ?   
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 !"!! ?     

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 v ds 90% 10% v gs t d(on) t r t d(off) t f   &' 1 ( 
#   0.1 %        + -  fig 18a. switching time test circuit fig 18b. switching time waveforms
 www.irf.com 9 data and specifications subject to change without notice. this product has been designed and qualified for the industrial market. qualification standards can be found on ir?s web site. ir world headquarters: 233 kansas st., el segundo, california 90245, usa tel: (310) 252-7105 tac fax: (310) 252-7903 visit us at www.irf.com for sales contact information . 07/2010 to-220ab package is not recommended for surface mount application 

 
 

  
      
   international part number rect ifier lot code as s e mb l y logo year 0 = 2000 dat e code week 19 line c lot code 1789 e xample : t his is an irf 1010 note: "p" in assembly line position i ndi cates " l ead - f r ee" in the assembly line "c" as s e mb led on ww 19, 2000 notes: 1. for an automotive qualified version of this part please see http://www.irf.com/product-info/auto/ 2. for the most current drawing please refer to ir website at http://www.irf.com/package/


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