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hexfet power mosfet notes through are on page 12 absolute maximum ratings parameter units v ds drain-to-source voltage v v gs gate-to-source voltage i d @ t c = 25c continuous drain current, v gs @ 10v i d @ t c = 100c continuous drain current, v gs @ 10v a i dm pulsed drain current p d @t c = 25c maximum power dissipation p d @t c = 100c maximum power dissipation linear derating factor w/c t j operating junction and c t stg storage temperature range thermal resistance parameter typ. max. units r jc junction-to-case ??? 2.3 r ja junction-to-ambient (pcb mount) ??? 50 c/w r ja junction-to-ambient ??? 110 max. 65 46 260 20 30 w -55 to + 175 65 0.43 33 d s g d-pak features benefits industry-standard pinout d-pak ? multi-vendor compatibility compatible with existing surface mount techniques easier manufacturing rohs compliant, halogen-free environmentally friendlier msl1, industrial qualification increased reliability ! "# v ds 30 v r ds(on) max (@v gs = 10v) 8.4 q g (typical) 8.5 nc i d (@t c = 25c) 65 a m form quantity IRLR8721PBF-1 d-pak tape and reel 2000 irlr8721trpbf-1 base part number package type standard pack orderable part number ! "# s d g static @ t j = 25c (unless otherwise specified) parameter min. typ. max. units bv dss drain-to-source breakdown voltage 30 ??? ??? v ? / . 1 / () . . 10.1 11. () 1. 1. . () . / 1.0 a ??? ??? 150 i gss gate-to-source forward leakage ??? ??? 100 na gate-to-source reverse leakage ??? ??? -100 gfs forward transconductance 46 ??? ??? s q g total gate charge ??? 8.5 13 q gs1 pre-vth gate-to-source charge ??? 1.9 ??? q gs2 post-vth gate-to-source charge ??? 1.2 ??? nc q gd gate-to-drain charge ??? 3.4 ??? q godr gate charge overdrive ??? 2.0 ??? see fig. 16 q sw switch charge (q gs2 + q gd ) ??? 4.6 ??? q oss output charge ??? 7.9 ??? nc r g gate resistance ??? 2.3 3.8 () . 0 () . . 100 0 110 avalanche characteristics parameter units e as single pulse avalanche energy mj i ar avalanche current a e ar repetitive avalanche energy mj diode characteristics parameter min. typ. max. units i s continuous source current ??? ??? 65 a (body diode) i sm pulsed source current ??? ??? 260 (body diode) v sd diode forward voltage ??? ??? 1.0 v t rr reverse recovery time ??? 17 26 ns q rr reverse recovery charge ??? 24 36 nc t on forward turn-on time intrinsic turn-on time is negligible (turn-on is dominated by ls+ld) mosfet symbol v gs = 4.5v, i d = 20a ??? v gs = 4.5v typ. ??? ??? i d = 20a v gs = 0v v ds = 15v t j = 25c, i f = 20a, v dd = 15v di/dt = 300a/ s t j = 25c, i s = 20a, v gs = 0v showing the integral reverse p-n junction diode. v ds = v gs , i d = 25 a v ds = 24v, v gs = 0v v ds = 24v, v gs = 0v, t j = 125c r g = 1.8 = 1 = 0 = 1 = 0 = 1 = . i d = 20a v ds = 15v conditions v gs = 0v, i d = 250 a reference to 25c, i d = 1ma v gs = 10v, i d = 25a v gs = 20v v gs = -20v conditions 6.5 see fig. 14 max. 93 20 ? = 1.0mhz " ! "# fig 4. normalized on-resistance vs. temperature fig 2. typical output characteristics fig 1. typical output characteristics fig 3. typical transfer characteristics 0.1 1 10 100 v ds , drain-to-source voltage (v) 0.1 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) vgs top 10v 8.0v 5.0v 4.5v 4.0v 3.5v 3.0v bottom 2.7v 60 s pulse width tj = 25c 2.7v 0.1 1 10 100 v ds , drain-to-source voltage (v) 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) 2.7v 60 s pulse width tj = 175c vgs top 10v 8.0v 5.0v 4.5v 4.0v 3.5v 3.0v bottom 2.7v 0 2 4 6 8 10 v gs , gate-to-source voltage (v) 0.1 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) t j = 25c t j = 175c v ds = 15v 60 s pulse width -60 -40 -20 0 20 40 60 80 100 120 140 160 180 t j , junction temperature (c) 0.5 1.0 1.5 2.0 r d s ( o n ) , d r a i n - t o - s o u r c e o n r e s i s t a n c e ( n o r m a l i z e d ) i d = 25a v gs = 10v ! "# fig 8. maximum safe operating area fig 6. typical gate charge vs. gate-to-source voltage fig 5. typical capacitance vs. drain-to-source voltage fig 7. typical source-drain diode forward voltage 1 10 100 v ds , drain-to-source voltage (v) 10 100 1000 10000 c , c a p a c i t a n c e ( p f ) v gs = 0v, f = 1 mhz c iss = c gs + c gd , c ds shorted c rss = c gd c oss = c ds + c gd c oss c rss c iss 0246810 q g , total gate charge (nc) 0.0 1.0 2.0 3.0 4.0 5.0 v g s , g a t e - t o - s o u r c e v o l t a g e ( v ) v ds = 24v v ds = 15v v ds = 6.0v i d = 20a 0.0 0.5 1.0 1.5 2.0 v sd , source-to-drain voltage (v) 0.1 1 10 100 1000 i s d , r e v e r s e d r a i n c u r r e n t ( a ) t j = 25c t j = 175c v gs = 0v 0 1 10 100 v ds , drain-to-source voltage (v) 0.1 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) operation in this area limited by r ds (on) tc = 25c tj = 175c single pulse 100 sec 1msec 10msec $ ! "# fig 11. maximum effective transient thermal impedance, junction-to-case fig 9. maximum drain current vs. case temperature fig 10. threshold voltage vs. temperature 25 50 75 100 125 150 175 t c , case temperature (c) 0 10 20 30 40 50 60 70 i d , d r a i n c u r r e n t ( a ) limited by package -75 -50 -25 0 25 50 75 100 125 150 175 200 t j , temperature ( c ) 0.5 1.0 1.5 2.0 2.5 v g s ( t h ) , g a t e t h r e s h o l d v o l t a g e ( v ) i d = 25 a 1e-006 1e-005 0.0001 0.001 0.01 0.1 t 1 , rectangular pulse duration (sec) 0.001 0.01 0.1 1 10 t h e r m a l r e s p o n s e ( z t h j c ) c / w 0.20 0.10 d = 0.50 0.02 0.01 0.05 single pulse ( thermal response ) notes: 1. duty factor d = t1/t2 2. peak tj = p dm x zthjc + tc ri (c/w) i (sec) 0.3501 0.000072 1.1877 0.001239 0.7635 0.010527 j j 1 1 2 2 3 3 r 1 r 1 r 2 r 2 r 3 r 3 c ci i / ri ci= i / ri % ! "# fig 13. gate charge test circuit fig 12b. unclamped inductive waveforms fig 12a. unclamped inductive test circuit t p v (br)dss i as fig 12c. maximum avalanche energy vs. drain current r g i as 0.01 t p d.u.t l v ds + - v dd driver a 15v 20v d.u.t. v ds i d i g 3ma v gs .3 f 50k .2 f 12v current regulator same type as d.u.t. current sampling resistors + - 25 50 75 100 125 150 175 starting t j , junction temperature (c) 0 50 100 150 200 250 300 350 400 e a s , s i n g l e p u l s e a v a l a n c h e e n e r g y ( m j ) i d top 1.1a 1.4a bottom 20a v ds 90% 10% v gs t d(on) t r t d(off) t f & 1 0.1 % & '( & + - & fig 14a. switching time test circuit fig 14b. switching time waveforms ) ! "# fig 15. typical avalanche current vs. pulsewidth 1.0e-06 1.0e-05 1.0e-04 1.0e-03 1.0e-02 1.0e-01 1.0e+00 1.0e+01 1.0e+02 tav (sec) 0.1 1 10 100 a v a l a n c h e c u r r e n t ( a ) duty cycle = single pulse allowed avalanche current vs avalanche pulsewidth, tav, assuming ? j = 25c and tstart = 150c. allowed avalanche current vs avalanche pulsewidth, tav, assuming tj = 150c and tstart =25c (single pulse) * ! "# fig 15. for n-channel hexfet power mosfets ? ? ? p.w. period di/dt diode recovery dv/dt ripple 5% body diode forward drop re-applied voltage reverse recovery current body diode forward current v gs =10v v dd i sd driver gate drive d.u.t. i sd waveform d.u.t. v ds waveform inductor curent d = p. w . period & +$& , - ,.. + - + + + - - - & ? !" # $ ? ! % &'&& ? # (( ? &'&& ) ! ' fig 16. gate charge waveform vds vgs id vgs(th) qgs1 qgs2 qgd qgodr / ! "# control fet ! " # "$ # " % #&'(% #) *+'(%!#!) ! $ " ), p loss = p conduction + p switching + p drive + p output this can be expanded and approximated by; p loss = i rms 2 r ds(on ) ( ) + i q gd i g v in f ? ? ? ? ? ? + i q gs 2 i g v in f ? ? ? ? ? ? + q g v g f () + q oss 2 v in f ? ? ? ? ( #-!!#" #" *+'(#$ " ! # ! !## *+'( # $ ( ! !%" #" % .$ " #!!#) # # ###! # $*/" #!" $ " !!#! ! *+'(#!) )$!0" #) ## 1 2 3& #& !#) !)! !$ synchronous fet the power loss equation for q2 is approximated by; p loss = p conduction + p drive + p output * p loss = i rms 2 r ds(on) () + q g v g f () + q oss 2 v in f ? ? ? ? ? + q rr v in f ( ) *dissipated primarily in q1. for the synchronous mosfet q2, r ds(on) is an im- portant characteristic; however, once again the im- portance of gate charge must not be overlooked since it impacts three critical areas. under light load the mosfet must still be turned on and off by the con- trol ic so the gate drive losses become much more significant. secondly, the output charge q oss and re- verse recovery charge q rr both generate losses that are transfered to q1 and increase the dissipation in that device. thirdly, gate charge will impact the mosfets? susceptibility to cdv/dt turn on. the drain of q2 is connected to the switching node of the converter and therefore sees transitions be- tween ground and v in . as q1 turns on and off there is a rate of change of drain voltage dv/dt which is ca- pacitively coupled to the gate of q2 and can induce a voltage spike on the gate that is sufficient to turn the mosfet on, resulting in shoot-through current . the ratio of q gd /q gs1 must be minimized to reduce the potential for cdv/dt turn on. power mosfet selection for non-isolated dc/dc converters figure a: q oss characteristic ! "# 412 note: for the most current drawing please refer to ir website at http://www.irf.com/package/ int ernat ional ass embled on ww 16, 2001 in the assembly line "a" or note: "p" in ass embly line position example: lot code 1234 t his is an irfr120 wi t h as s e mb l y i ndi cates "l ead- f r ee" product (optional) p = de s i gnat e s l e ad-f r e e a = as s e mb l y s i t e code part number we e k 16 dat e code year 1 = 2001 rectifier int ernat ional logo lot code assembly 34 12 irfr120 116a line a 34 rectifier logo irfr120 12 as s e mb l y lot code year 1 = 2001 dat e code part number we e k 16 "p" in ass embly line pos ition indicates "l ead-f r ee" quali fi cation to the cons umer - level p = de s i gnat e s l e ad-f r e e product qualified to the consumer level (optional) ! "# 1412 note: for the most current drawing please refer to ir website at http://www.irf.com/package/ notes : 1. outline conforms to eia-481. 16 mm 13 inch tr 16.3 ( .641 ) 15.7 ( .619 ) 8.1 ( 7.9 ( 12.1 ( .476 ) 11.9 ( .469 ) feed direction notes : 1. controlling dimension : millimeter. 2. all dimensions are shown in millimeters ( inches ). 3. outline conforms to eia-481 & eia-541. ! "# repetitive rating; pulse width limited by max. junction temperature. starting t j = 25c, l = 0.47mh, r g = 25 , i as = 20a. pulse width 400 s; duty cycle 2%. calculated continuous current based on maximum allowable junction temperature. package limitation current is 50a. when mounted on 1" square pcb (fr-4 or g-10 material). for recommended footprint and soldering techniques refer to application note #an-994. moisture sensitivity level d-pak ms l 1 rohs c ompliant yes qualification information ? qualification level industrial (per jedec jes d47f ?? guidelines) ? qualification standards can be found at international rectifier?s web site: http://www.irf.com/product-info/reliability ?? applicable version of jedec standard at the time of product release ir world headquarters: 101 n. sepulveda blvd., el segundo, california 90245, usa to contact international rectifier, please visit http://www.irf.com/whoto-call/ |
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