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'dwd 6khhw 3uholplqdu\ &rqh[dqw 3ursulhwdu\ ,qirupdwlrq 'rf 1r % 1ryhpehu 6pduw+6) ? 0reloh0rghp host-processed, v.90/k56flex ? modem device set with host side device (11242), smartdaa ? (20463), and optional voice codec (20437) for pci bus/minipci/ cardbus-based mobile applications the conexant ? smarthsf host-processed (softk56 ? ) v.90/k56flex modem device family with smartdaa technology supports analog data up to 56 kbps, analog fax to 14.4 kbps, pdc high speed data, telephone answering machine (tam), voice/speaker phone (optional), and pci bus/minipci/cardbus host interf ace operation. these modem devices meet the size and power requirements of the mobile environment. table 1 lists the available models. the modem operates with pstn telephone lines in the u.s./japan/canada and optionally world-wide, and with japanese pdc (personal digital cellular) phones. modem and cellular data protocol software is provided. conexant's smartdaa tec hnology (patent pending) eliminates the need for a costly line transformer, relays, and opto-isolators typically used in discrete daa (data access arrangement) implementations. the smartdaa architecture also simplifies product implementation by eliminating the need for country-specific board configurations enabling world-wide homologation of a single modem board design. the smartdaa system-powered daa operates reliably wit hout drawing power from the line, unlike line-powered daas which operate poorly when line current is insufficient due to long lines or poor line conditions. enhanced features, such as monitoring of local extension status without going off-hook, are also supported. incorporating conexants proprietary digital isolation barrier (dib) design (patent pending) and other innovative daa features, such as digital pbx line protection and reporting, the smartdaa architecture simplifies application design, minimizes layout area, and reduces com ponent cost. for over a decade, conexant has assisted customers with daa tec hnology and homologation. this expertise and system level approach has been leveraged in this pr oduct. the smarthsf device set, consisting of a host side device (hsd) in a 100-pin tqfp and a line side device (lsd) (smartdaa device) in a 32-pin tqfp, supports data/fax/tam operation with host software-based digital signal processing and cell phone/daa/telephone line interface functions (figure 1). the optional voice codec (vc), in a 32-pin tqfp, supports voice/full-duplex sp eaker phone (fdsp) operation with interf aces to a microphone, sp eaker, and tele phone handset/headset. figure 2 identifies the major hardware signal interfaces. 'lvwlqjxlvklqj)hdwxuhv v.90 data/v.17 fax modem cellular data hardware interface and software (c models) - protocol stacks for pdc high speed - api for customer-provided cellular data protocol stack smartdaa technology - digital pbx line protection - caller id detection - line-in-use detection - remote hang-up detection - extension off-hook detection - call waiting detection data/fax/voice call discrimination host software/mmx digital signal processing voice/full-duplex speakerphone mode (s models) world-wide operation (w models) industry standard communication commands pci bus/mini-pci or cardbus host interface - 32-bit pci local bus compliant - supports pci bus power management system compatibilities - windows 95, windows 95 osr2, windows 98, windows nt 4.0, windows 2000 - microsoft pc 98 and pc 99 compliant v.80 synchronous access mode thin packages support low profile designs +3.3v operation with +5v tolerant digital inputs $ssolfdwlrqv laptop, notebook, and handheld computers pci bus/mini-pci embedded system boards pci bus/mini-pci/cardbus plug-in cards host side device (hsd) 11242 100-pin tqfp line side device (lsd) (smartdaa) 20463 32-pin tqfp voice codec (vc) 20437 32-pin tqfp (optional) mic speaker tip ring telephone line interface discrete components 100473_f1-1_sid digital isolation barrier (dib) tip ring handset (optional) telephone line (optional) pci bus/ mini pci/ cardbus pdc phone sounducer call progress )ljxuh 6pduw+6) 0rghp 6lpsolilhg ,qwhuidfh 'ldjudp
6pduw+6) 0reloh 0rghp 9.ioh[ 0rghp 'hylfh )dplo\ zlwk 6pduw'$$ 7hfkqrorj\ 2 conexant 100474b conexant proprietary information 7deoh 6pduw+6) 0rghp 0rghov dqg )xqfwlrqv 0rgho2ughu3duw 1xpehuv 6xssruwhg +dugzduh )xqfwlrqv 6hh 1rwh 0dunhwlqj 1dph 'hylfh 6hw 2ughu 1r +rvw 6lgh 'hylfh +6' >3lq 74)3@ 3duw 1r /lqh 6lgh 'hylfh /6' >3lq 74)3@ 3duw 1r 9rlfh &rghf 9& >3lq 74)3@ 3duw 1r +rvw %xv '$$ 7\sh 3'& 9.ioh[ 'dwd 9 )d[ 7$0 :ruog zlgh 9rlfh )'63 6pduw+6)03&, '6/ 2 3&, 86-& 2 < 2 2 6pduw+6)063&, '6/ 3&, 86-& 2 < 2 < 6pduw+6)0:3&, '6/ 2 3&, :: 2 < < 2 6pduw+6)0:63&, '6/ 3&, :: 2 < < < 6pduw+6)0&&% '6/ 2 &dug%xv 86-& < < 2 2 6pduw+6)0&6&% '6/ &dug%xv 86-& < < 2 < 6pduw+6)0&:&% '6/ 2 &dug%xv :: < < < 2 6pduw+6)0&:6&% '6/ &dug%xv :: < < < < 6pduw+6)0&3&, '6/ 2 3&, 86-& < < 2 2 6pduw+6)0&63&, '6/ 3&, 86-& < < 2 < 6pduw+6)0&:3&, '6/ 2 3&, :: < < < 2 6pduw+6)0&:63&, '6/ 3&, :: < < < < 1rwhv 0rgho rswlrqv & &hooxodu 0 0reloh 6 9rlfhixoogxsoh[ vshdnhuskrqh )'63 : :ruogzlgh vxssruw &% &dug%xv ,qwhuidfh 3&, 3&, %xv0lql3&, lqwhuidfh 6xssruwhg ixqfwlrqv < 6xssruwhg 1rw vxssruwhg 7$0 7hohskrqh dqvzhulqj pdfklqh 9rlfh sod\edfn dqg uhfrug wkurxjk whohskrqh olqh )'63 )xoogxsoh[ vshdnhuskrqh dqg yrlfh sod\edfn dqg uhfrug wkurxjk whohskrqh olqh kdqgvhw dqg plfvshdnhu 3'& 3huvrqdo 'ljlwdo &hooxodu gdwd 6riwzduh frqiljxudwlrqixqfwlrqv ghwhuplqhg e\ 'hylfh ,' ordghg lqwr ((3520 6hh 6pduw+6) 'hvljqhu?v *xlgh 'rf 1r information provided by conexant systems, inc. is believed to be accurate and reliable. however, no responsibility is assumed b y conexant for its use, nor any infringement of patents, copyrights, or other rights of third parties which may result from its use. no li cense is granted by implication or otherwise under any patent rights or copyright of conexant other than for circuitry embodied in conexant product s. conexant reserves the right to change circuitry at any time without notice. this document is subject to change without notice. conexant products are not designed or intended for use in life support appliances, devices, or systems where malfunction of a conexant product can reasonably be expected to result in personal injury or death. conexant customers using or selling conexant products for use in such applications do so at their own risk and agree to fully indemnify conexant for any damages resulting from such improper us e or sale. k56flex is a trademark of conexant systems, inc. and lucent technologies. conexant, the conexant c symbol, what's next in communications technologies, smartdaa, smarthcf, and smarthsf are trademarks of conexant systems, inc. product names or services listed in this publication are for identification purposes only, and may be trademarks or registered trademarks of third parties [their respective companies]. all other marks mentioned herein are the property of their respective [holders] own ers. ?1999, conexant systems, inc. all rights reserved
9.ioh[ 0rghp 'hylfh )dplo\ zlwk 6pduw'$$ 7hfkqrorj\ 6pduw+6) 0reloh 0rghp 100474b conexant 3 conexant proprietary information +rvw 6lgh 'hylfh +6' 3lq 74)3 &rqh[dqw 0rghp 6riwzduh &rqh[dqw 0rghp +dugzduh 'hylfhv &rqh[dqw 0rghp 3urgxfw 6pduw'$$ ,qwhuidfh 3&, %xv ,qwhuidfh 'ljlwdo 6shdnhu &lufxlw 2swlrqdo 0rghp 6riwzduh 'ulyhuv 2shudwlqj 6\vwhp 6riwzduh dqg 0rghp &rppxqlfdwlrq $ssolfdwlrq 6riwzduh 2(0 6xssolhg +dugzduh 2(0&xvwrphu 6xssolhg 6riwzduh +rvw &rpsxwhu 3&, %xv 0lql 3&, &dugexv b)b),' 6281'8&(5 9rlfh &rghf ,qwhuidfh ; 3'& 3+21( 3'& 3'& 3dfnhw ,qwhuidfh 2swlrqdo &hoo 3krqh ,qwhuidfh 9rlfh &rghf 9& 3lq 74)3 2swlrqdo 63($.(5 0lf6shdnhu ,qwhuidfh 2swlrqdo 7,3 5,1* 7hohskrqh /lqh ,qwhuidfh 'lvfuhwh &rpsrqhqwv 7,3 5,1* 9rlfh 5hod\ +6 3lfnxs 'hwhfwru 2swlrqdo 7(/(3+21( /,1( 7(/(3+21( +$1'6(7 0,& 63($.(5 'ljlwdo ,vrodwlrq %duulhu ',% &rpsrqhqwv /lqh 6lgh 'hylfh /6' 6pduw'$$ 3lq 74)3 /lqh 6lgh ',% ,qwhuidfh /6', &rghf 7hohskrqh /lqh ,qwhuidfh '$$ +dugzduh +6 +\eulg &rpsrqhqwv 2swlrqdo 5hfwlilhu dqg )lowhu &rpsrqhqw v call progress )ljxuh 6pduw+6) 0rghp 0dmru ,qwhuidfhv
6pduw+6) 0reloh 0rghp 9.ioh[ 0rghp 'hylfh )dplo\ zlwk 6pduw'$$ 7hfkqrorj\ 4 conexant 100474b conexant proprietary information 'hwdlohg)hdwxuhv *hqhudo 0rghp )hdwxuhv v.90 data modem with receive rates up to 56k bps and send rates up to v.34 rates - itu-t v.90, k56flex, v.34 (33.6 kbps), v.32 bis, v.32, v.22 bis, v.22, v.23, and v.21; bell 212a and 103 - v.42 lapm and mnp 2-4 error correction - v.42 bis and mnp 5 data compression - v.250 (ex v.25 ter) and v.251 (ex v.25 ter annex a) commands v.17 fax modem with send and receive rates up to 14.4 kbps - v.17, v.29, v.27 ter, and v.21 ch 2 - eia/tia 578 class 1 and t.31 class 1.0 commands cellular data hardware interface and software support (c models) - protocol stacks for pdc high speed - api for customer-provided cellular data protocol stack telephony/tam - v.253 commands - 8-bit m -law/a-law coding (g.711) - 8-bit/16-bit linear coding - 8 khz sample rate - concurrent dtmf, ring, and caller id detection v.80 synchronous access mode supports host-controlled communication protocols with h.324 interface support v.8/v.8bis and v.251 (ex v.25 ter annex a) commands data/fax/voice call discrimination full-duplex speakerphone (fdsp) mode (s models) - microphone and speaker interface - telephone handset/headset interface host software/mmx-based digital signal processing single configuration profile stored in host operates in us/japan/canada world-wide operation (w models) - complies to tbr21 and other country requirements - caller id detection system compatibilities - windows 95, windows 95 osr2, windows 98, windows nt 4.0, windows 2000 operating systems - microsoft's pc 98 and pc 99 design initiative compliant - advanced configuration and power interface (acpi) - unimodem/v compliant - pentium 166 mhz mmx-compatible pc or greater - 16 mbyte ram or more thin packages support low profile designs - hsd (11242): 100-pin tqfp (1.2 mm max. height) - lsd (20463): 32-pin tqfp (1.6 mm max. height) - vc (20437): 32-pin tqfp (1.6 mm max. height) +3.3v operation with +5v tolerant digital inputs 3&, %xv +rvw ,qwhuidfh )hdwxuhv 32-bit pci bus host interface - meets pci local bus specification rev. 2.2 - pci bus mastering interface - 33 mhz pci clock support supports power management - meets pci bus power management spec. rev. 1.1 - acpi power management registers - apm support - pme# support - vaux/vpci power switching support (-pci model option) - vauxdet support 6pduw'$$ )hdwxuhv digital pbx line protection system side powered daa operates under poor line current supply conditions wake-on-ring ring detection line polarity reversal detection line current loss detection caller id (cid) detection pulse dialing line-in-use detection C detects even while on-hook remote hang-up detect C for efficient call termination extension pickup detect call waiting detection meets world-wide dc vi masks requirements (w models) 'hvfulswlrq *hqhudo modem operation, including dialing, call progress, telephone line interface, telephone handset interface, pdc high speed interface, voice/speakerphone interface, and host interface functions are supported and controlled through the v.250, v.251, and v.253-compatible command set. the modem hardware connects to the host processor via a pci/minipci/cardbus bus interface. the oem adds a crystal circuit, eeprom, dib and lsd power rectifier and filter components, telephone line interface, optional telephone handset interface, optional pdc high speed interface, optional voice/speakerphone interface, and other supporting discrete components as required by the modem model (table 1) and the application to complete the system. +rvw 0rghp 6riwzduh the host modem software performs the following tasks: 1. general modem control, which includes command sets, fax class 1, tam, voice/speakerphone, error correction, data compression, pdc high speed data protocol stacks and phone drivers, and operating system interface functions.
9.ioh[ 0rghp 'hylfh )dplo\ zlwk 6pduw'$$ 7hfkqrorj\ 6pduw+6) 0reloh 0rghp 100474b conexant 5 conexant proprietary information 2. modem data pump signal processing, which includes data and facsimile modulation and demodulation, as well as voice sample formatting, is performed by the host processor using conexant softk56 technology. 3. smartdaa control, which includes hsd smartdaa interface control, lsd configuration and control, telephone line interface parameter control, and telephone line impedance control. configurations of the modem software are provided to support modem models listed in table 1. 'dwd)d[ 0rghv in v.90/k56flex data modem mode, the modem can receive data from a digital source using a v.90- or k56flex-compatible central site modem at line speeds up to 56 kbps. asymmetrical data transmission supports sending data at line speeds up to v.34 rates. this mode can fallback to full-duplex v.34 mode, and to lower rates, as dictated by line conditions. in v.34 data modem mode, the modem can operate in 2- wire, full-duplex, asynchronous modes at line rates up to 33.6 kbps. data modem modes perform complete handshake and data rate negotiations. using v.34 modulation to optimize modem configuration for line conditions, the modem can connect at the highest data rate that the channel can support from 33600 bps down to 2400 bps with automatic fallback. automode operation in v.34 is provided in accordance with pn3320 and in v.32 bis in accordance with pn2330. all tone and pattern detection functions required by the applicable itu or bell standard are supported. in v.32 bis data modem mode, the modem can operate at line speeds up to 14.4 kbps. in fax modem mode, the modem can operate in 2-wire, half-duplex, synchronous modes and can support group 3 facsimile send and receive speeds of 14400, 12000, 9600, 7200, 4800, and 2400 bps. fax data transmission and reception performed by the modem are controlled and monitored through the eia/tia-578 class 1 or t.31 class 1.0 command interface. full hdlc formatting, zero insertion/deletion, and crc generation/checking are provided. 6\qfkurqrxv $ffhvv 0rgh 6$0 9lghr &rqihuhqflqj v.80 synchronous access mode between the modem and the host/dte is provided for host-controlled communication protocols, e.g., h.324 video conferencing applications. voice-call-first (vcf) before switching to a videophone call is also supported. 7$0 0rgh tam mode features include 8-bit m -law, a-law, and linear coding at 8 khz sample rate. full-duplex voice supports concurrent voice receive and transmit. tone detection/generation, call discrimination, and concurrent dtmf detection are also supported. this mode supports applications such as digital tam, voice annotation, and recording from and playback to the telephone line. adpcm (4-bit ima) coding is also supported to meet microsoft whql logo requirements. tam mode is supported by three submodes: 1. online voice command mode supports connection to the telephone line or, for s models, a microphone/speaker/handset/headset. 2. voice receive mode supports recording voice or audio data input from the telephone line or, for s models, a microphone/handset/headset. 3. voice transmit mode supports playback of voice or audio data to the telephone line or, for s models, a speaker/handset/headset. 9rlfh6shdnhuskrqh 0rgh 6 0rghov the s models include additional telephone handset, external microphone, and external speaker interfaces which support voice and full-duplex speakerphone (fdsp) operation. hands-free full-duplex telephone operation is supported in speakerphone mode under host control. speakerphone mode features an advanced proprietary speakerphone algorithm which supports full-duplex voice conversation with acoustic, line, and handset echo cancellation. parameters are constantly adjusted to maintain stability with automatic fallback from full-duplex to pseudo-duplex operation. the speakerphone algorithm allows position independent placement of microphone and speaker. the host can separately control volume, muting, and agc in microphone and speaker channels. 3huvrqdo 'ljlwdo &hooxodu 3'& +ljk 6shhg 0rgh & 0rghov pdc high speed mode, implemented in host software, includes v.42 bis data compression and arq framing. a pass-through mode is also available to allow a phone book to be transferred to and from the pc at speeds up to 9600 bps (e.g., for editing on the pc). pdc high speed mode is enabled by +ws46=20 and disabled by +ws46=1.
6pduw+6) 0reloh 0rghp 9.ioh[ 0rghp 'hylfh )dplo\ zlwk 6pduw'$$ 7hfkqrorj\ 6 conexant 100474b conexant proprietary information 5hihuhqfh 'hvljq a minipci type iiib data/fax/tam reference design board is available to minimize application design time and costs. the board is pretested to pass fcc part 15, part 68, and ctr 21 for immediate manufacturing. a design package for the board is available in electronic form. the design package includes schematics, bill of materials (bom), vendor parts list (vpl), board layout files in gerber format, and complete documentation. the design can also be used for the basis of a custom design by the oem to accelerate design completion for rapid market entry. $gglwlrqdo ,qirupdwlrq additional information is described in the smarthsf modem device family for mobile applications designers guide (doc. no. 100473, formerly identified as doc. no. 1221) and the command reference manual (doc. no. 100498, formerly identified as doc. no. 1118). +dugzduh'hvfulswlrq smartdaa ? technology (patent pending) eliminates the need for a costly analog transformer, relays, and opto- isolators that are typically used in discrete daa implementations. the programmable smartdaa architecture simplifies product implementation in world- wide markets by eliminating the need for country-specific components. +rvw 6lgh 'hylfh +6' the hsd, packaged in a 100-pin tqfp, includes a pci/minipci/cardbus interface and a smartdaa interface. the pci/minipci/cardbus interface connects directly to an embedded or external pci/minipci/cardbus interface eliminating the need for additional external logic components. the smartdaa interface communicates with, and supplies power and clock to, the lsd through the dib. 'ljlwdo ,vrodwlrq %duulhu ',% 2(0 6xssolhg the dib electrically dc isolates the hsd from the lsd and telephone line. the hsd is connected to a fixed digital ground and operates with standard cmos logic levels. the lsd is connected to a floating ground and can tolerate high voltage input (compatible with telephone line and typical surge requirements). the dib power and clock transformer (pcxfmr) couples power and clock from the hsd to the lsd. the dib data channel supports bidirectional half-duplex serial transfer of data, control, and status information between the hsd and the lsd. 6pduw'$$ /lqh 6lgh 'hylfh /6' the lsd includes a line side dib interface (lsdi), a coder/decoder (codec), and a telephone line interface (tli). the lsdi communicates with, and receives power and clock from, the smartdaa interface in the hsd through the dib. lsd power is received from the dib pcxfmr secondary winding through a half-wave rectifying diode and capacitive power filter circuit. the clk input is also accepted from the pcxfmr secondary winding through a capacitor and a resistor in series. information is transferred between the lsd and the hsd through the dib_p and dib_n pins. these pins connect to the hsd dib_datap and dib_datan pins, respectively, through the dib. the tli integrates daa and direct telephone line interface functions and connects directly to the line tip and ring pins, as well as to external line protection components. direct lsd connection to tip and ring allows real-time measurement of telephone line parameters, such as the telephone central office (co) battery voltage, individual telephone line (copper wire) resistance, and allows dynamic regulation of the off-hook tip and ring voltage and total current drawn from the central office (co). this allows the modem to maintain compliance with u.s. and world-wide regulations and to actively control the daa power dissipation. 9rlfh &rghf 9& 6 0rghov the optional vc, packaged in a 32-pin tqfp, supports voice/full-duplex speakerphone (fdsp) operation with interfaces to a microphone and speaker and to a telephone handset/headset.
9.ioh[ 0rghp 'hylfh )dplo\ zlwk 6pduw'$$ 7hfkqrorj\ 6pduw+6) 0reloh 0rghp 100474b conexant 7 conexant proprietary information +6'+dugzduh3lqvdqg6ljqdov *hqhudo 3&, %xv0lql3&,&dug%xv +rvw ,qwhuidfh the host side device conforms to the pci local bus specification version 2.2, minipci specification draft 1.0, and pc card standard for cardbus. it is a memory slave and a bus master for pc host memory accesses (burst transactions). configuration is by pci configuration protocol. the pci bus/minipci/cardbus interface signals are: address and data - 32 bidirectional address/data (ad[31-0]); bidirectional - 4 bus command and byte enable (cbe [3:0]); bidirectional - bidirectional parity (par); bidirectional interface control - cycle frame (frame#); bidirectional - initiator ready (irdy#); bidirectional - target ready (trdy#); bidirectional - stop (stop#); bidirectional - initialization device select (idsel); input - device select (devsel#); bidirectional arbitration - request (req#); output - grant (grant#); input error reporting - parity error (perr#); bidirectional - system error (serr#); bidirectional interrupt - interrupt a (inta#); output system - clock (pciclk); input - reset (pcirst#); input - clock running (clkrun#); input - power management event (pme#), output (-pci model) - status change (stschg#), output (-cb model) 3rzhu 'hwhfwlrq dqg 6zlwfklqj vaux enable (vauxen#); output (-pci model) vpci enable (vpcien#); output (-pci model) vpci detect (vpcidet); input vaux detect (vauxdet); input 6huldo ((3520 ,qwhuidfh a serial eeprom is required to store the device id, vendor id, subsystem id, subsystem vendor id, and power management parameters for the pci configuration space header. the eeprom is also required to store the cis table for cardbus designs. the eeprom must be 2048 (128 x 16) bits or larger for pci bus/minipci applications or 4096 (256 x 16) bits or larger for cardbus applications, and be rated at 1mhz (sromclk is 537.6 khz). for example, the following eeproms or equivalent may be used: microchip 93lc66b (256 x 16), 93lc56b (128 x 16), atmel at93c66 (256 x 16), at93c56 (128 x 16). the eeprom is programmable by the pc via the modem. the eeprom interface signals are: serial data input (sromin); input serial data output (sromout); output clock (sromclk); output chip select (sromcs); output /6' ,qwhuidfh 7kurxjk ',% the dib interface signals are: clock and power positive (pwrclkp); output clock and power negative (pwrclkn); output data positive (dib_datap); input/output data negative (dib_datan); input/output 9& ,qwhuidfh 6 0rghov the vc interface signals are: modem sleep (iasleep); output master clock (m_clk); output voice serial clock (v_sclk); input voice serial control (v_ctrl); output voice serial frame sync (v_strobe); input voice serial transmit data (v_txsin); output voice serial receive data (v_rxout); input 7hohskrqh +dqgvhw ,qwhuidfh 6 0rghov the telephone handset interface signals are: voice relay control (voice#); output handset pickup detect (h_pickup); input &doo 3urjuhvv 6shdnhu ,qwhuidfh the call progress speaker interface signal is: digital speaker output (dspkout); output dspkout is a square wave output in data/fax mode used for call progress or carrier monitoring. this output can be optionally connected to a low-cost on-board speaker, e.g., a sounducer, or to an analog speaker circuit. 3'& ,qwhuidfh seven lines are available to support the pdc cellular phone interface. specific signal assignments depend upon the installed cell phone driver. +6' ,qwhuidfh 6ljqdov dqg 3lq $vvljqphqwv the hsd (11242) 100-pin tqfp hardware interface signals are shown by major interface in figure 3, are shown by pin number in figure 4, and are listed by pin number in table 2.
6pduw+6) 0reloh 0rghp 9.ioh[ 0rghp 'hylfh )dplo\ zlwk 6pduw'$$ 7hfkqrorj\ 8 conexant 100474b conexant proprietary information sdxtal1 sdxtal2 clkrun# ad0 ad1 ad2 ad3 ad4 ad5 ad6 ad7 ad8 ad9 ad10 ad11 ad12 ad13 ad14 ad15 ad16 ad17 ad18 ad19 ad20 ad21 ad22 ad23 ad24 ad25 ad26 ad27 ad28 ad29 ad30 ad31 cbe0# cbe1# cbe2# cbe3# pciclk frame# idsel devsel# irdy# trdy# par req# gnt# inta# stop# perr# serr# pme#*/stschg#* pcirst# vio vio 74 75 86 67 66 65 64 62 61 60 59 56 55 54 53 52 51 50 49 37 35 34 33 32 30 29 28 24 23 21 20 19 17 16 15 57 48 38 25 10 39 27 42 40 41 46 13 12 8 43 44 45 14 9 22 26 27pf 5% 28.224 mhz 1m pci bus mini pci/ cardbus sromcs sromclk sromin sromout vpcidet vauxdet vpcien#**/txd** vauxen#**/rxd** tch_frame (gpio3) tch_ rx (gpio4) tch_tx (gpio5) tch_ clk (gpio6) voice#/adp (gpio2) spkmute (gpio8) dspkout (gpio11) h_pickup (gpio10) pwrclkp pwrclkn dib_datap dib_datan iasleep dreset# (gpol0) m_clk v_sclk v_strobe v_txsin v_rxout v_ctrl pllvdd pllvss lp_clk vdd vdd vdd vdd vdd vdd vdd gnd gnd gnd gnd scanen scanmode 76 79 78 77 71 80 69 70 85 83 82 81 100 99 87 88 92 93 91 90 96 95 5 3 1 4 2 6 97 98 84 7 18 31 47 58 68 94 11 36 63 89 72 73 eeprom 100473_f3-1_his 11242 100t power detection and switching circuit host side device ( hsd ) 11242 100-pin tqfp 27pf 5% voice codec ( vc ) 20437 32-pin tqfp +3.3v +3.3v voice relay speaker circuit speaker circuit handset pickup detection circuit digital isolation barrier (dib) 0.1uf 33 txd rxd tch_frame tch_ rx tch_ tx tch_ clk adp pdc phone interface +3.3v sleep por m_clkin m_sck m_strobe m_txsin m_rxout m_cntrlsin vpcidet vauxdet vpcien# vauxen# * pme# supported b y 11242-11 and 11242-31; stschg# supported b y 11242-21. ** vauxen# and vpcien# supported b y 11242-11; rxd and txd supported b y 11242-21 and 11242-31. 240k )ljxuh +6' 3lq 74)3 +dugzduh ,qwhuidfh 6ljqdov
9.ioh[ 0rghp 'hylfh )dplo\ zlwk 6pduw'$$ 7hfkqrorj\ 6pduw+6) 0reloh 0rghp 100474b conexant 9 conexant proprietary information 100473_f3-2_po-11242-100tqfp 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 v_strobe v_rxout v_sclk v_txsin m_clk v_ctrl vdd inta# pcirst# pciclk gnd gnt# req# pme#*/stschg*# ad31 ad30 ad29 vdd ad28 ad27 ad26 vio ad25 ad24 cbe3# sdxtal2 sdxtal1 scanmode scanen vpcidet vauxen#**/rxd** vpcien#**/txd** vdd ad0 ad1 ad2 ad3 gnd ad4 ad5 ad6 ad7 vdd cbe0# ad8 ad9 ad10 ad11 ad12 ad13 voice#/adp (gpio2) spkmute (gpio8) pllvss pllvdd iasleep dreset# (gpol0) vdd pwrclkn pwrclkp dib_datap dib_datan gnd h_pickup (gpio10) dspkout (gpio11) clkrun# tch_frame (gpio3) lp_clk tch_rx (gpio4) tch_tx (gpio5) tch_clk (gpio6) vauxdet sromclk sromin sromout sromcs vio idsel ad23 ad22 ad21 vdd ad20 ad19 ad18 ad17 gnd ad16 cbe2# frame# irdy# trdy# devsel# stop# perr# serr# par vdd cbe1# ad15 ad14 11242 * pme# supported by 11242-11 and 11242-31; stschg# supported by 11242-21. ** vauxen# and vpcien# supported by 11242-11; rxd and txd supported by 11242-21 and 11242-31. )ljxuh +6' 3lq 74)3 3lq 6ljqdov
6pduw+6) 0reloh 0rghp 9.ioh[ 0rghp 'hylfh )dplo\ zlwk 6pduw'$$ 7hfkqrorj\ 10 conexant 100474b conexant proprietary information 7deoh +6' 3lq 74)3 3lq 6ljqdov pin signal label i/o type interface pin signal label i/o type interface 1 v_strobe itpd vc: m_strobe 51 ad13 i/opts pci bus: ad13 2 v_rxout itk vc: m_rxout 52 ad12 i/opts pci bus: ad12 3 v_sclk itpd vc: m_sck 53 ad11 i/opts pci bus: ad11 4 v_txsin ot2 vc: m_txsin 54 ad10 i/opts pci bus: ad10 5 m_clk ot2 vc: m_clkin 55 ad9 i/opts pci bus: ad9 6 v_ctrl ot2 vc: m_cntrlsin 56 ad8 i/opts pci bus: ad8 7 vdd pwr +3.3v 57 cbe0# i/opts pci bus: cbe0# 8 inta# opod pci bus: inta# 58 vdd pwr +3.3v 9 pcirst# ip pci bus: pcirst# 59 ad7 i/opts pci bus: ad7 10 pciclk ip pci bus: pciclk 60 ad6 i/opts pci bus: ad6 11 gnd gnd gnd 61 ad5 i/opts pci bus: ad5 12 gnt# ipts pci bus: gnt# 62 ad4 i/opts pci bus: ad4 13 req# opts pci bus: req# 63 gnd gnd gnd 14 pme#/stschg# opod pci bus: pme# cardbus: stschg# (see note 3) 64 ad3 i/opts pci bus: ad3 15 ad31 i/opts pci bus: ad31 65 ad2 i/opts pci bus: ad2 16 ad30 i/opts pci bus: ad30 66 ad1 i/opts pci bus: ad1 17 ad29 i/opts pci bus: ad29 67 ad0 i/opts pci bus: ad0 18 vdd pwr +3.3v 68 vdd pwr +3.3v 19 ad28 i/opts pci bus: ad28 69 vpcien#/txd ot2 pci bus: pwr detection/switching ckt cell phone: txd (see note 4) 20 ad27 i/opts pci bus: ad27 70 vauxen#/rxd ot2 pci bus: pwr detection/switching ckt cell phone: rxd (see note 4) 21 ad26 i/opts pci bus: ad26 71 vpcidet itpd pwr detection/switching ckt 22 vio pwr pci bus: vi/o 72 scanen itpd gnd 23 ad25 i/opts pci bus: ad25 73 scanmode itpd gnd 24 ad24 i/opts pci bus: ad24 74 sdxtal1 ix crystal or clock circuit 25 cbe3# i/opts pci bus: cbe3# 75 sdxtal2 ox crystal or nc (if sdxtal1 connected to clock circuit) 26 vio pwr pci bus: vi/o 76 sromcs ot2 srom: chip select (cs) 27 idsel ip pci bus: idsel 77 sromout ot2 srom: data in (di) 28 ad23 i/opts pci bus: ad23 78 sromin itpu srom: data out (do) 29 ad22 i/opts pci bus: ad22 79 sromclk ot2 srom: clock (sk) 30 ad21 i/opts pci bus: ad21 80 vauxdet itpd pwr detection/switching ckt 31 vdd pwr +3.3v 81 tch_clk (gpio6) itpu/ot12 cell phone: tch_clk/cel_clk 32 ad20 i/opts pci bus: ad20 82 tch_tx (gpio5) itpu/ot12 cell phone: tch_tx/cel_data 33 ad19 i/opts pci bus: ad19 83 tch_rx (gpio4) itpu/ot12 cell phone: tch_rx/cel_bsy_in 34 ad18 i/opts pci bus: ad18 84 lp_clk rc +3.3v through 240 k w 35 ad17 i/opts pci bus: ad17 85 tch_frame (gpio3) itpu/ot12 cell phone: tch_frame/cel_bsy_out 36 gnd gnd gnd 86 clkrun# i/opod pci bus: clkrun# 37 ad16 i/opts pci bus: ad16 87 dspkout (gpio11) ot12 ai: digital/analog speaker circuit for call progress. 38 cbe2# i/opts pci bus: cbe2# 88 h_pickup (gpio10) itpu line interface: handset pickup detection circuit 39 frame# i/opsts pci bus: frame# 89 gnd gnd gnd 40 irdy# i/opsts pci bus: irdy# 90 dib_datan idd/odd dib: data negative channel 41 trdy# i/opsts pci bus: trdy# 91 dib_datap idd/odd dib: data positive channel 42 devsel# i/opsts pci bus: devsel# 92 pwrclkp odpc dib: pcxfmr primary winding top 43 stop# i/opsts pci bus: stop# 93 pwrclkn odpc dib: pcxfmr primary winding bottom 44 perr# i/opsts pci bus: perr# 94 vdd pwr +3.3v 45 serr# i/opod pci bus: serr# 95 dreset# (gpol0) ot2 vc: por 46 par i/opts pci bus: par 96 iasleep ot2 vc: sleep 47 vdd pwr +3.3v 97 pllvdd pwr +3.3v and to gnd through 0.1 m f 48 cbe1# i/opts pci bus: cbe1# 98 pllvss gnd gnd 49 ad15 i/opts pci bus: ad15 99 spkmute (gpio8) it/ot12 audio circuit: spkr control (output); vaux mode power select (input) 50 ad14 i/opts pci bus: ad14 100 voice# (gpio2) ot12 line interface: voice relay control
9.ioh[ 0rghp 'hylfh )dplo\ zlwk 6pduw'$$ 7hfkqrorj\ 6pduw+6) 0reloh 0rghp 100474b conexant 11 conexant proprietary information 7deoh +6' 3lq 74)3 3lq 6ljqdov &rqwg notes: 1. i/o types i/opod digital input/output, pci, open drain (pci type = o/d) i/opsts digital input/output, pci, sustained tristate (pci type = s/t/s) i/opts digital input/output, pci, tristate (pci type = t/s) idd input, dib, data channel ip digital input, pci, totem pole (pci type = in) ipts digital input, pci, (pci type = t/s) it digital input, ttl-compatible itk digital input, ttl-compatible, internal keeper itpd digital input, ttl-compatible, internal 75k 25k w pull-down itpu digital input, ttl-compatible, internal 75k 25k w pull-up it/ot2 digital input, ttl-compatible/digital output, ttl-compatible, 2 ma, z internal = 120 w it/ot12 digital input, ttl-compatible/digital output, ttl-compatible, 12 ma, z internal = 32 w ix crystal/clock input odpc output, dib power and clock channel odd output, dib data channel ood digital output, open drain opod digital output, pci, open drain (pci type =o/d) opts digital output, pci, tristate (pci type = t/s) ot2 digital output, ttl-compatible, 2 ma, z internal = 120 w ot12 digital output, ttl-compatible, 12 ma, z internal = 32 w ox crystal output 2. interface legend: nc no internal pin connection dib digital isolation barrier vc voice codec 3. pme#/stschg# pin: pme# supported by 11242-11 and 11242-31; stschg# supported by 11242-21. 4. vauxen#/rxd and vpcien#/txd pins: vauxen# and vpcien# supported by 11242-11; rxd and txd supported by 11242-21 and 11242-31. 5. all references to pci bus also apply to minipci and cardbus unless otherwise specified.
6pduw+6) 0reloh 0rghp 9.ioh[ 0rghp 'hylfh )dplo\ zlwk 6pduw'$$ 7hfkqrorj\ 12 conexant 100474b conexant proprietary information 6pduw'$$/6'+dugzduh3lqvdqg 6ljqdov *hqhudo +6' ,qwhuidfh 7kurxjk ',% the dib interface signals are: clock (clk); input digital power (pwr+); input power digital ground (dgnd); digital ground data positive (dib_p); input data negative (dib_n); input 7hohskrqh /lqh ,qwhuidfh the telephone line interface signals are: ring ac coupled (rac1); input tip ac coupled (tac1); input electronic inductor resistor (eir); output tip and ring dc measurement (trdc); input dac output voltage (dac); output electronic inductor capacitor (eic) electronic inductor output (eio) electronic inductor feedback (eif) resistive divider midpoint (dcf) transmit analog output (txa); output receive analog input (rxi); input receiver gain (rxg); output mov enable (moven); output world-wide impedance 0 (zw0); input us impedance 0 (zus0); input transmit feedback (txf); input transmit output (txo); output /6' ,qwhuidfh 6ljqdov dqg 3lq $vvljqphqwv the lsd (20463) 32-pin tqfp hardware interface signals are shown by major interface in figure 5, are shown by pin number in figure 6, and are listed by pin number in table 3.
9.ioh[ 0rghp 'hylfh )dplo\ zlwk 6pduw'$$ 7hfkqrorj\ 6pduw+6) 0reloh 0rghp 100474b conexant 13 conexant proprietary information rac2 tac2 rac1 tac1 eir eic dac trdc eio eif rxi rxg txa moven (gpio1) zw0 zus0 txo txf dcf vref vc rbias gpio2 10 12 9 11 15 2 6 5 21 22 3 4 18 32 14 17 20 19 16 8 7 13 1 100476_f3-3_his 20463 line side device ( lsd ) 20463 32-pin tqfp electronic inductor, off-hook, pulse dial, and tip and ring vi control agnd_lsd safety and emi protection agnd_lsd ring in filter agnd_lsd 0.1uf 0.1uf 10 uf agnd_lsd echo cancellation and receiver impedance matching and transmitter pulse dial voltage protection (country specific) nc 143k agnd_lsd clk pwr+ avdd dvdd dgnd agnd dib_p dib_n por 27 31 24 26 25 23 28 29 30 gnd_lsd 10uf 0.1uf 1k 1k agnd_lsd digital isolation barrier ( dib ) pwrclkp pwrclkn dib_datap dib_datan data channel power and clock channel 10pf (pcxfmr) 10pf 10 0.1uf 100pf 100pf consult applicable reference desi g n for exact components and values. telephone line connector tip ring 6.2v 10 pf 1k dvdd dvdd nc nc )ljxuh /6' 3lq 74)3 +dugzduh ,qwhuidfh 6ljqdov md245f6 po-20463-32t 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 gpio2 eic rxi rxg trdc dac vc vref avdd agnd eif eio txo txf txa zus0 rac1 rac2 tac1 tac2 rbias zw 0 eir dcf m oven (gpio1) pw r+ por dib_n dib_p clk dvdd dgnd 20463 )ljxuh /6' 3lq 74)3 3lq 6ljqdov
6pduw+6) 0reloh 0rghp 9.ioh[ 0rghp 'hylfh )dplo\ zlwk 6pduw'$$ 7hfkqrorj\ 14 conexant 100474b conexant proprietary information 7deoh /6' 3lq 74)3 3lq 6ljqdov pin signal label i/o type interface 1 gpio2 it/ot12 nc 2 eic oa telephone line interface components 3 rxi ia telephone line interface components 4 rxg oa telephone line interface components 5 trdc oa telephone line interface components 6 dac oa telephone line interface components 7 vc ref vref through 0.1 f and to agnd_lsd through 0.1 f 8 vref ref vc through 0.1 f and to agnd_lsd through 10 f 9 rac1 ia ring through 1 m w and 0.033 f 10 rac2 ia nc 11 tac1 ia tip through 1 m w and 0.033 f 12 tac2 ia nc 13 rbias ia agnd_lsd through 143 k w 14 zw0 ia telephone line interface components 15 eir ot12 telephone line interface components 16 dcf ia agnd_lsd 17 zus0 ia telephone line interface components 18 txa oa telephone line interface components 19 txf ia telephone line interface components 20 txo oa telephone line interface components 21 eio oa telephone line interface components 22 eif ia telephone line interface components 23 agnd agnd_lsd agnd_lsd 24 avdd pwr lsd dvdd pin 25 dgnd gnd_lsd dib pcxfmr secondary winding bottom through diode and 10 w in series and to gnd_lsd 26 dvdd pwr lsd avdd pin and to gnd_lsd through 10 f and 0.1 f in parallel 27 clk i dib pcxfmr secondary winding bottom through 10 pf and 1 k w in series and through 10 w shared with lsd dgnd pin through diode 28 dib_p i/o dib line side data positive capacitor through 1 k w 29 dib_n i/o dib line side data negative capacitor through 1 k w 30 por it lsd dvdd pin 31 pwr+ pwr dib pcxfmr secondary winding top and to gnd_lsd through 6.2 v zener diode and 0.1 f in parallel 32 moven (gpio1) ot12 telephone line interface components notes: 1. i/o type: ia analog input it digital input, ttl-compatible oa analog output ot12 digital output, ttl-compatible, 12 ma, z internal = 32 w agnd_lsd isolated lsd analog ground gnd_lsd isolated lsd digital ground 2. interface legend: hsd host side device 3. interface components may vary (see reference design for exact components and values).
9.ioh[ 0rghp 'hylfh )dplo\ zlwk 6pduw'$$ 7hfkqrorj\ 6pduw+6) 0reloh 0rghp 100474b conexant 15 conexant proprietary information 9&+dugzduh3lqvdqg6ljqdov60rghov *hqhudo microphone and analog speaker interface signals, as well as telephone handset/headset interface signals are provided to support functions such as speakerphone mode, telephone emulation, microphone voice record, speaker voice playback, and call progress monitor. 6shdnhuskrqh ,qwhuidfh the following signals are supported: speaker out (m_spkr_out); analog output - should be used in speakerphone designs where sound quality is important microphone (m_mic_in); analog input 7hohskrqh +dqgvhw+hdgvhw ,qwhuidfh the following interface signals are supported: telephone input (m_line_in), input (telin) Coptional connection to a telephone handset interface circuit telephone output (m_line_outp); output (telout) - optional connection to a telephone handset interface circuit center voltage (vc); output reference voltage +6' ,qwhuidfh the following interface signals are supported: reset (por); input sleep (sleep); input master clock (m_clkin); input serial clock (m_sck); output control (m_cntrlsin); input serial frame sync (m_strobe); output serial transmit data (m_txsin); input serial receive data (m_rxout); output 9& ,qwhuidfh 6ljqdov dqg 3lq $vvljqphqwv the vc (20437) 32-pin tqfp hardware interface signals are shown by major interface in figure 7, are shown by pin number in figure 8, and are listed by pin number in table 4.
6pduw+6) 0reloh 0rghp 9.ioh[ 0rghp 'hylfh )dplo\ zlwk 6pduw'$$ 7hfkqrorj\ 16 conexant 100474b conexant proprietary information md241f7 20437-his voice codec (vc) 20437 32-pin tqfp audio circuit nc spk out mic telin telout host side device (hsd) +3.3v vaa (+3.3v) 1 4 19 21 23 20 22 18 17 25 5 28 26 6 27 iasleep dreset# m_clk v_sclk v_strobe v_txsin v_rxout v_ctrl sleep por m_clkin m_sck m_strobe m_txsin m_rxout m_cntrlsin vdd vdd mavdd vss set3v_bar2 mavss vsub m_dig_speaker m_mic_in m_spkr_out m_line_in m_line_outp m_line_outm vref vc m_mic_bias m_relaya m_relayb m_act90 m_1bit_out d_lpbk_bar nc nc nc 2 13 3 14 9 10 11 12 15 24 16 29 30 31 7 8 32 0.1 agnd 10 0.1 10 nc handset interface nc agnd gnd ferrite ferrite vc_hand )ljxuh 9& 3lq 74)3 +dugzduh ,qwhuidfh 6ljqdov md241f8 po-20437_32t 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 sleep m_dig_speaker m_spkr_out por mavdd mavss nc nc m_relaya m_strobe m_rxout m_sck m_txsin m_clkin m_cntrlsin vdd m_line_outp m_line_outm vref vc m_mic_in m_line_in m_mic_bias m_relayb nc d_lpbk_bar m_1bit_out m_act90 vss vsub set3v_bar2 vdd 20437 )ljxuh 9& 3lq 74)3 3lq 6ljqdov
9.ioh[ 0rghp 'hylfh )dplo\ zlwk 6pduw'$$ 7hfkqrorj\ 6pduw+6) 0reloh 0rghp 100474b conexant 17 conexant proprietary information 7deoh 9& 3lq 74)3 3lq 6ljqdov pin signal label i/o i/o type interface 1 sleep i itpd hsd: iasleep 2 m_dig_speaker o ot2 nc 3 m_spkr_out o oa speaker interface circuit 4 por i itpu hsd: dreset# 5 mavdd pwr vaa (+3.3v) 6 mavss agnd agnd 7nc nc 8nc nc 9 m_line_outp (telout) o oa handset interface circuit 10 m_line_outm o oa nc 11 vref ref vc through capacitors 12 vc ref agnd through ferrite bead and capacitors and to and to handset interface circuit (vc_hand) through ferrite bead 13 m_mic_in i ia microphone interface circuit 14 m_line_in (telin) i ia handset interface circuit 15 m_mic_bias nc 16 m_relayb nc 17 vdd pwr +3.3v 18 m_cntrlsin i itpd hsd: v_ctrl 19 m_clkin i itpd hsd: m_clk 20 m_txsin i itpd hsd: v_txsin 21 m_sck o ot2 hsd: v_sclk 22 m_rxout o ot2 hsd: v_rxout 23 m_strobe o ot2 hsd: v_strobe 24 m_relaya o ot2od nc 25 vdd pwr +3.3v 26 m_set3v_bar2 i itpu gnd 27 vsub agnd agnd 28 vss gnd gnd 29 m_act90 i itpu nc 30 m_1bit_out o ot2 nc 31 d_lpbk_bar i itpu nc 32 nc nc notes: 1. i/o types: ia analog input it digital input, ttl-compatible itpd digital input, ttl-compatible, internal 75k 25k w pull-down itpu digital input, ttl-compatible, internal 75k 25k w pull-up it/ot2 digital input, ttl-compatible/digital output, ttl-compatible, 2 ma, z internal = 120 w it/ot12 digital input, ttl-compatible/digital output, ttl-compatible, 12 ma, z internal = 32 w oa analog output ot2 digital output, ttl-compatible, 2 ma, z internal = 120 w ot12 digital output, ttl-compatible, 12 ma, z internal = 32 w agnd analog ground gnd digital ground 2. interface legend: hsd host side device
6pduw+6) 0reloh 0rghp 9.ioh[ 0rghp 'hylfh )dplo\ zlwk 6pduw'$$ 7hfkqrorj\ 18 conexant 100474b conexant proprietary information (ohfwulfdodqg(qylurqphqwdo6shflilfdwlrqv the operating conditions are specified in table 5. the absolute maximum ratings are listed in table 6. the current and power requirements are listed in table 7. 7deoh 2shudwlqj &rqglwlrqv parameter symbol limits units supply voltage v dd +3.0 to +3.6 vdc operating temperature range t a 0 to +70 c 7deoh $evroxwh 0d[lpxp 5dwlqjv parameter symbol limits units supply voltage v dd -0.5 to +4.0 vdc input voltage v in -0.5 to (vio +0.5)* vdc storage temperature range t stg -55 to +125 c analog inputs v in -0.3 to (mavdd + 0.5) vdc voltage applied to outputs in high impedance (off) state v hz -0.5 to (vio +0.5)* vdc dc input clamp current i ik 20 ma dc output clamp current i ok 20 ma static discharge voltage (25c) v esd 2500 vdc latch-up current (25c) i trig 400 ma * vio = +3.3v 0.3v or +5v 5%.
9.ioh[ 0rghp 'hylfh )dplo\ zlwk 6pduw'$$ 7hfkqrorj\ 6pduw+6) 0reloh 0rghp 100474b conexant 19 conexant proprietary information 7deoh &xuuhqw dqg 3rzhu 5htxluhphqwv conditions current power hsd (11242) + lsd (20463) device state (dx) and bus state (bx) pci bus power pci clock (pciclk) line connection typical current (ma) maximum current (ma) typical power (mw) maximum power (mw) d0, b0 on running yes 45.4 50.0 150 180 d0, b0 on running no 11.8 13.0 39.0 46.7 d3, b0 on running no 11.8 13.0 39.0 46.7 d3, b1 on running no 11.8 13.0 39.0 46.7 d3, b2, b3 (d3hot) on stopped no 11.8 13.0 39.0 46.7 d3, b3 (d3cold) off stopped no 1.9 2.1 6.3 7.6 notes: operating voltage: vdd = +3.3v 0.3v. test conditions: vdd = +3.3 vdc for typical values; vdd = +3.6 vdc for maximum values. definitions: pci bus power on: pci bus +5v and +3.3v on (modem normally powered by +3.3v from pci bus +3.3v or regulated down from pci bus +5v); pcirst# not asserted. off: pci bus +5v and +3.3v off (modem normally powered by +3.3v from vaux or vpci); pcirst# asserted. minipci bus power on: pci bus +3.3v on (modem normally powered by +3.3v from pci bus +3.3v; pcirst# not asserted. off: pci bus +3.3v off (modem normally powered by +3.3v from vaux or vpci); pcirst# asserted. cardbus power on: cardbus +3.3v on (modem normally powered by cardbus +3.3v). off: cardbus +3.3v off (modem normally powered by cardbus +3.3v). pci clock (pciclk) running: pci bus signal pciclk running (pci bus and minipci bus only). stopped: pci bus signal pciclk stopped (off) (pci bus and minipci bus only). line connection: yes: off-hook, ia powered. no: on-hook, ia powered down. device states: d3: low power state. suspend state can change the system power state; the resulting power state depends on the system architecture (os, bios, hardware) and system configuration (i.e., other pci installed cards). d0: full power state. device and bus states: d0, b0: any pci transaction, pciclk running, vcc present. d3, b1: no pci bus transactions, pciclk running, vcc present. d3, b2, b3: no pci transactions, pciclk stopped, vcc may be present. d3, b3: no pci transactions, pciclk stopped, no vcc. refer to the pci bus power management interface specification for additional information.
6pduw+6) 0reloh 0rghp 9.ioh[ 0rghp 'hylfh )dplo\ zlwk 6pduw'$$ 7hfkqrorj\ 20 conexant 100474b conexant proprietary information 3dfndjh'lphqvlrqv the package dimensions are shown in figure 9 (100-pin tqfp) and figure 10 (32-pin tqfp). detail a coplanarity = 0.08 max. 0.60 +0.15, -0.10 0.14 .03 16.00 0.15 16.00 0.15 14.00 0.05 12.00 ref 12.00 ref 14.00 0.05 pin 1 ref 13.87 0.05 14.00 0.05 1.00 ref 1.00 .05 0.50 ref 13.87 0.05 14.00 0.05 0.500 bsc 0.22 0.05 ref. 100-pin tqfp (gp00-d530) pd-tqfp-100-d530 (032699) detail a 0.10 .05 )ljxuh 3dfndjh 'lphqvlrqv 3lq 74)3
9.ioh[ 0rghp 'hylfh )dplo\ zlwk 6pduw'$$ 7hfkqrorj\ 6pduw+6) 0reloh 0rghp 100474b conexant 21 conexant proprietary information detail a a1 l1 c l a d1 a2 millimeters 0.05 8.75 0.5 0.30 0.13 1.6 max 0.15 1.4 ref 9.25 7.0 ref 5.6 ref 0.75 1.0 ref 0.80 bsc 0.40 0.19 0.10 max 0.0020 0.3445 0.0197 0.0118 0.0051 a a1 a2 d d1 d2 l l1 e b c coplanarity min. max. min. max. inches* dim. ref: 32-pin tqfp (gp00-d262) * metric values (millimeters) should be used for pcb layout. english values (inches) are converted from metric values and may include round-off errors. 0.0630 max 0.0059 0.0551 ref 0.3642 0.2756 ref 0.2205 ref 0.0295 0.0394 ref 0.0315 bsc 0.0157 0.0075 0.004 max pd-tqfp-32 (040395) detail a d1 e b d d2 d1 d1 d d2 pin 1 ref )ljxuh 3dfndjh 'lphqvlrqv 3lq 74)3
further information literature@conexant.com 1-800-854-8099 (north america) 33-14-906-3980 (international) web site www.conexant.com world headquarters conexant systems, inc. 4311 jamboree road p. o. box c newport beach, ca 92658-8902 phone: ( 949) 483-4600 fax: (949) 483-6375 u.s. florida/south america phone: ( 727) 799-8406 fax: (727) 799-8306 u.s. los angeles phone: ( 805) 376-0559 fax: (805) 376-8180 u.s. mid-atlantic phone: ( 215) 244-6784 fax: (215) 244-9292 u.s. north central phone: ( 630) 773-3454 fax: (630) 773-3907 u.s. northeast phone: ( 978) 692-7660 fax: (978) 692-8185 u.s. northwest/pacific west phone: ( 408) 249-9696 fax: (408) 249-7113 u . s. south central phone: ( 972) 733-0723 fax: (972) 407-0639 u.s. southeast phone: ( 919) 858-9110 fax: (919) 858-8669 u.s. southwest phone: ( 949) 483-9119 fax: (949) 483-9090 apac headquarters conexant systems singapore, pte. ltd. 1 kim seng promenade great world city #09-01 east tower singapore 237994 phone: (65) 737 7355 fax: (65) 737 9077 australia phone: (61 2) 9869 4088 fax: (61 2) 9869 4077 china phone: (86 2) 6361 2515 fax: (86 2) 6361 2516 hong kong phone: ( 852) 2827 0181 fax: (852) 2827 6488 india phone: (91 11) 692 4780 fax: (91 11) 692 4712 korea phone: (82 2) 565 2880 fax: (82 2) 565 1440 phone: (82 53) 745 2880 fax: (82 53) 745 1440 europe headquarters conexant systems france les taissounieres b1 1681 route des dolines bp 283 06905 sophia antipolis cedex france phone: (33 1) 41 44 36 50 fax: (33 4) 93 00 33 03 europe central phone: (49 89) 829 1320 fax: (49 89) 834 2734 europe mediterranean phone: (39 02) 9317 9911 fax: (39 02) 9317 9913 europe north phone: (44 1344) 486 444 fax: (44 1344) 486 555 europe south phone: (33 1) 41 44 36 50 fax: (33 1) 41 44 36 90 middle east headquarters conexant systems commercial (israel) ltd. p. o. box 12660 herzlia 46733, israel phone: ( 972 9) 952 4064 fax: (972 9) 951 3924 japan headquarters conexant systems japan co., ltd. shimomoto building 1-46-3 hatsudai, shibuya-ku, tokyo 151-0061 japan phone: (81 3) 5371-1567 fax: (81 3) 5371-1501 taiwan headquarters conexant systems, taiwan co., ltd. room 2808 international trade building 333 keelung road, section 1 taipei 110, taiwan, roc phone: ( 886 2) 2720 0282 fax: (886 2) 2757 6760 so990810(v1.3)

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