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eup8060x ds8060x v e r 1.0 may 2008 1 1a li-ion/polymer charger ic with thermal regulation and ovp description the eu p806 0x series are hi ghly integrated single cell li-ion/polymer battery charger ic designed for handheld devices. the eup8060x integrates internal power fet, current sensor, charge status, reverse current protection and overvoltage protection (ovp) in a single monolithic devices. when ac-adapter is applied, an external resistor sets the magnitude of the charge current, which may be programmed up to 1a. thermal feedback also regulates the charge current to limit the die temperature when fast charging or while exposed to high ambient temperature. the eup8060x charges the battery in three phases: conditioning, constant current, and constant voltage. charge is terminated based on minimum current. an internal charge timer provides a backup safety for charge termination. the eup8060x can operate in an ldo mode which is used primary during system level testing of the handset to eliminate the need for battery insertion. the eup8060x automatically re-starts the charge if the battery voltage falls below an internal threshold. the eup8060x also automatically enters sleep mode when dc supplies are removed. no external sense resistor or blocking diode is required for charging. typical application cir cuit features z program mable charge current up to 1a z 1% vo l tage regulation accuracy z thermal regulation to maximize charge rate z input overvoltage protection: 6.6v and 11v options z charge termination by minimum current and time z precharge conditioning with safety timer z status outputs to indicate charge, fault, and power good outputs z reverse leakage protection prevents battery drainage z short-circuit and thermal protection z automatic sleep mode for low power consumption z ldo mode operation for system level testing without battery insertion z 3mm 3mm tdfn package z rohs compliant and 100% lead (pb)-free applicat ions z mobile pho ne, pda, mp3 players, digital cameras z mobile internet devices (m1d) figure 1. eup8060b v?mw`r?y?b? w w w . g o f o t e c h . c o m
eup8060x ds8060x ver 1.0 may 2008 2 block diagram figure 2. block diagram n ~n?t?m?w3^v?mw`r?y?b?g ?pqls? tel: 0755-8398 3377 / 135 9011 2223 http://www.gofotech.com v?mw`r?y?b? w w w . g o f o t e c h . c o m eup8060x ds8060x ver 1.0 may 2008 3 pin configurations package type pin configurations package type pin configurations eup8060a/d tdfn-10 eup8060b tdfn-10 eup8060c tdfn-10 pin description pin a,d b c i/o description in 1 1 1 i charge input voltage and internal supply. connect a 1- f (minimum) capacitor from in to vss. c in c out tmr 2 2 2 i safety timer program input, timer disabled if floating. connect a resistor to vss pin to program safety timer timeout value stat1 3 3 3 o charge status output 1 (open-collector, see table 3) stat2 4 4 4 o charge status output 2 (open-collector, see table 3) vss 5 5 5 i ground iset 6 6 6 o charge current set point, resistor connected from iset to vss sets charge current value. connect a 0.47-f capacitor from bat to iset. pg 7 7 o power good status output (open-collector), active low ce 8 7 i charge enable input. ce = lo enables charger. ce = hi disables charger. te 8 i termination enable input. te = lo enables termination detection and battery absent detection. te = hi disables termination detection and battery absent detection. ts 8 i temperature sense input, connect to battery pack thermistor. connect an external resistive divider to program temperature thresholds. bat 9 9 9 i battery voltage sense input. connect to the battery positive terminal. connect a 200 ? resistor from bat to out. out 10 10 10 o charge current output. connect to the battery positive terminal. connect a 1-f (minimum) capacitor from out to vss. n ~n?t?m?w3^v?mw`r?y?b?g ?pqls? tel: 0755-8398 3377 / 135 9011 2223 http://www.gofotech.com v?mw`r?y?b? w w w . g o f o t e c h . c o m eup8060x ds8060x ver 1.0 may 2008 4 ordering information order number package type marking operating temperature range eup8060ajir1 tdfn-10 xxxxx 8060a -40 c to 85c EUP8060BJIR1 tdfn-10 xxxxx 8060b -40 c to 85c eup8060cjir1 tdfn-10 xxxxx 8060c -40 c to 85c eup8060djir1 tdfn-10 xxxxx 8060d -40 c to 85c eup8060x ?? ?? ?? ?? lead free code 1: lead free 0: lead packing r: tape & reel operating temperature range i: industry standard package type j: tdfn n ~n?t?m?w3^v?mw`r?y?b?g ?pqls? tel: 0755-8398 3377 / 135 9011 2223 http://www.gofotech.com v?mw`r?y?b? w w w . g o f o t e c h . c o m eup8060x ds8060x ver 1.0 may 2008 5 absolute maximum ratings ? supply voltage (in with resp ect to vss )----------------------------------------------------------- -0.3v to18v ? input voltage on in, statx, pg , ts, ce , te (all with respect to vss) --------------------- -0.3v to vin ? input voltage on out,bat,iset,tmr (all with respect to vss) ------------------------------ -0.3v to 7v ? output sink current (statx)+pg ------------------------------------------------------------------ 15ma ? output current (out pin) ------------------------------- --------------------------------------------- 1.5a ? junction temperature range, t j ------------------------------------------------------------------------- 150c ? storage temperature range, tstg ------------------------------------------------------------- -65c to 150c ? lead temperature (soldering, 10s) -------------------------------------------------------------------- 260c dissipation ratings package c ja t a < 40c power rating derating factor above t a = 25c tdfn-10 48c/w 1.5w 0.0208 w/c recommended operating conditions min. max. unit supply voltage, v in 4.35 16.5 v operating junction temperature range, t j -40 125 c electrical characteristics over recommended operating, t j = 0~125c range, see the application circuits section, typical values at t j = 25c (unless otherwise noted). eup8060x symbole parameter test conditions min typ max unit power down threshold ? undervoltage lockout v (uvlo) power down threshold increase v(in): 0 ? 4 v 1.5 3.5 v input power detection, ce = hi or low, v(in) > 3.5 v v in(dt) input power detection threshold v (in) detected at [v(in) ? v(out)] > v in(dt) 180 mv v hys(indt) input power detection hysteresis input power not detected at [v (in) ? v (out) ] < [v in(dt) ? v hys(indt) ] 30 mv t dgl(indt1) deglitch time, input power detected status pg :hi ? lo, thermal regulation loop not active, r tmr = 50 k or v (tmr) = open 1.5 3.5 ms t dgl(noin) delay time, input power not detected status pg : lo ? hi after t dgl(noin) 10 s t dly(chgoff) charger off delay charger turned off after t dly(chgoff) , measured from pg : lo ? hi; timer reset after t dly(chgoff) 28 32 ms input overvoltage protection eup8060a/b/c 6.2 6.6 7.0 v (ovp) input overvoltage detection threshold v(in) increasing eup8060d 10.2 11 11.7 v eup8060a/b/c 30 mv v hys(ovp) input overvoltage hysteresis v(in) decreasing eup8060d 30 mv t dgl(ovdet) input overvoltage detection delay ce = hi or lo, measured from v(in) > v (ovp) to pg : lo ? hi; vin increasing 10 100 s t dgl(ovndet) input overvoltage not detected delay ce = hi or lo, measured from v(in) < v (ovp) to pg : hi ? lo; vin decreasing 10 100 s n ~n?t?m?w3^v?mw`r?y?b?g ?pqls? tel: 0755-8398 3377 / 135 9011 2223 http://www.gofotech.com v?mw`r?y?b? w w w . g o f o t e c h . c o m eup8060x ds8060x ver 1.0 may 2008 6 electrical characteristics over recommended operating, t j = 0~125c range, see the application circuits section, typical values at t j = 25c (unless otherwise noted). eup8060x symbole parameter test conditions min typ max unit quiescent current v (in) = 6 v 50 200 i cc(chgoff) in pin quiescent current, charger off input power detected, ce = hi v (in) = 16.5 v 250 a i cc(chgon) in pin quiescent current, charger on input power detected, ce = lo, v bat = 4.5 v 0.7 1.5 ma i bat(done) battery leakage current after termination into ic input power detected, charge terminated, ce = lo 1 5 a i bat(chgoff) battery leakage current into ic, charger off input power detected, ce = hi or input power not detected, ce = lo 1 5 a ts pin comparator v (ts1) lower voltage temperature threshold hot detected at v(ts) < v (ts1) ; ntc thermistor 29 30 31 %v(in) v (ts2) upper voltage temperature threshold cold detected at v(ts) > v( ts2) ; ntc thermistor 57 58 59 %v(in) v hys(ts) hysteresis temp ok at v(ts) > [ v (ts1) + v hys(ts) ] or v (ts) < [ v (ts2) ? v hys(ts) ] 2 %v(in) ce input v il input (low) voltage v( ce ) increasing 0 1 v ih input (high) voltage v( ce ) decreasing 2.0 v stat1, stat2 and pg outputs , v(in) ?y vo(reg) + v(do-max) v ol output (low) saturation voltage ioutput = 5 ma (sink) 1.2 v thermal shutdown t (shut) temperature trip junction temperature, temp rising 155 c t (shuthys) thermal hysteresis junction temperature 20 c voltage regulation, v(in) ?y vo(reg) + v(do-max), i(term) < i(out) < io(out), charger enabled, no fault conditions detected v o(reg) output voltage eup8060a/b/c/d 4.20 v v o(tol) voltage regulation accuracy ?1% 1% v (do) dropout voltage, v(in) ? v(out) i (out) = 1 a 800 mv current regulation , v(in) > v(out) > v(do-max), charger enabled, no fault conditions detected i o(out) output current range v (bat) > v (lowv) , i o(out) = i (out) = k (set) v (set) /r set 100 1000 ma v (set) output current set voltage v(iset) = v (set) , v (lowv) < v(bat) ? v o(reg) 2.45 2.50 2.55 v k (set) output current set factor 100 ma ? i o(out) ? 1000 ma ma k ? volts 325 445 r iset external resistor range resistor connected to iset pin 0.7 10 k ? voltage and current regulation timing, v(in) > v(out) + v(do-max), charger enabled, no fault conditionsdetected, rtmr = 50k or v(tmr) = open; thermal regulation loop not active t pwrup(chg) input power detection to full charge current time delay measured from pg :hi ? lo to i(out) > 100 ma, ce = lo, i o(out) = 1 a, v(bat) = 3.5 v 25 35 ms t pwrup(en) charge enable to full charge current delay measured from ce :hi ? lo to i(out) >100 ma, i o(out) = 1a, v (bat) = 3.5 v, v (in) = 4.5 v, input power detected 25 35 ms t pwrup(ldo) input power detection to voltage regulation delay, ldo mode set, no battery or load connected measured from pg :hi ? lo to v(out) > 90% of charge voltage regulation; v (tmr) = open, ldo mode set, no battery and no load at out pin, ce = lo 25 35 ms precharge and output short-circuit current regulation, v(in)?v(out) > v(do-max) , v(in) 4.5v, charger enabled, no fault conditio ns detected, rtmr = 50k or v(tmr)=open; thermal regulation loop not active v (lowv) precharge to fast-charge transition threshold v (bat) increasing 2.8 2.95 3.15 v v (sc) precharge to short-circuit transition threshold v (bat) decreasing 1.2 1.4 1.6 v n ~n?t?m?w3^v?mw`r?y?b?g ?pqls? tel: 0755-8398 3377 / 135 9011 2223 http://www.gofotech.com v?mw`r?y?b? w w w . g o f o t e c h . c o m eup8060x ds8060x ver 1.0 may 2008 7 electrical characteristics over recommended operating, t j = 0~125c range, see the application circuits section, typical values at t j = 25c (unless otherwise noted). eup8060x symbole parameter test conditions min typ max unit precharge and output short-circuit current regulation, v(in)?v(out) > v(do-max) , v(in) 4.5v, charger enabled, no fault conditio ns detected, rtmr = 50k or v(tmr)=open; thermal regulation loop not active v (scind) short-circuit indication v (bat) decreasing 1.6 1.8 2.0 v i o(prechg) precharge current range v(sc) < vi(bat) < v(lowv), t < t(prechg) io(prechg) = k(set) v(prechg)/r(iset) 10 100 ma v (prechg) precharge set voltage v (iset) = v (prechg) , v (sc) < v i(bat) < v (lowv) , t < t (prechg) 225 250 280 mv v por < v in < 6.0v 15 22 30 i o(short) output shorted regulation current v ss ? v (bat) ? v (sci) , i o(short) = i (out) , v (bat) =vss 6.0 v < v in eup8060x ds8060x ver 1.0 may 2008 8 2.0 2.2 2.4 2.6 2.8 3.0 98 99 100 101 102 103 104 105 106 107 pre-charge current vs battery voltage 85 o c 25 o c 0 o c charge current - ma battery voltage -v typical operating characteristics figure3. figure5. figure7. figure4. figure6. figure8. n ~n?t?m?w3^v?mw`r?y?b?g ?pqls? tel: 0755-8398 3377 / 135 9011 2223 http://www.gofotech.com v?mw`r?y?b? w w w . g o f o t e c h . c o m eup8060x ds8060x ver 1.0 may 2008 9 3.0 3.2 3.4 3.6 3.8 4.0 950 960 970 980 990 1000 1010 1020 85 o c 25 o c 0 o c fast-charge current vs battery voltage charge current - ma battery voltage -v figure9. figure11. figure13. figure10. figure12. figure14. 3 . 03 . 23 . 43 . 63 . 84 . 0 50.50 50.75 51.00 51.25 51.50 fast-charge current vs battery voltage 85 o c 25 o c 0 o c charge current - ma battery voltage -v 0 100 200 300 400 500 600 700 800 900 1000 1100 340 360 380 400 420 440 85 o c 25 o c 0 o c kset linearity vs charge current kset - a/a battery charge current - ma 4567891011 4.240 4.245 4.250 4.255 battery regulation voltage vs input voltage 85 o c 25 o c 0 o c battery voltage - v input voltage - v -20 0 20 40 60 80 100 120 0.24 0.26 0.28 0.30 0.32 0.34 0.36 dropout voltage vs temperature v(do) - dropout voltage - v ta - temperature - o c 20 30 40 50 60 70 80 90 100 110 390 400 410 420 430 440 450 460 kset linearity vs charge current 85 o c 25 o c 0 o c kset - a/a battery charge current - ma n ~n?t?m?w3^v?mw`r?y?b?g ?pqls? tel: 0755-8398 3377 / 135 9011 2223 http://www.gofotech.com v?mw`r?y?b? w w w . g o f o t e c h . c o m eup8060x ds8060x ver 1.0 may 2008 10 state machine diagram figure 15. operational flow chart n ~n?t?m?w3^v?mw`r?y?b?g ?pqls? tel: 0755-8398 3377 / 135 9011 2223 http://www.gofotech.com v?mw`r?y?b? w w w . g o f o t e c h . c o m eup8060x ds8060x ver 1.0 may 2008 11 typical application note: temp window set between 0 j and 45 j for application w/ts pin. figure 16. application circuit n ~n?t?m?w3^v?mw`r?y?b?g ?pqls? tel: 0755-8398 3377 / 135 9011 2223 http://www.gofotech.com v?mw`r?y?b? w w w . g o f o t e c h . c o m eup8060x ds8060x ver 1.0 may 2008 12 functional description the charge current is programmable using external components (r iset resistor). a typical charge profile is shown below, for an operation condition that does not cause the ic junction temperature to exceed t j(reg) , (112 j typical). figure 17.charging profile within t j(reg) if the operating conditions cause the ic junction temperature to exceed t j(reg), the charge cycle is modified, with the activation of the integrated thermal control loop. the thermal control loop is activated when an internal voltage reference, which is inversely proportional to the ic junction temperature, is lower than a fixed, temperature stable internal voltage. the thermal loop overrides the other charger control loops and reduces the charge current until the ic junction temperature returns to t j(reg) , effectively regulating the ic junction temperature. a modified charge cycle, with the thermal loop active, is shown in figure 18. figure 18.charging profile ,thermal loop active operating modes power down the eup8060x family is in a power-down mode when the input power voltage (in) is below the power-down threshold v (uvlo) . during the power down mode all ic functions are off, and the host commands at the control pins are not interpreted. the status output pins stat1 and stat2 are set to high impedance mode and pg output is set to the high impedance state. sleep mode the eup8060x enters the sl eep mode when the input power voltage (in) is above the power down threshold v (uvlo) but still lower than the input power detection threshold, v(in) < v(out) + v in(dt) . during the sleep mode the charger is off, and the host commands at the control pins are not interpreted. the status output pins stat1 and stat2 are set to the high impedance state and the pg output indicates input power not detected. the sleep mode is entered from any other state, if the input power (in) is not detected. overvoltage lockout the input power is detected when the input voltage v(in) > v(out) + v in(dt) . the eup8060x transitions from the sleep mode to the power-on-reset mode. in this mode of operation an internal timer t (por) is started. until the timer expires the stat1 and stat2 outputs indicate charger off, and the pg output indicates the input power status as not detected. at the end of the power-on -reset delay. the stat1, stat2 and pg pins are active. stand-by mode in the eup8060b/c the stand-by mode is started at the end of the power-on-reset phase, if the input power is detected and ce = hi. in the stand-by mode selected blocks in the ic are operational, and the control logic monitors system status and control pins to define if the charger will set to on or off mode. the quiescent current required in stand-by mode is 50 a typical. if the ce pin is not available the eup8060x enters the begin charge mode at the end of the power-on-reset phase. begin charge mode all blocks in the ic are powered up, and the eup8060x is ready to start charging the battery pack. a new charge cycle is started when the control logic decides that all conditions required to enable a new charge cycle are met. during the begin charge phase all timers are reset, after that the ic enters the charging mode. charge mode when the charging mode is active the eup8060x executes the charging algorithm, as described in the operational flow chart, figure 15. n ~n?t?m?w3^v?mw`r?y?b?g ?pqls? tel: 0755-8398 3377 / 135 9011 2223 http://www.gofotech.com v?mw`r?y?b? w w w . g o f o t e c h . c o m eup8060x ds8060x ver 1.0 may 2008 13 suspend mode the suspend mode is entered when the pack temperature is not within the valid temperature range. during the suspend mode the charger is set to off, but the timers are not reset. the normal charging mode resumes when the pack temperature is within range. ldo mode operation the ldo mode (tmr pin open circuit) disables the charging termination circuit, disables the battery detect routine and holds the safety timer clock in reset. this is often used for operation without a battery or in production testing. the out pin current can be monitored via the iset pin. if in ldo mode without a battery present, it is recommended that a 200 ? feedback resistor,r8, be used, see figure 16. control logic overview an external host can enable or disable the charging process using a dedicated control pin, ce . a low-level signal on this pin enables the charge, and a high-level signal disables the charge. the eup8060x is in stand-by mode with ce = hi. when the charger function is enabled ( ce = lo) a new charge is initiated. table 1 describes the charger control logic operation, in eup8060x versions without the ts pin the pack temp status is internally set to ok. in both standby and suspend modes the charge process is disabled. in the standby mode all timers are reset; in suspend mode the timers are held at the count stored when the suspend mode was set. the timer fault, termination and output short circuit variables shown in the control logic table are latched in the detection circuits, outside the control logic. refer to the timers, termination and short circuit protection sections for additional details on how those latched variables are reset. temperature qualification (applies only to versions with ts pin option) the eup8060x continuously monitors battery temperature by measuring the voltage between the ts and vss pins. an internal current source provides the bias for most common 10-k [ negative-temperature coefficient thermistors (ntc). the device compares the voltage on the ts pin against the internal v (ltf) and v (htf) thresholds to determine if charging is allowed. once a temperature outside the v (ltf) and v (htf) thresholds is detected the device immediately suspend the charge. the device suspend charge by turning off the power fet and holding the timer value (i.e. timers are not reset). charge is resumed when the temperature returns to the normal range. however the user may modify these thresholds by adding two external resistors. see figure 16. input overvoltage detectio n, power good status output the input power detection status for pin in is shown at the open collector output pin pg . table 2. input power detection status input power detection (in) pg state not detected high impedance detected, no overvoltage lo detected, overvoltage high impedance the eup8060x detects an in put overvoltage when v(in) > v (ovp) . the charger function is turned off and the eup8060x is set to standby mode of operation. the ovp detection is not latched, and the ic returns to normal operation when the fault condition is removed. table 1. control logic functionality eup8060x operation mode ce input power timer fault (latched) output short circuit termi -nation (latched) pack temp thermal shutdown power down charger power stage power down lo low x x x x x yes off sleep x not detected x x x x x no off standby hi detected x x x x x no off lo detected x yes x x x no lo detected no no yes x x no off lo detected yes no no x x no ifault lo detected no no yes absent t j |