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mosfet metaloxidesemiconductorfieldeffecttransistor coolmos?cfd2650vthinpak 650vcoolmos?cfd2powertransistor IPL65R210CFD datasheet rev.2.0 final industrial&multimarket
2 650vcoolmos?cfd2powertransistor IPL65R210CFD rev.2.0,2014-03-19 final data sheet thinpak8x8 1description coolmos?isarevolutionarytechnologyforhighvoltagepower mosfets,designedaccordingtothesuperjunction(sj)principleand pioneeredbyinfineontechnologies.650vcoolmos?cfd2series combinestheexperienceoftheleadingsjmosfetsupplierwithhigh classinnovation.theresultingdevicesprovideallbenefitsofafast switchingsjmosfetwhileofferinganextremelyfastandrobustbody diode.thiscombinationofextremelylowswitching,commutationand conductionlossestogetherwithhighestrobustnessmakeespecially resonantswitchingapplicationsmorereliable,moreefficient,lighterand cooler. thinpak thinpakisaanewleadlesssmdpackageforhvmosfets.thenew packagehasaverysmallfootprintofonly64mm2(vs.150mm2forthe d2pak)andaverylowprofilewithonly1mmheight(vs.4.4mmforthe d2pak).thesignificantlysmallerpackagesize,combinedwithbenchmark lowparasiticinductances,providesdesignerswithanewandeffectiveway todecreasesystemsolutionsizeinpower-densitydrivendesigns. features ?reducedboardspaceconsumption ?increasedpowerdensity ?shortcommutationloop ?smoothswitchingwaveform ?ultra-fastbodydiode ?veryhighcommutationruggedness ?extremelylowlossesduetoverylowfomrdson*qgandeoss ?easytouse/drive ?qualifiedforindustrialgradeapplicationsaccordingtojedec (j-std20andjesd22) ?pb-freeplating,halogenfreemoldcompound applications 650vcoolmos?cfd2isespeciallysuitableforresonantswitching stagesfore.g.pcsilverbox,lcdtv,lighting,serverandtelecom. table1keyperformanceparameters parameter value unit v ds @ t j max 700 v rds(on),max 0.21 w qg,typ 68 nc id,pulse 53 a eoss @ 400v 5.7 j body diode di/dt 900 a/s qrr 0.5 c trr 120 ns irrm 7.5 a type/orderingcode package marking relatedlinks IPL65R210CFD pg-vson-4 65f6210 see appendix a drain pin 5 gate pin 1 power source pin 3,4 driver source pin 2
3 650vcoolmos?cfd2powertransistor IPL65R210CFD rev.2.0,2014-03-19 final data sheet tableofcontents description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 table of contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 electrical characteristics diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 package outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 appendix a . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 disclaimer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 drain pin 5 gate pin 1 power source pin 3,4 driver source pin 2
4 650vcoolmos?cfd2powertransistor IPL65R210CFD rev.2.0,2014-03-19 final data sheet 2maximumratings at t j =25c,unlessotherwisespecified table2maximumratings values min. typ. max. parameter symbol unit note/testcondition continuous drain current 1) i d 16.6 a t c =25c 10.5 t c =100c pulsed drain current 2) i d ? pulse 53 a t c =25c avalanche energy, single pulse e as 484 mj i d =3.3a , v dd =50v (see table 10) avalanche energy, repetitive e ar 0.70 mj i d =3.3a , v dd =50v avalanche current, repetitive i ar 3.3 a mosfet dv/dt ruggedness dv/dt 50 v/ns v ds =0...400v gate source voltage v gs -20 20 v static -30 30 ac (f > 1 hz) operating and storage temperature t j ? t stg -40 150 c continuous diode forward current i s 16.6 a t c =25c diode pulse current i s ? pulse 53 a t c =25c reverse diode dv/dt 3) dv/dt 50 v/ns v ds =0...400v , i sd i d , t j =25c (see table 8) maximum diode commutation speed di f /dt 900 a/s power dissipation p tot 151 w t c =25c 1) limited by t j max . 2) pulse width t p limited by t j max 3) v peak 5 650vcoolmos?cfd2powertransistor IPL65R210CFD rev.2.0,2014-03-19 final data sheet 3thermalcharacteristics table3thermalcharacteristicsthinpak8x8 values min. typ. max. parameter symbol unit note/testcondition thermal resistance, junction - case r thjc 0.83 c/w thermal resistance, junction - ambient 1) r thja 62 c/w smd version, device on pcb, minimal footprint 45 smd version, device on pcb, 6cm2 cooling area soldering temperature, wave- & reflowsoldering allowed t sold 260 c reflow msl 3 1) device on 40mm*40mm*1.5mm one layer epoxy pcb fr4 with 6cm2 copper area (thickness 70m) for drain connection. pcb is vertical without air stream cooling. drain pin 5 gate pin 1 power source pin 3,4 driver source pin 2
6 650vcoolmos?cfd2powertransistor IPL65R210CFD rev.2.0,2014-03-19 final data sheet 4electricalcharacteristics at t j =25c,unlessotherwisespecified table4staticcharacteristics values min. typ. max. parameter symbol unit note/testcondition drain-source breakdown voltage v (br)dss 650 v v gs =0v , i d =1ma gate threshold voltage v gs(th) 3.5 4 4.5 v v ds = v gs , i d =0.7ma zero gate voltage drain current i dss 1 a v ds =650v , v gs =0v , t j =25c 200 v ds =650v , v gs =0v , t j =150c gate-source leakage current i gss 100 na v gs =20v , v ds =0v drain-source on-state resistance r ds(on) 0.189 0.21 w v gs =10v , i d =7.3a , t j =25c 0.491 v gs =10v , i d =7.3a , t j =150c gate resistance r g 1 w f =1mhz , opendrain table5dynamiccharacteristics values min. typ. max. parameter symbol unit note/testcondition input capacitance c iss 1850 pf v gs =0v , v ds =100v , f =1mhz output capacitance c oss 86 pf effective output capacitance, energy related 1) c o(er) 70 pf v gs =0v , v ds =0...400v effective output capacitance, time related 2) c o(tr) 336 pf i d =constant, v gs =0v, v ds =0...400v turn-on delay time t d(on) 12 ns v dd =400v, v gs =13v, i d =11.0a, r g =3.4 w (see table 9) rise time t r 8.4 ns turn-off delay time t d(off) 53.2 ns fall time t f 6.4 ns table6gatechargecharacteristics values min. typ. max. parameter symbol unit note/testcondition gate to source charge q gs 12 nc v dd =480v , i d =11a , v gs =0to10v gate to drain charge q gd 37 nc gate charge total q g 68 nc gate plateau voltage v plateau 6.4 v 1) c o(er) is a fixed capacitance that gives the same stored energy as c oss while v ds is rising from 0 to 400v 2) c o(tr) is a fixed capacitance that gives the same charging time as c oss while v ds is rising from 0 to 400v drain pin 5 gate pin 1 power source pin 3,4 driver source pin 2
7 650vcoolmos?cfd2powertransistor IPL65R210CFD rev.2.0,2014-03-19 final data sheet table7reversediodecharacteristics values min. typ. max. parameter symbol unit note/testcondition diode forward voltage v sd 0.9 v v gs =0v , i f =11.0a , t j =25c reverse recovery time t rr 120 ns v r =400v, i f =11.0a, d i f /d t =100a/s (see table 8) reverse recovery charge q rr 0.5 c peak reverse recovery current i rrm 7.6 a drain pin 5 gate pin 1 power source pin 3,4 driver source pin 2
8 650vcoolmos?cfd2powertransistor IPL65R210CFD rev.2.0,2014-03-19 final data sheet 5electricalcharacteristicsdiagrams diagram1:powerdissipation t c [c] p tot [w] 0 25 50 75 100 125 150 0 20 40 60 80 100 120 140 160 p tot =f( t c ) diagram2:safeoperatingarea v ds [v] i d [a] 10 0 10 1 10 2 10 3 10 -3 10 -2 10 -1 10 0 10 1 10 2 1 s 10 s 100 s 1 ms 10 ms dc i d =f( v ds ); t c =25c; d =0;parameter: t p diagram3:safeoperatingarea v ds [v] i d [a] 10 0 10 1 10 2 10 3 10 -3 10 -2 10 -1 10 0 10 1 10 2 1 s 10 s 100 s 1 ms 10 ms dc i d =f( v ds ); t c =80c; d =0;parameter: t p diagram4:max.transientthermalimpedance t p [s] z thjc [k/w] 10 -5 10 -4 10 -3 10 -2 10 -1 10 -2 10 -1 10 0 10 1 0.5 0.2 0.1 0.05 0.02 0.01 single pulse z thjc =f( t p );parameter: d=t p / t drain pin 5 gate pin 1 power source pin 3,4 driver source pin 2
9 650vcoolmos?cfd2powertransistor IPL65R210CFD rev.2.0,2014-03-19 final data sheet diagram5:typ.outputcharacteristics v ds [v] i d [a] 0 5 10 15 20 0 10 20 30 40 50 60 20 v 10 v 8 v 7 v 6 v 5.5 v 5 v 4.5 v i d =f( v ds ); t j =25c;parameter: v gs diagram6:typ.outputcharacteristics v ds [v] i d [a] 0 5 10 15 20 0 5 10 15 20 25 30 35 20 v 10 v 8 v 7 v 6 v 5.5 v 5 v 4.5 v i d =f( v ds ); t j =125c;parameter: v gs diagram7:typ.drain-sourceon-stateresistance i d [a] r ds(on) [ w ] 0 10 20 30 0.10 0.20 0.30 0.40 0.50 0.60 0.70 0.80 0.90 1.00 1.10 1.20 1.30 1.40 1.50 5 v 5.5 v 6 v 6.5 v 7 v 10 v r ds(on) =f( i d ); t j =125c;parameter: v gs diagram8:drain-sourceon-stateresistance t j [c] r ds(on) [ w ] -50 -25 0 25 50 75 100 125 150 0.05 0.10 0.15 0.20 0.25 0.30 0.35 0.40 0.45 98% typ r ds(on) =f( t j ); i d =7.3a; v gs =10v drain pin 5 gate pin 1 power source pin 3,4 driver source pin 2
10 650vcoolmos?cfd2powertransistor IPL65R210CFD rev.2.0,2014-03-19 final data sheet diagram9:typ.transfercharacteristics v gs [v] i d [a] 0 2 4 6 8 10 12 0 10 20 30 40 50 60 150 c 25 c i d =f( v gs ); v ds =20v;parameter: t j diagram10:typ.gatecharge q gate [nc] v gs [v] 0 25 50 75 0 1 2 3 4 5 6 7 8 9 10 120 v 400 v v gs =f( q gate ); i d =11apulsed;parameter: v dd diagram11:forwardcharacteristicsofreversediode v sd [v] i f [a] 0.0 0.5 1.0 1.5 2.0 10 -1 10 0 10 1 10 2 125 c 25 c i f =f( v sd );parameter: t j diagram12:avalancheenergy t j [c] e as [mj] 25 50 75 100 125 150 0 50 100 150 200 250 300 350 400 450 500 e as =f( t j ); i d =3.3a; v dd =50v drain pin 5 gate pin 1 power source pin 3,4 driver source pin 2
11 650vcoolmos?cfd2powertransistor IPL65R210CFD rev.2.0,2014-03-19 final data sheet diagram13:drain-sourcebreakdownvoltage t j [c] v br(dss) [v] -50 0 50 100 150 200 580 600 620 640 660 680 700 720 740 760 v br(dss) =f( t j ); i d =1ma diagram14:typ.capacitances v ds [v] c [pf] 0 100 200 300 400 500 10 0 10 1 10 2 10 3 10 4 ciss coss crss c =f( v ds ); v gs =0v; f =1mhz diagram15:typ.cossstoredenergy v ds [v] e oss [j] 0 100 200 300 400 500 0 1 2 3 4 5 6 7 8 e oss = f (v ds ) drain pin 5 gate pin 1 power source pin 3,4 driver source pin 2
12 650vcoolmos?cfd2powertransistor IPL65R210CFD rev.2.0,2014-03-19 final data sheet 6testcircuits table8diodecharacteristics table9switchingtimes table10unclampedinductiveload drain pin 5 gate pin 1 power source pin 3,4 driver source pin 2 test circuit for diode characteristics diode recovery waveform t v , i i rrm i f v ds 10 % i rrm t rr t f t s q f q s di f / dt di rr / dt v ds ( peak ) q rr = q f + q s t rr = t f + t s v ds i f v ds i f r g 1 r g 2 r g 1 = r g 2 switching times test circuit for inductive load switching times waveform v ds v gs t d ( on ) t d ( off ) t r t on t f t off 10 % 90 % v ds v gs unclamped inductive load test circuit unclamped inductive waveform v ds v d v ( br ) ds i d v ds v ds i d
13 650vcoolmos?cfd2powertransistor IPL65R210CFD rev.2.0,2014-03-19 final data sheet 7packageoutlines figure1outlinepg-vson-4,dimensionsinmm/inches drain pin 5 gate pin 1 power source pin 3,4 driver source pin 2 test circuit for diode characteristics diode recovery waveform t v , i i rrm i f v ds 10 % i rrm t rr t f t s q f q s di f / dt di rr / dt v ds ( peak ) q rr = q f + q s t rr = t f + t s v ds i f v ds i f r g 1 r g 2 r g 1 = r g 2 switching times test circuit for inductive load switching times waveform v ds v gs t d ( on ) t d ( off ) t r t on t f t off 10 % 90 % v ds v gs unclamped inductive load test circuit unclamped inductive waveform v ds v d v ( br ) ds i d v ds v ds i d
14 650vcoolmos?cfd2powertransistor IPL65R210CFD rev.2.0,2014-03-19 final data sheet 8appendixa table11relatedlinks ? ifxdesigntools: www.infineon.com ? ifxcoolmoswebpage: www.infineon.com drain pin 5 gate pin 1 power source pin 3,4 driver source pin 2 test circuit for diode characteristics diode recovery waveform t v , i i rrm i f v ds 10 % i rrm t rr t f t s q f q s di f / dt di rr / dt v ds ( peak ) q rr = q f + q s t rr = t f + t s v ds i f v ds i f r g 1 r g 2 r g 1 = r g 2 switching times test circuit for inductive load switching times waveform v ds v gs t d ( on ) t d ( off ) t r t on t f t off 10 % 90 % v ds v gs unclamped inductive load test circuit unclamped inductive waveform v ds v d v ( br ) ds i d v ds v ds i d
15 650vcoolmos?cfd2powertransistor IPL65R210CFD rev.2.0,2014-03-19 final data sheet revisionhistory IPL65R210CFD revision:2014-03-19,rev.2.0 previous revision revision date subjects (major changes since last revision) 2.0 2014-03-19 release of final version welistentoyourcomments anyinformationwithinthisdocumentthatyoufeeliswrong,unclearormissingatall?yourfeedbackwillhelpustocontinuously improvethequalityofthisdocument.pleasesendyourproposal(includingareferencetothisdocument)to: erratum@infineon.com publishedby infineontechnologiesag 81726mnchen,germany ?2014infineontechnologiesag allrightsreserved. legaldisclaimer theinformationgiveninthisdocumentshallinnoeventberegardedasaguaranteeofconditionsorcharacteristics.with respecttoanyexamplesorhintsgivenherein,anytypicalvaluesstatedhereinand/oranyinformationregardingtheapplication ofthedevice,infineontechnologiesherebydisclaimsanyandallwarrantiesandliabilitiesofanykind,includingwithout limitation,warrantiesofnon-infringementofintellectualpropertyrightsofanythirdparty. information forfurtherinformationontechnology,deliverytermsandconditionsandpricespleasecontactyournearestinfineon technologiesoffice( www.infineon.com ). warnings duetotechnicalrequirements,componentsmaycontaindangeroussubstances.forinformationonthetypesinquestion, pleasecontactthenearestinfineontechnologiesoffice. theinfineontechnologiescomponentdescribedinthisdatasheetmaybeusedinlife-supportdevicesorsystemsand/or automotive,aviationandaerospaceapplicationsorsystemsonlywiththeexpresswrittenapprovalofinfineontechnologies,ifa failureofsuchcomponentscanreasonablybeexpectedtocausethefailureofthatlife-support,automotive,aviationand aerospacedeviceorsystemortoaffectthesafetyoreffectivenessofthatdeviceorsystem.lifesupportdevicesorsystemsare intendedtobeimplantedinthehumanbodyortosupportand/ormaintainandsustainand/orprotecthumanlife.iftheyfail,itis reasonabletoassumethatthehealthoftheuserorotherpersonsmaybeendangered. drain pin 5 gate pin 1 power source pin 3,4 driver source pin 2 test circuit for diode characteristics diode recovery waveform t v , i i rrm i f v ds 10 % i rrm t rr t f t s q f q s di f / dt di rr / dt v ds ( peak ) q rr = q f + q s t rr = t f + t s v ds i f v ds i f r g 1 r g 2 r g 1 = r g 2 switching times test circuit for inductive load switching times waveform v ds v gs t d ( on ) t d ( off ) t r t on t f t off 10 % 90 % v ds v gs unclamped inductive load test circuit unclamped inductive waveform v ds v d v ( br ) ds i d v ds v ds i d

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