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mp18024 100v, 4a, high frequency half-bridge gate driver mp18024 rev. 1.0 www.monolithicpower.com 1 6/3/2011 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. the future of analog ic technology description the mp18024 is a high-frequency, 100v, half- bridge, n-channel, power mosfet driver. its low- side and high-side driver channels are independently controlled and matched with less than 5ns in time delay. under-voltage lockout on both high-side and low-side supplies force their outputs low in case of insufficient supply. the integrated bootstrap diode reduces external component count. features ? drives an n-channel mosfet half bridge ? 100v v bst voltage range ? on-chip bootstrap diode ? typical propagation delay of 20ns ? gate drive matching of less than 5ns ? drives a 2.2nf load with 15nm rise time and 12ns fall time at12v vdd ? ttl-compatible input ? quiescent current of less than 150 ? a ? uvlo for both high side and low side ? soic8e package applications ? telecom half-bridge power supplies ? avionics dc-dc converters ? two-switch forward converters ? active-clamp forward converters for mps green status, please visit mps website under quality assurance. ?mps? and ?the future of analog ic technology? are registered trademarks o f monolithic power systems, inc. typical application mp18024 pwm controller inh vss inl drvl sw drvh vdd bst +12v 48v control drive lo drive hi isolation and feedback secondary side circuit
mp18024 D 100v, 4a high frequency half-bridge gate driver mp18024 rev. 1.0 www.monolithicpower.com 2 6/3/2011 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. ordering information part number* package top marking MP18024HN soic8e MP18024HN * for tape & reel, add suffix ?z (e.g. MP18024HN?z); for rohs compliant packaging, add suffix ?lf; (e.g. MP18024HN?lf?z) package reference vdd bst drvh sw drvl vss inl inh 1 2 3 4 8 7 6 5 top view absolute maxi mum ratings (1) supply voltage (v dd ) ..................... -0.3v to +18v sw voltage (v sw ) ....................... -5.0v to +105v bst voltage (v bst ) ..................... -0.3v to +118v bst to sw .................................... -0.3v to +18v drvh to sw ............. -0.3v to (bst-sw) + 0.3v drvl to vss ................... -0.3v to (vdd + 0.3v) all other pins ..................... -0.3v to (v dd + 0.3v) continuous power dissipation (t a = 25c) (2) ............................................................. 2.6w junction temperature ............................... 150 ? c lead temperature .................................... 260 ? c storage temperature ............... -65c to +150 ? c recommended operating conditions (3) supply voltage v dd ....................... 9.0v to 16.0v sw voltage (v sw ) ......................... -1.0v to 100v sw slew rate ....................................... <50v/ns operating junction temp. (t j ) . - 40 ? c to +125 ? c thermal resistance (4) ja jc soic8e .................................. 48 ...... 10 ... ? c/w notes: 1) exceeding these ratings may damage the device. 2) the maximum allowable power dissipation is a function of the maximum junction temperature t j (max), the junction-to- ambient thermal resistance ja , and the ambient temperature t a . the maximum allowable continuous power dissipation at any ambient temperature is calculated by p d (max)=(t j (max)- t a )/ ja . exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. internal thermal shutdown circuitry protects the device from permanent damage. 3) the device is not guaranteed to function outside of its operating conditions. 4) measured on jesd51-7, 4-layer pcb.
mp18024 D 100v, 4a high frequency half-bridge gate driver mp18024 rev. 1.0 www.monolithicpower.com 3 6/3/2011 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. electrical characteristics v dd = v bst -v sw = 12v, v ss = v sw = 0v, no load at drvh and drvl, t a = +25 ? c, unless otherwise noted. parameter symbol condition min typ max units supply currents vdd quiescent current i ddq inl = inh = 0 100 150 a vdd operating current i ddo fsw = 500khz 9 ma floating driver quiescent current i bstq inl = inh = 0 60 90 a floating driver operating current i bsto fsw = 500khz 7.5 ma leakage current i lk bst = sw = 100v 0.05 1 ? inputs inl/inh high 2 2.4 v inl/inh low 1 1.4 v inl/inh internal pull-down resistance r in 185 k ? under voltage protection vdd rising threshold v ddr 8.1 8.4 8.8 v vdd hysteresis v ddh 0.5 v (bst-sw) rising threshold v bstr 6.9 7.3 7.7 v (bst-sw) hysteresis v bsth 0.55 v bootstrap diode bootstrap diode vf @ 100 a v f1 0.5 v bootstrap diode vf @ 100ma v f2 0.95 v bootstrap diode dynamic r r d @ 100ma 2 ? low side gate driver low level output voltage v oll i o = 100ma 0.08 v high level output voltage to rail v ohl i o = -100ma 0.23 v peak pull-up current i ohl v drvl = 0v, v dd = 12v 3 a v drvl = 0v, v dd = 16v 4.7 a peak pull-down current i oll v drvl = v dd = 12v 4.5 a v drvl = v dd = 16v 6 a floating gate driver low level output voltage v olh i o = 100ma 0.08 v high level output voltage to rail v ohh i o = -100ma 0.23 v peak pull-up current i ohh v drvh = 0v, v dd = 12v 2.6 a v drvh = 0v, v dd = 16v 4 a peak pull-down current i olh v drvh = v dd = 12v 4.5 a v drvh = v dd = 16v 5.9 a
mp18024 D 100v, 4a high frequency half-bridge gate driver mp18024 rev. 1.0 www.monolithicpower.com 4 6/3/2011 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. electrical characteristics (continued) v dd = v bst -v sw = 12v, v ss = v sw = 0v, no load at drvh and drvl, t a = 25 ? c, unless otherwise noted. parameter symbol condition min typ max units switching spec. --- low side gate driver turn-off propagation delay inl falling to drvl falling t dlff 20 ns turn-on propagation delay inl rising to drvl rising t dlrr 20 drvl rise time c l = 2.2nf 15 ns drvl fall time c l = 2.2nf 9 ns switching spec. --- floating gate driver turn-off propagation delay inl falling to drvh falling t dhff 20 ns turn-on propagation delay inl rising to drvh rising t dhrr 20 ns drvh rise time c l = 2.2nf 15 ns drvh fall time c l = 2.2nf 12 ns switching spec. --- matching floating driver turn-off to low side drive turn-on t mon 1 5 ns low side driver turn-off to floating driver turn-on t moff 1 5 ns minimum input pulse width that changes the output t pw 50 (5) ns bootstrap diode turn-on or turn- off time t bs 10 (5) ns thermal shutdown 150 ? c thermal shutdown hysteresis 25 ? c note: 5) guaranteed by design. input (inh, inl) output (drvh, drvl) t dhrr , t dlrr t dhff , t dlff input (inh, inl) output (drvh, drvl) t dhrr , t dlrr t dhff , t dlff inl inh drvl drvh t mon t moff figure 1?timing diagram
mp18024 D 100v, 4a high frequency half-bridge gate driver mp18024 rev. 1.0 www.monolithicpower.com 5 6/3/2011 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. pin functions pin # name description 1 vdd supply input. this pin supplies power to all the internal circuitry. place a decoupling capacitor to ground close to this pin to ensure stable and clean supply. 2 bst bootstrap. this is the positive power suppl y for the internal floating high-side mosfet driver. connect a bypass capacito r between this pin and sw pin. 3 drvh floating driver output. 4 sw switching node. 5 inh control signal input for the floating driver. 6 inl control signal input for the low side driver. 7 vss, exposed pad chip ground. connect exposed pad to vss for proper thermal operation. 8 drvl low side driver output.
mp18024 D 100v, 4a high frequency half-bridge gate driver mp18024 rev. 1.0 www.monolithicpower.com 6 6/3/2011 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. typical performance characteristics v dd = 12v, v ss = v sw = 0v, t a = 25 ? c, unless otherwise noted. i bsto operation current vs. frequency high level output voltage vs. temperature undervoltage lockout threshold vs. temperature undervoltage lockout hysteresis vs. temperature low level output voltage vs. temperature quiescent current vs. voltage inh=inl=0v bootstrap diode i-v characteristic i ddo operation current vs. frequency 0 2 4 6 8 10 12 14 16 18 20 0 200 400 600 800 1000 0 2 4 6 8 10 12 14 16 0 200 400 600 800 1000 0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 -50 0 50 100 150 0 0.02 0.04 0.06 0.08 0.1 0.12 0.14 0.16 0.18 -50 0 50 100 150 7 7.2 7.4 7.6 7.8 8 8.2 8.4 8.6 -50 0 50 100 150 475 480 485 490 495 500 505 510 515 520 -50 0 50 100 150 0.1 1 10 100 1000 0.5 0.6 0.7 0.8 0.9 1 0 20 40 60 80 100 120 140 7 9 11 13 15 17 19 v ohl, v oll (v) v ddr, v bstr (v) -40 o c -40 o c 0 o c 0 o c 25 o c 25 o c 125 o c 125 o c v dd -v olh v ddr v ddh v bsth v bstr v oll v ohl i ddq vs v dd i bstq vs v bst v dd -v ohh propagation delay vs. temperature 0 5 10 15 20 25 30 -60 -40 -20 0 20 40 60 80 100 120 140 t dhrr t dhff t dlrr t dlff
mp18024 D 100v, 4a high frequency half-bridge gate driver mp18024 rev. 1.0 www.monolithicpower.com 7 6/3/2011 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. typical performanc e characteristics (continued) v dd = 12v, v ss = v sw = 0v, t a = 25 ? c, unless otherwise noted. 0 1 2 3 4 5 6 7 8 1012141618 inl inh 2v/div. inl inh 2v/div. drvl 5v/div. drvh 5v/div. turn-on propagation delay inl 10v/div. inh 10v/div. drvl 5v/div. drvh 5v/div. drvl 10v/div. drvh 10v/div. turn-off propagation delay gate drive matching t moff gate drive matching t mon drive rise time 2.2nf load drive fall time 2.2nf load inl 10v/div. inh 10v/div. drvl 10v/div. drvh 10v/div. drvl 5v/div. drvh 5v/div. drvl 5v/div. drvh 5v/div. 20ns 20ns 1.44ns 1.52ns 14.4ns 9.4ns peak current vs. vdd voltage i oll i olh i ohl i ohh
mp18024 D 100v, 4a high frequency half-bridge gate driver mp18024 rev. 1.0 www.monolithicpower.com 8 6/3/2011 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. block diagram under voltage vdd bst drvh drvl sw inh inl vss under voltage level shift driver driver figure 2?function block diagram
mp18024 D 100v, 4a high frequency half-bridge gate driver mp18024 rev. 1.0 www.monolithicpower.com 9 6/3/2011 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. application the input signals inh and inl can be controlled independently. if both inh and inl control the high-side mosfet and low-side mosfet of the same bridge, then users must avoid shoot through by setting sufficient dead time between inh and inl low, and vice versa. see figure 3 below. dead time is defined as the time interval between inh low and inl low. shoot through (no dead time) no shoot through no shoot through shoot through (no dead time) inh inl inh inl dead time inh inl inh inl dead time figure 3?shoot-through timing diagram
mp18024 D 100v, 4a high frequency half-bridge gate driver mp18024 rev. 1.0 www.monolithicpower.com 10 6/3/2011 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. reference desi gn circuits half bridge converter the mp18024 drives the mosfets with alternating signals (with dead time) in half-bridge converter topology. therefore, from the pwm controller drives inh and inl with alternating signals the input voltage can go up to 100v. figure 4?half bridge converter two-switch forward converter in two-switch forward converter topology, both mosfets are turned on and off simultaneously. the input signal (inh and inl) comes from a pwm controller that senses the output voltage (and output current during current-mode control). the schottky diodes clamp the reverse swing of the power transformer and must be rated for the input voltage. the input voltage can go up to 100v. figure 5?two-switch forward converter
mp18024 D 100v, 4a high frequency half-bridge gate driver mp18024 rev. 1.0 www.monolithicpower.com 11 6/3/2011 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. active-clamp forward converter in active-clamp?forward converter topology, the mp18024 drives the mosfets with alternating signals. the high-side mosfet, in conjunction with creset, is used to reset the power transformer in a lossless manner. this topology lends itself well to run at duty cycles exceeding 50%. the device may not be able to run at 100v with this topology. input voltage 4 3 2 1 8 7 6 5 drvl drvl inl inh creset vdd vdd bst drvh sw inh inl vss drvl 9v - 16v secondary circuit figure 6?active-clamp forward converter
mp18024 D 100v, 4a high frequency half-bridge gate driver notice: the information in this document is subject to change wi thout notice. users should warrant and guarantee that third party intellectual property rights are not infringed upon when integrating mps products into any application. mps will not assume any legal responsibility for any said applications. mp18024 rev. 1.0 www.monolithicpower.com 12 6/3/2011 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. package information soic8e see detail "a" 0.0075(0.19) 0.0098(0.25) 0.050(1.27) bsc 0.013(0.33) 0.020(0.51) seating plane 0.000(0.00) 0.006(0.15) 0.051(1.30) 0.067(1.70) top view front view side view bottom view note: 1) control dimension is in inches. dimension in bracket is in millimeters. 2) package length does not include mold flash, protrusions or gate burrs. 3) package width does not include inte rlead flash or protrusions. 4) lead coplanarity (bottom of leads after forming) shall be 0.004" inches max. 5) drawing conforms to jedec ms-012, variation ba. 6) drawing is not to scale. 0.089(2.26) 0.101(2.56) 0.124(3.15) 0.136(3.45) recommended land pattern 0.213(5.40) 0.063(1.60) 0.050(1.27) 0.024(0.61) 0.103(2.62) 0.138(3.51) 0.150(3.80) 0.157(4.00) pin 1 id 0.189(4.80) 0.197(5.00) 0.228(5.80) 0.244(6.20) 14 85 0.016(0.41) 0.050(1.27) 0 o -8 o detail "a" 0.010(0.25) 0.020(0.50) x 45 o 0.010(0.25) bsc gauge plane

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