p p ja 3417 october 22,2015 - rev.00 page 1 2 0 v p - c hannel enhancement mode mosfet voltage - 2 0 v current - 5.2 a s c - 59 unit : inch(mm ) f eatures ? r ds(on) , v gs @ - 4.5 v , i d @ - 5.2 a< 35 m ? ? r ds(on) , v gs @ - 2 .5 v , i d @ - 3 .7 a< 40 m ? ? r ds( on) , v gs @ - 1.8 v , i d @ - 2 .5 a< 50 m ? ? advanced trench process technology ? specially designed for switch load, pwm application, etc ? lead free in compliance wit h eu rohs 2011/65/eu directive . ? green molding compound as per iec61249 std. (halogen free) mechanical data ? case: sc - 59 package ? terminals : solderable per mil - std - 750, method 2026 ? marking: a1 7 parameter symbol limit units drain - source voltage v ds - 20 v gate - source voltage v gs + 8 v continuous drain current i d - 5. 2 a pulsed drain current i dm - 2 0.8 a power dissipation t a =25 o c p d 1. 25 w derate above 25 o c 1 0 m w/ o c operatin g junction an d storage temperature range t j ,t stg - 55~150 o c typical thermal resistance - j unction to ambient (note 3 ) r ja 10 0 o c /w maximum ratings and thermal characteristics (t a =25 o c unless otherwise noted)
p p ja 3417 october 22,2015 - rev.00 page 2 e lectrical c haracteristics (t a =25 o c unless otherwise noted) parameter symbol test condition min. typ. max. units static drain - source breakdown voltage b v dss v gs = 0 v, i d = - 25 0ua - 2 0 - - v gate threshold voltage v gs(th) v ds =v gs , i d = - 250 ua - 0. 35 - 0. 59 - 0.9 v drain - source on - state resistance r ds(on) v gs = - 4.5 v, i d = - 5.2 a - 2 9 3 5 m gs = - 2.5 v, i d = - 3 .7 a - 3 3 40 v gs = - 1.8 v, i d = - 2.5 a - 40 50 zero gate volta ge drain current i dss v ds = - 20 v, v gs =0v - - 0.01 - 1 u a gate - source leakage current i gss v gs = + 8 v, v ds =0v - + 10 + 10 0 n a dynamic (note 5 ) total gate charge q g v ds = - 10 v, i d = - 5.2 a, v gs = - 4.5v (note 1 , 2 ) - 18.9 - nc gate - source charge q gs - 2.8 - gate - drain charge q gd - 4.2 - input capacitance ciss v ds = - 10 v, v gs = 0 v, f=1.0mhz - 17 58 - pf output capacitance coss - 1 53 - reverse transfer capacitance crss - 12 5 - turn - on delay time t d (on) v dd = - 10 v, i d = - 5.2 a, v g s = - 4.5v, r g = 6 (note 1 , 2 ) - 12 - ns turn - on rise time tr - 68 - turn - o ff delay time t d (off) - 82 - turn - o ff fall time tf - 35 - drain - source diode maximum continuous drain - source diode forward current i s --- - - - 1. 5 a diode forward voltage v sd i s = - 1. 0 a, v gs = 0 v - - 0. 69 - 1.2 v notes : 1. pulse width < 300us, duty cycle < 2% 2. essentially independent of operating temperature typical characteristics . 3. r ? ja is the sum of the junction - to - case and case - to - ambient thermal resistance where the case thermal reference is def ined as the solder mounting surface of the drain pins m ounted on a 1 inch fr - 4 with 2oz . square pad of copper 4. the maximum current rating is package limited 5. guaranteed by design, not subject to product ion testing.
p p ja 3417 october 22,2015 - rev.00 page 3 t ypical characteristic curves fi g.1 on - region characteristics fig. 2 transfer characteristics fig. 3 on - resistance vs. drain current fig. 4 on - resistance vs. junction temperature fig. 5 on - resistance variation with vgs. fig. 6 body d i ode characteristics
p p ja 3417 october 22,2015 - rev.00 page 4 t ypical c haracteristic curves fig. 7 gate - charge characteristics fig. 8 threshold voltage variation with temperature fig. 9 capacitance vs. drain - source voltage .
p p ja 3417 october 22,2015 - rev.00 page 5 part no packing code version mounting pad layout part n o packing code package type packing t ype marking ver sion PJA3417 _r1_00001 s c - 59 3k pcs / 7
p p ja 3417 october 22,2015 - rev.00 page 6 disclaimer
|
