View FEDL2280X-04_8325133.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

fedl2280xfull-04 issue date: nov.16, 2009 ml22808/ml22804/ml22802-xxx ml22p808/ml22p804/ml22p802 lapis semiconductor adpcm algori thm-based speech synthesis lsi 1/41 general description the ml22808/ml22804/ml22802-xxx are speech synthesis lsi devices that have p2rom for storing voice data. the voice output component has an adpcm2 decoder to enable high speech quality, a d/a converter, and a low-pass filter. it is easy to configure a speech synthesizer by co nnecting a power amplifier and a cpu externally. the ml22808/ml22804/ml22802-xxx allow selection of a playback method from among the 8-bit pcm, non-linear 8-bit pcm, 16-bit pcm, and 4-bit adpc m2 algorithms and enab le volume control. the ml22808/ml22804/ml22802-xxx, supported by the ro m codes, are the products in which written speech data is included. the ml22p808/ml22p804/ml22p802 are otp products in which speech data can be easily written by the user using a dedicated writer. these devices are suitable for applications in developing products, manufacturing of a wide variety of products in small quantities, and requiring quick turn around. ? capacity of the internal memory device and the maximum vocal reproduction time (when 4-bit adpcm2 algorithm used) maximum vocal reproduction time (sec) product name rom capacity f sam = 4.0 khz f sam = 8.0 khz f sam = 16 khz ml22808-xxx/ml22p808 8 mbits 524 262 131 ml22804-xxx/ml22p804 4 mbits 262 131 65 ml22802-xxx/ml22p802 2 mbits 131 65 32 ? speech synthesis method: an algorithm can be specified for each phrase from among the following: 4-bit adpcm2 8-bit nonlinear pcm 8-bit pcm/16-bit pcm ? sampling frequency: a fsam value can be specified fro each phrase. 4.0/8.0/16.0 khz, 5.3/10.7 khz, 6.4/12.8 khz ? built-in low-pass filter and 12-bit d/a converter ? cpu command interface: 3-wired serial / clock synchronous ? maximum number of phrases: 256 phrases, from 00h to ffh (per bank) ? memory bank switching: enabled between bank 1 and bank 4 using the sel0 and sel1 pins ? memory bank selecting: selectable between bank 1 and bank 4 by setting the sel0 and sel1 pins (other than ml22802/ml22p802) selectable between bank1 and bank 2 (ml22802/ml22p802) ? volume control: can be adjusted in 16 levels or set to off ? repeat function: loop command ? source oscillation frequency: 4.096 mhz ? power supply voltage: 2.7 to 3.6 v ? operating temperature range: -20 to +85 c ? package: 30-pin plastic ssop (ssop30-p-56-0.65-k) ? product name: ml22p808mb, ml22p804mb, ml22p802mb ml22808-xxxmb, ml22804-xxxmb, ml22802-xxxmb (xxx indicates a rom code number)
fedl2280xfull-04 ml22808/ml22804/ml22802-xxx the table below summarizes the differences between the ml2216 and the ml2280x. item ml2216 ml2280x cpu interface serial serial playback method 4-bit adpcm2 8-bit straight pcm 8-bit non-linear pcm 16-bit straight pcm 4-bit adpcm2 8-bit straight pcm 8-bit non-linear pcm 16-bit straight pcm maximum number of phrases 256 256 up to 1024 (per bank) sampling frequency (khz) 4.0/5.3/6.4/ 8.0/10.7/12.8 16.0 4.0/5.3/6.4/ 8.0/10.7/12.8 16.0 clock frequency 4.096 mhz (has a crystal oscillator circuit built-in) 4.096 mhz (has a crystal oscillator circuit built-in) d/a converter current-type 12 -bit current-type 12-bit low-pass filter 3d comb filter 3d comb filter speaker driving amplifier built-in type; 0.3w (at 8 , vdd=5v) no edit rom yes yes volume control 16 levels 16 levels silence insertion yes 20 to 1024 ms (4 ms steps) yes 20 to 1024 ms (4 ms steps) repeat function yes yes interval at which a seam is silent during continuous playback (*1) no no memory bank switching no yes package 44-pin qfp 30-pin ssop *1: continuous playback as shown below is possible. 1 phrase 1 phrase no silence interval 2/41
fedl2280xfull-04 ml22808/ml22804/ml22802-xxx block diagram ml22808/ml22804/ml22p808/ml22p804: timing controller i/o interface phrase address latch a ddress controlle r 19-/20-bit multiplexer 4-/8-mbit rom 19-/20-bit a ddress counte r a dpcm synthesizer pcm synthesize r lpf 12-bit dac a out c s sck di b us y ncr diph sel0 sel1 test0 test1 r ese t testo1 testo2 v pp dv dd dgnd a v dd a gnd pv dd osc xt xt pgnd 3/41
fedl2280xfull-04 ml22808/ml22804/ml22802-xxx ml22802/ml22p802: timing controller i/o interface phrase address latch address controller 18-bit multiplexer 18-bit address counter 2-mbit rom adpcm synthesizer pcm synthesizer lpf 12-bit dac aout c s sc k di bus y nc r diph sel test0 test1 rese t testo1 testo2 v pp av dd agnd dv dd dgnd osc xt xt pv dd pgnd 4/41
fedl2280xfull-04 ml22808/ml22804/ml22802-xxx pin configuration (top view) ml22808/ml22804/ml22p808/ml22p804: nc: no connection x t xt test0 test1 dgnd diph sel0 sel1 cs sc k di b us y ncr r ese t nc 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 dv dd a v dd a out nc a gnd v pp pgnd testo1 pvdd nc nc pgnd testo0 nc nc 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 30-pin plastic ssop 5/41
fedl2280xfull-04 ml22808/ml22804/ml22802-xxx ml22802/ml22p802: nc: no connection x t xt test0 test1 dgnd diph sel test2 cs sc k di b us y ncr r ese t nc 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 dv dd a v dd a out nc a gnd v pp pgnd testo1 pvdd nc nc pgnd testo0 nc nc 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 30-pin plastic ssop 6/41
fedl2280xfull-04 ml22808/ml22804/ml22802-xxx pin description pin symbol type description 1 xt i connects to a crystal or a ceramic resonator. a feedback resistor of around 1 m is built in between this xt pin and xt pin. when using an external clock, input the clock from this pin. if a crystal or a ceramic resonator is used, connect it as close to the lsi as possible. 2 xt o connects to a crystal or a ceramic resonator. when using an external clock, leave this pin open. if a crystal or a ceramic resonator is used, connect it as close to the lsi as possible 3 test0 i input pin for testing. tie this pin at a ?l? level (dgnd level). 4 test1 i input pin for testing. tie this pin at a ?l? level (dgnd level). 5 dgnd ? digital ground pin. 6 diph i pin for choosing between rising edges and falling edges as to the edges of the sck pulses used for shifting serial data input to the di pin into the inside of the lsi. when this pin is at a ?l? level, di input data is shifted into the lsi on the rising edges of the sck clock pulses; when this pin is at a ?h? level, di input data is shi fted into the lsi on the falling edges of the sck clock pulses. 7 (sel) sel0 i memory bank selecting pin. enabled when memory bank selecting is specified at the time the pup1 or pup2 command is input. do not change during speech playback (when the busy pin is at ?l?) 8 (test2) sel1 i ml22808/ml22804/ml22p808/ml22p804: memory bank selecting pin. enabled when memory bank selecting is specified at the time the pup1 or pup2 command is input. do not change during speech playback (when the busy pin is at ?l?) ml22802/ml22p802: input pin for testing. tie this pin at ?l? (dgnd level). 9 cs i chip select input pin. a ?l? level on this pin enables the serial interface. 10 sck i serial clock input pin. 11 di i serial data input pin. 12 busy o pin that outputs a signal that indi cates the phrase playback status. if the lsi is playing a phrase, this pin outputs a ?l? level. if the lsi is in a standby state, this pin outputs a ?h? level. 13 ncr o pin that outputs a signal that i ndicates whether command input is enabled or disabled. if command input is enabled, this pin outputs a ?h? level. if command input is disabled, this pin outputs a ?l? level. 14 reset i during a reset input, the entire circuit is stopped and enters a power down state. upon power-on, input a ?l? level to this pin. put this pin into a ?h? level after the power supply voltage is stabilized. 18 testo0 o output pin for testing. leave this pin open. 19,24 pgnd ? ground pin for the internal p2rom. 22 pv dd ? power supply pin for the internal p2rom. connect a capacitor of 0.1 f or more between this pin and pgnd. 23 testo1 o output pin for testing. leave this pin open. 7/41
fedl2280xfull-04 ml22808/ml22804/ml22802-xxx pin symbol type description 25 v pp i vpp power supply pin used for writi ng data to the internal p2rom. tie this pin at the dgnd level. 26 agnd ? analog ground pin. 28 aout o playback signal output pin. 29 av dd ? analog power supply pin. connect a capacitor of 0.1 f or more between this pin and pgnd. 30 dv dd ? digital power supply pin. connect a capacitor of 0.1 f or more between this pin and pgnd. note: the pin names in the parentheses are applied to ml22802/ml22p802. 8/41
fedl2280xfull-04 ml22808/ml22804/ml22802-xxx absolute maximum ratings (dgnd = pgnd = agnd = 0 v) parameter symbol condition rating unit digital power supply voltage dv dd, pv dd ?0.3 to +5.0 v analog power supply voltage av dd ta = 25c ?0.3 to +5.0 v input voltage v in ?0.3 to dv dd +0.3 v power dissipation p d ta = 25c when a jedec2-layer board is mounted 1.3 w output short-circuit current i sc ? 10 ma storage temperature t stg ? ?55 to +150 c recommended operating conditions (dgnd = pgnd = agnd = 0 v) parameter symbol condition range unit digital power supply voltage dv dd , pv dd ? 2.7 to 3.6 v analog power supply voltage av dd ? 2.7 to 3.6 v operating temperature t op ? -20 to +85 c min. typ. max. master clock frequency f osc ? 3.5 4.096 4.5 mhz external crystal oscillator capacitance cd, cg ? 15 30 45 pf 9/41
fedl2280xfull-04 ml22808/ml22804/ml22802-xxx electrical characteristics dc characteristics dv dd = pv dd = av dd = 2.7 to 3.6 v, dgnd = pgnd = ag nd = 0 v, ta = -20 to +85c parameter symbol conditio n min. typ. max. unit ?h? input voltage v ih ? 0.86 v dd ? ? v ?l? input voltage v il ? ? ? 0.14 v dd v ?h? output current 1 v oh1 i oh = ? 1 ma v dd ? 0.4 ? ? v ?h? output current 2 (*1) v oh2 i oh = ? 100 a v dd ? 0.4 ? ? v ?l? output current 1 v ol1 i ol = 2 ma ? ? 0.4 v ?l? output current 2 (*1) v ol2 i ol = 100 a ? ? 0.4 v ?h? input current 1 i ih1 v ih = dv dd ? ? 10 a ?h? input current 2 (*2) i ih2 v ih = dv dd 0.3 2.0 15 a ?l? input current 1 i il1 v il = dgnd ?10 ? ? a ?l? input current 2 (*2) i il2 v il = dgnd ?15 ? 2.0 ?0.3 a ?h? output leakage current (*3) i loh v ih = dv dd ? ? 10 a ?l? output leakage current (*3) i lol v il = dgnd ?10 ? ? a supply current during playback i dd f osc = 4.096 mhz no output load ? ? 10 ma power-down supply current i dds ta = -20 to +85c ? 1 20 a note: the input voltages and input currents apply to all the input pins except the xt pin. the output voltages apply to all th e output pins except the aout pin. *1: applies to the xt pin. *2: applies to the xt pin. *3: applies to the testo0 and testo1 pins. analog section characteristics dv dd = pv dd = av dd = 2.7 to 3.6 v, dgnd = pgnd = ag nd = 0 v, ta = -20 to +85c parameter symbol conditio n min. typ. max. unit aout output load resistance r lao during silence playback 5 ? ? k aout output voltage range v aout no output load 0.07 av dd ? 0.64 av dd v 10/41
fedl2280xfull-04 ml22808/ml22804/ml22802-xxx ac characteristics dv dd = av dd = 2.7 to 3.6 v, dgnd = pgnd = ag nd = 0 v, ta = -20 to +85c parameter symbol condition min. typ. max. unit master clock duty cycle f duty ? 40 50 60 % reset input pulse width t rst ? 1 ? ? s sck setup time for falling edge of cs t cks ? 200 ? ? ns sck hold time for falling edge of cs t ckh ? 200 ? ? ns data setup time for rising edge of sck t dis1 diph = ?l? 50 ? ? ns data hold time for rising edge of sck t dih1 diph = ?l? 50 ? ? ns data setup time for rising edge of sck t dis2 diph = ?h? 50 ? ? ns data hold time for rising edge of sck t dih2 diph = ?h? 50 ? ? ns sck ?h? level pulse width t sckh ? 200 ? ? ns sck ?l? level pulse width t sckl ? 200 ? ? ns ncr output delay time for rising edge of sck t dn1 diph = ?l? ? ? 150 ns ncr output delay time for falling edge of sck t dn2 diph = ?h? ? ? 150 ns busy output delay time for rising edge of sck t db1 diph = ?l? ? ? 150 ns busy output delay time for falling edge of sck t db2 diph = ?h? ? ? 150 ns sel0 and sel1 setup time for falling edge of busy (*4) t sb memory bank function used 1 ? ? s sel0 and sel1 hold time for falling edge of busy (*4) t bs memory bank function used 1 ? ? s command input interval time t int f osc = 4.096 mhz; at stop, sloop, cloop or vol command input 6 ? ? s command input enable time t cm f osc = 4.096 mhz; during continuous playback; at sloop input ? ? 10 ms ?l? level output time of ncr and busy at pup1 command input t pup1 1.9 2.0 2.1 ms ?l? level output time of ncr and busy at pup2 command input t pup2 when a 4.096 mhz external clock is input 65 66 67 ms ?l? level output time of ncr and busy at pdwn1 command input t pd1 ? ? 6 s ?l? level output time of ncr and busy at pdwn2 command input t pd2 f osc = 4.096 mhz 63 64 65 ms ncr ?l? level output time 1 (*1) t ncr1 f osc = 4.096 mhz ? ? 6 s ncr ?l? level output time 2 (*2) t ncr2 f osc = 4.096 mhz; after phrase data input by the play command ? 4.125 4.38 ms busy ?l? level output time (*3) t bsy f osc = 4.096 mhz ? ? 6 s note: output pin load capacitance = 55 pf (max) *1: applies to cases where a command is input excep t after a pup1, pup2, pdwn1, pdwn2, sloop, or cloop command input or except after a phrase data input by the play command. *2: indicates the time when the sampling frequency of the phrase played last was 4 khz. for any other sampling frequency, the ncr ?l? output time 2 is proportional to that sampling frequency. after reset release, a sampling freuency is set to 4 khz. 11/41
fedl2280xfull-04 ml22808/ml22804/ml22802-xxx *3: applies to when a command is input except after a pup1, pup2, pdwn1, pdwn2, sloop, or cloop command input or except after a phrase data input by the play command, providing no phrase is being played. *4: for ml22802/ml22p802, applied to the sel pin. 12/41
fedl2280xfull-04 ml22808/ml22804/ml22802-xxx timing diagrams serial cpu interface timi ng (when diph = ?l?) c s sck di vih vil vil vih vil vih t esck t dis1 t dih1 t sckh t sckl t csh ncr t dn1 b usy t db1 vol voh vol voh serial cpu interface timing (when diph = ?h?) c s sck di vih vil vil vih vil vih t esck t dis1 t dih1 t sckl t sckh t csh ncr t dn1 b usy t db1 vol voh vol voh 13/41
fedl2280xfull-04 ml22808/ml22804/ml22802-xxx power-on timing v dd vih vil t rst vdd r ese t status processing reset power down oscillation is stopped at power-on. power-up timing ? pup1 command input voh vol t pup1 cs status oscillation stabilized awaiting command sck di ncr b us y power down xt ? xt oscillating oscillation stopped aout gnd voh vol 1v 14/41
fedl2280xfull-04 ml22808/ml22804/ml22802-xxx ? pup2 command input voh vol t pup2 cs status oscillation stabilized suppressing pop noise sck di ncr b us y power down xt ? xt oscillating oscillation stopped aout gnd 1v awaiting command voh vol power-down timing ? pdwn1 command input voh vol t pd1 cs status command is being processed power down sck di ncr b us y awaiting command xt ? xt oscillating oscillation stopped aout gnd 1v voh vol 15/41
fedl2280xfull-04 ml22808/ml22804/ml22802-xxx ? pdwn2 command input voh vol t pd2 cs status command is being processed power down sck di ncr awaiting command xt ? xt oscillating oscillation stopped aout gnd 1v voh vol pop noise is being suppressed b us y ? reset input t rst r ese t status power down b us y playing xt ? xt oscillating oscillation stopped aout gnd note: the same timing applies in cases where the reset signal is input during waiting for command. t 16/41
fedl2280xfull-04 ml22808/ml22804/ml22802-xxx ? playback timing by the play command voh vol t bsy cs status command is being processed playing sck di ncr b us y command standby aout 1v voh vol address is being controlled t ncr1 t ncr2 awaiting command awaiting command (*1) play command 1 st byte play command 2 nd byte sel1 sel0 t sb t bs note: length of a ?l? interval of busy is = t ncr2 + voice reproduction time length. ? playback stop timing voh vol cs status awaiting command sck di ncr b us y aout 1v voh vol t ncr1 playing stop command command is being processed 17/41
fedl2280xfull-04 ml22808/ml22804/ml22802-xxx ? continuous playback timing by the play command voh vol cs status playing phrase 1 sck di ncr b us y aout 1v address is being controlled t ncr2 a waiting command (*1) play command 2 nd byte play command 1 st byte playing phrase 2 t ncr1 play command 2 nd byte address is being controlled t cm *1: the ?l? level period of the ncr pin during playback varis depending on the timing at which the play command is input. ? silence insertion timing by the muon command voh vol cs status playing sck di ncr b us y aout 1v address is being controlled t ncr2 awaiting command (*1) play command 2 nd byte muon command 1 st byte silence is being inserted t ncr1 muon command 2 nd byte (*1) playing waiting for silence insertion to be finished play command 1 st byte play command 2 nd byte t ncr1 t cm *1: the ?l? level period of the ncr pin during playback or silence insertion operation varis depending on the timing at which the muon command is input. 18/41
fedl2280xfull-04 ml22808/ml22804/ml22802-xxx ? repeat playback set/release timing by the sloop and cloop commands voh vol cs status playing sck di ncr b us y aout 1v address is being controlled t ncr2 a waiting command a waiting command play command 2 nd b y te sloop command playing address is being controlled cloop command t int command is being processed vih vil t cm ? volume change timing by the vol command voh vol cs status awaiting command sck di ncr b us y command is being processed t ncr1 awaiting command vol command t bsy voh vol 19/41
fedl2280xfull-04 ml22808/ml22804/ml22802-xxx functional description serial cpu interface command data can be input through the di pin by signals input through the cs and sck pins. setting the cs pin to a ?l? level enables the serial cpu interface. after the cs pin is set to a ?l? level, the command data, which is synchronized with the sck clock signal, is input through the di pin from the msb. the command data input through the di pin is shifted into the lsi on the rising or falling edges of the sck clock pulses and the command is executed by the rising or falling edge of the eighth pulse of the sck clock. choosing between rising edges and falling edges of the clock pulses input through the sck pin is determined by the signal input through the diph pin: - when the diph pin is at a ?l? level, the data input through the di pin is shifted into the lsi on the rising edges of the sck clock pulses. - when the diph pin is at a ?h? level, the data input through the di pin is shifted into the lsi on the falling edges of the sck clock pulses. it is possible to input command data in the lsi even by holding the cs pin continuously at a ?l? level. however, if unexpected pulses caus ed by noise are induced through th e sck pin, sck clock pulses are incorrectly counted. as a result, command data cannot be input correctly. setting the cs pin to a ?h? level returns the count of the sck clock pulses to the initial state. command and data input timings cs sc k di ? sck rising edge operation (when diph pin = ?l? level) d7 d6 d5 d4 d3 d2 d1 d0 (msb) (lsb) cs sc k di ? sck falling edge operation (w hen diph pin = ?h? level) d7 d6 d5 d4 d3 d2 d1 d0 (msb) (lsb) cs sc k di d7 d6 d5 d4 d3 d2 d1 d0 (msb) (lsb) cs sc k di d7 d6 d5 d4 d3 d2 d1 d0 (msb) (lsb) 20/41
fedl2280xfull-04 ml22808/ml22804/ml22802-xxx command list each command is configured in 1-byte (8-bit) units. each of the play and muon command forms one command by two bytes each. command d7 d6 d5 d4 d3 d2 d1 d0 description pup1 0 0 0 0 ? ? s1 s0 instantly shifts the device currently powered down to a command wait state. pup2 0 0 0 1 ? ? s1 s0 suppresses pop noise and shifts the device currently powered down to a command wait state. pdwn1 0 0 1 0 ? ? ? ? instantly shifts the device from a command wait state to a power down state. pdwn2 0 0 1 1 ? ? ? ? suppresses pop noise and shifts the device from a command wait state to a power down state. 0 1 0 0 ? ? ? ? play f7 f6 f5 f4 f3 f2 f1 f0 phrase-specified playback start command. use the data of the 2nd byte to specify a phrase number. stop 0 1 1 0 ? ? ? ? playback stop command. 0 1 1 1 ? ? ? ? muon m7 m6 m5 m4 m3 m2 m1 m0 inserts silence. use the data of the 2nd byte to specify the length of silence. sloop 1 0 0 0 ? ? ? ? command for setting the repeat playback mode. enabled during playback. cloop 1 0 0 1 ? ? ? ? command for releasing the repeat playback mode. if the stop command is input, repeat playback mode is released automatically. vol 1 0 1 0 v3 v2 v1 v0 volume setting command. s1, s0 : number of memory banks (*) f7?f0 : phrase address m7?m0 : length of silence period v3?v0 : sound volume * s0 is fixed to ?0? for ml22802/ml22p802. 21/41
fedl2280xfull-04 ml22808/ml22804/ml22802-xxx power down function this lsi has the power down function. when in a power down state, all the circuits including the oscillator circuit stop operating, thus minimizing the supply current. when supplying an external clock to the xt pin, tie the pin at a ?l? level during power down. the figure below shows a equivalent circuit to an oscillator circuit. approx. 1 m power down signal (during power down = ?l?) master clock inside the lsi xt xt the initial status at reset input and the status at power down of output pins the status of relative output pins at reset input and power down is shown below. digital output pin state analog output pin state ncr ?h? level aout gnd level busy ?h? level voice synthesis algorithm the ml22804/ml22808-xxx contain four algorithm types to match the characteristic of playback voice: 4-bit adpcm2 algorithm, 8-bit straight adpcm2 algorithm, 8-bit non-linear pcm algorithm, and 16-bit straight pcm algorithm. key feature of each al gorithm is described in the table below. voice synthesis algorithm applied waveform feature 4-bit adpcm2 normal voice waveform lapis semiconductor ?s specific speech synthesis algorithm of improved waveform follow-up with improved 4-bit adpcm. 8-bit nonlinear pcm algorithm, which plays back mid-range of waveform as 10-bit quivalent voice quality. e 8-bit pcm normal 8-bit pcm algorithm 16-bit pcm high-frequency components inclusive sound effect etc. normal 16-bit pcm algorithm 22/41
fedl2280xfull-04 ml22808/ml22804/ml22802-xxx memory allocation and creating voice data the rom is partitioned into four data areas: voice (i.e., phrase) control area, test area, voice area, and edit rom area. the voice control area manages the rom?s voice data. it contains data for controlling the start/stop addresses of voice data for 256 phrases, use/non-use of the edit rom function and so on. the test area contains data for testing. the voice area contains actual waveform data. the edit rom area contains data for effective use of voic e data. for the details, refer to the section of ?edit rom function.? no edit rom area is available unless the edit rom is used. the rom data is created using a dedicated tool. rom address (ml22808/ml 22804/ml22802-xxx, ml22p80 8/ml22p804/ml22p802) voice control area (fixed16 kbits) test area edit rom area depends on creation of rom data. 0x00000 0x007ff 0x00800 max: 0xfffff max: 0xfffff 0x00807 0x00808 voice area playback time and memory capacity the playback time depends upon the memory capacity, sampling frequency, and playback method. the equation showing the relationship is given below. the equation below gives the playback time when the edit rom function is not used. (bit length is 2 bits for 2-bit adpcm2; 4 bits for 4-bit adpcm2; 8 bits for pcm.) example : let the sampling frequency be 16 khz and 4-bit adpcm2 algorithm. then the playback time is approx. 65 seconds, as shown below. playback time = ? 65 (sec) 1. 16 024 (4096 ? 16) (kbit) (khz) 4 (bit) 23/41
fedl2280xfull-04 ml22808/ml22804/ml22802-xxx edit rom function the edit rom function makes it possible to play back multiple phrases in succession. the following functions are set using the edit rom function: ? continuous playback: there is no limit to the number of times a continuous playback can be specified. it depends on the memory capacity only. ? silence insertion function: 20 to 1024 ms using the edit rom function enables an effec tive use of the memory capacity of voice rom. below is an example of the rom configuration in the case of using the edit rom function. example 1: phrases using the edit rom function example 2: example of rom data where c ontents of example 1 are stored in rom phrase 1 phrase 2 phrase 3 phrase 4 a d a c b d e b d e c phrase 5 d a d b e c d silence a b c d e address control area editing area f 24/41
fedl2280xfull-04 ml22808/ml22804/ml22802-xxx memory bank selecting function using the memory bank selecting function, the internal rom area in the ml22808/ml22804/ml22p808/ ml22p804 can be divided into up to four areas. if four banks are used, up to 1024 phrases can be played back since each bank is capable of up to 256 phrases. using the memory bank selecting function, the internal rom area in the mll22802/ml22p802 can be divided into up to two areas. if two banks are used, up to 512 phrases can be played back because each bank is capable of up to 256 phrases. using this function, it is possible to put together multiple rom codes into one code. in the case of the ml22808/ml22804/ml22p808/ml22p80 4, the memory is used by setting the sel1 and sel0 pins and in the case of the ml22802/ml22p802, the memory is used by setting the sel pin, as shown in the tables below. in addition, when playing phrases, it is necessary to sp ecify the number of memory banks by pup1 or pup2. ? ? ? in the tables below means don?t care, whether 0 or 1. note that, if the memory bank selecting fnction is used, it is necessary to divide data when rom data is created and store the divided data in the specified area in advance. for one memory banks: sel1 sel0 ml22p808/ml22808-xxx ml22p80 4/ml22804-xxx sel ml22p802/ml22802-xxx ? ? 00000h -fffffh 00000h ? 7ffffh ? 00000h ? 3ffffh for two memory banks: sel1 sel0 ml22p808/ml22808-xxx ml22p80 4/ml22804-xxx sel ml22p802/ml22802-xxx ? 0 00000h ? 7ffffh 00000h ? 3ffffh 0 00000h ? 1ffffh ? 1 80000h ? fffffh 40000h ? 7ffffh 1 20000h ? 3ffffh for four memory banks: sel1 sel0 ml22p808/ml22808-xxx ml22p804/ml22804-xxx 0 0 00000h?3ffffh 00000h?1ffffh 0 1 40000h?7ffffh 20000h?3ffffh 1 0 80000h?bffffh 40000h?5ffffh 1 1 c0000h?fffffh 60000h?7ffffh shown below is an example of memory division for the m22808 (8 mbits). 0?3ffffh 40000?7ffffh 80000?bffffh c0000?fffffh b an k 1 cap a cit y : 8 mbit s max. numb e r of phrases: 256 b an k 1 cap a cit y : 4 mbit s max. numb e r of phrases: 256 b an k 2 cap a cit y : 4 mbit s max. numb e b an k 1 cap a cit y : 2 mbit s max. numb e r of p hrases: 256 b an k 2 cap a cit y : 2 mbit s max. numb e r of p hrases: 256 b an k 3 cap a cit y : 2 mbit s max. numb e r of r o f phrases: 256 p hrases: 256 b an k 4 cap a cit y : 2 mbit s max. numb e r of p hrases: 256 n u mb e r o f m e mo r y di vi si o n s: 1 8 - m b it 1 ar ea n u mb e r o f m e mo r y di vi si o n s: 2 4-mbit 2 area s n u mb e r o f m e mo r y di vi si o n s: 4 2-mbit 4 area s 25/ 41
fedl2280xfull-04 ml22808/ml22804/ml22802-xxx command function descriptions 1. pup1 command ? command 0 0 0 0 ? ? s1 s0 pup1 command is used to shift the ml22804/ml22808-xxx from power down state to the command standby state. in the power down state, any command input other than pup1 and pup2 will be ignored. the ml22804/ml22808-xxx enters the power down state in any of the following conditions: 1) when power is turned on 2) at reset input 3) when both ncr and busy go to a ?h? level after inputting the power down command. the relationship between s1/s0 and the memory bank is as follows. s1 s0 ml22808/ml22804/ml22p808/ml22p804 ml22802/ml22p802 0 0 uses the entire space of the internal memory as one area. uses the entire space of the internal memory. 0 1 divides the internal memory into two areas to select the memory areas with the sel0 pin. setting prohibited (fix s0 to ?0?) 1 0 divides the internal memory into four areas to select the memory areas with the sel0 and sel1 pins. divides the internal memory into two areas to select the memory areas with the sel pin. 1 1 setting prohibited setting prohibited (fix s0 to ?0?.) cs status oscillation stabilized awaiting command sck di ncr b us y power down xt ? xt oscillatin g oscillation stopped aout gnd 1v the oscillation starts when the pup1 command is inpu t and, after an elapse of about 2 ms oscillation stabilization time, the aout output abruptly changes from gnd level to approx. 1 v level. therefore, this abrupt change in aout output will cause generation of pop noise if the aout output is not processed outside. to suppress pop noise, input the pup2 command. any command that is input during oscillation stabilization w ill be ignored. however, if a ?l? level is input to the reset pin, the device enters the pow er down state immediately. 26/41
fedl2280xfull-04 ml22808/ml22804/ml22802-xxx 2. pup2 command ? command 0 0 0 1 ? ? s1 s0 pup2 command is used to shift the ml22804/ml22808-xxx from the power down state to the command standby state. in the power down state, any command input other than pup1 and pup2 will be ignored. the ml22804/ml22808-xxx enters the power down state in any of the following conditions: 1) when power is turned on 2) at reset input 3) when both ncr and busy go to a ?h? level after inputting the power down command. the relationship between s1/s0 and the memory bank is as follows. s1 s0 ml22808/ml22804/ml22p808/ml22p804 ml22802/ml22p802 0 0 uses the entire space of the internal memory. uses the entire space of the internal memory. 0 1 divides the internal memory into two areas to switch the memory areas with the sel0 pin. setting prohibited (fix s0 to ?0?) 1 0 divides the internal memory into four areas to switch the memory areas with the sel0 and sel1 pins. divides the internal memory into two areas to select the memory areas with the sel pin. 1 1 setting prohibited (operation is the same as above.) setting prohibited (fix s0 to ?0?.) cs status oscillation stabilized pop noise is being suppressed sck di ncr b us y power down xt ? xt oscillatin g oscillation stopped aout gnd 1v awaiting command the oscillation starts when the pup2 command is inpu t and, after an elapse of about 2 ms oscillation stabilization time, the aout output gradually changes from gnd level to approx. 1 v level in about 64 ms. any command that is input during oscillation stabilization w ill be ignored. however, if a ?l? level is input to the reset pin, the device enters the pow er down state immediately. t 27/41
fedl2280xfull-04 ml22808/ml22804/ml22802-xxx 3. pdwn1 command ? command 0 0 1 0 ? ? ? ? the pdwn1 command is used to shift the ml22804/ml22808-xxx from a command wait state (both ncr and busy are ?h?) to a power down state. however, this command is disabled during playback. to resume playback after the ml22804/ml22808-xxx has shifted to the power down state, first input the pup1 or pup2 command and then input the play command. cs status command is being processed power down sck di ncr b us y awaiting command xt ? xt oscillating oscillation stopped aout gnd 1v after the pdwn1 command is input and after an elapse of command processing time, the oscillation stops and the aout output abruptly changes from approx. 1 v leve l to gnd level. this abrupt change in the aout output will cause generation of pop noise if the aout outp ut is not processed outside. to suppress pop noise, input the pdwn2 command. 28/41
fedl2280xfull-04 ml22808/ml22804/ml22802-xxx 4. pdwn2 command ? command 0 0 1 1 ? ? ? ? the pdwn2 command is used to shift the ml22804/ml22808-xxx from a command wait state (both ncr and busy are ?h?) to a power down state. however, this command is disabled during playback. to resume playback after the ml22804/ml22808-xxx has shifted to the power down state, first input the pup1 or pup2 command and then input the play command. cs status power down sck di ncr b us y awaiting command xt ? xt aout gnd 1v pop noise is being suppressed command is being processed oscillation stopped oscillating after the pdwn1 command is input and after an elapse of command processing time, the oscillation stops and the aout output gradually changes from approx. 1 v level to gnd level in about 64 ms. any command that is input while pop noise is being supp ressed will be ignored. however, if a ?l? level is input to the reset pin, the device enters the po wer down state immediately. 29/41
fedl2280xfull-04 ml22808/ml22804/ml22802-xxx 5. play command 0 1 0 0 ? ? ? ? ? command f7 f6 f5 f4 f3 f2 f1 f0 1st byte 2nd byte the play command is a 2-byte command. set the playback phrase using the second byte of this command. the play command can be input when the ncr signal is at a ?h? level. since it is possible to specify the play back phrase (f7 to f0) at the time of creating the rom that stores voice data, set the phrase that was set when the rom was created. figure below shows the timing of phrase (f7 to f0 = 01h) playback. cs status playing sck di ncr bu sy aout 1v play command 1 st byte play command 2 nd byte awaiting command command is being processed awaiting command address is being controlled awaiting command when the 1 st byte of the play command is input, the device enters a state in which it waits for the 2 nd byte to be input after the elapse of the command processing time. when the 2 nd byte of play command is input, after an elapse of the command processing time, the device starts reading from the rom the address information of the phrase to be played. thereafter, playback operation starts, the playback is performed up to the specified rom address, and then the playback ends automatically. the ncr1 signal is at a ?l? level during address control, and goes ?h? when the address control is finished and playback is started. when this ncr signal goes ?h?, then it is possible to input the play command for the next playback phrase. during address control, the busy signal is at a ?l? level during play back and goes ?h? when playback is finished. whether the playback is going on can be known by the busy signal. time required for address control the time required for controlling the address of the playback phrase after input of the play command is the time of 16 to 17 periods of the sampling frequency of the the phrase that was played last. after power is turned on or after reset is input, it is the time of 16 to 17 periods of 4 khz sampling frequency. 30/41
fedl2280xfull-04 ml22808/ml22804/ml22802-xxx play command input timing for continuous playback the diagram below shows the play command input timing in cases where one phrase is played and then the next phrase is played in succession. cs status sck di ncr b us y aout 1v waiting for address control t cm play command 2 nd byte play command 1 st byte play command 2 nd byte a waiting command address is being controlled playing phrase 1 playing phrase 2 address is being controlle d as shown in the diagram above, if continuous playback is carried out, input the play command for the second phrase within 10 ms (tcm) after ncr goes ?h?. this will make it possible to start playing the second phrase immediately after the playback of the first phrase finishes. phrases can thus be played back continuously without inserting silence between phrases. 31/41
fedl2280xfull-04 ml22808/ml22804/ml22802-xxx 6. stop command ? command 0 1 1 0 ? ? ? ? the stop command is used to stop playback. when speech synthesis processing stops, the aout output becomes 1/4v dd and the ncr and busy signals go ?h?. although it is possible to input the stop command re gardless of the status of ncr during playback, a prescribed command interval time needs taking. note that stop command input during power down, sh ifting to power up, and shif ting to power down will be ignored. cs status sck di ncr b us y aout 1v stop command command is being processed playing awaiting command because the aout output abruptly ch anges to approx. 1 v level after the stop command is input, pop noise may be generated. to prevent pop noise, input the stop command after gradually decreasing the volume by the vol command. 32/41
fedl2280xfull-04 ml22808/ml22804/ml22802-xxx 7. muon command 0 1 1 1 ? ? ? ? ? command m7 m6 m5 m4 m3 m2 m1 m0 1st byte 2nd byte the muon command is a 2-byte command. this command is used to insert silence between the two playback phrases. the muon command is enabled when the ncr si gnal is at a ?h? level. set the silence time length using the second byte of this command. as the silence length (m7 to m0), a value between 4 ms and 1024 ms can be set in 4 ms intervals (252 steps in total). the equation to set the silence time length is shown below. the silence length (m7-m0) must be set to 04h or higher. t mu = (2 7 (m7) + 2 6 (m6) + 2 5 (m5) + 2 4 (m4) + 2 3 (m3) + 2 2 (m2) + 2 1 (m1) + 2 0 (m0) + 1) 4ms the timing diagram shown below is a case of inserting a s ilence of 20 ms between the repetitions of a phrase of (f7?f0) = 01h. cs status playing sck di ncr b us y aou t 1v waiting for playback to be finished t cm t cm play command 2 nd byte muon command 1 st byte muon command 2 nd byte play command 1 st byte play command 2 nd byte awaiting command address is being controlled silence is being inserted playing waiting for silence insertion to be finished when the play command is input, the address control of phrase 1 ends, the phrase playback starts, and the ncr signal goes ?h? level. input the muon command af ter this ncr signal changes to the ?h? level. after the muon command input, the ncr signal remains ?l? up to the end of phrase 1 playback, and the device enters a state waiting for the phrase 1 playback to end. when the phrase 1 playback finishes, the silence playback starts, and ncr1 signal goes ?h? level. after this ncr signal has changed to the ?h? level, re-input the play command in order to play phrase 1. after the play command input, the ncr signal once again returns to ?l? level and the device enters the state waiting for the end of silence playback. when the silence playback finishes and then the phrase 1 playback starts, the ncr signal goes ?h?, and the device enters a state in which it is possible to input the next play or muon command. the busy signal remains ?l? until the end of a series of playback. 33/41
fedl2280xfull-04 ml22808/ml22804/ml22802-xxx 8. sloop command ? command 1 0 0 0 ? ? ? ? the sloop command is used to set repeat playback mode. the cloop command is used to release repeat playback mode. since the sloop command is valid only during playback , be sure to input the sloop command while the ncr signal is at a ?h? level after the play command is input. the ncr signal remains ?l? during repeat playback mode. once repeat playback mode is set, the current phrase is repeatedly played back until the repeat playback setting is released by sloop command or until playback is stopp ed by the stop command. in the case of a phrase using the edit function, the edited phrase is repeatedly played back. since repeat playback mode is rel eased when playback is stopped by the stop command, input the sloop command once again if desired to repeat the playback. following shows the sloop command input timing. cs status sck di ncr b us y aout 1v t cm play command 2 nd byte sloop command cloop command a waiting command playing address is being controlled address is being controlled playing a waiting command command is being processed effective range of sloop command input after the play command is input, input the sloop comma nd within 10 ms (tcm) after ncr goes ?h?. this will enable the sloop command, so that repeat playback will be carried out. 34/41
fedl2280xfull-04 ml22808/ml22804/ml22802-xxx 9. cloop command ? command 1 0 0 1 ? ? ? ? the cloop command releases repeat playback mode. when repeat playback mode is released, ncr goes ?h?. it is possible to input the cloop command regardless of the ncr status during playback, but a prescribed command interval needs taking. cloop command input timing depending on the timing of the cloop command input duri ng repeat playback, the repeat playback will end either at the end of the currently playing phra se or after one more repetition of the phrase. the repeat playback will end at the currently playing phrase at the cloop command input timing shown in the table below. playback method cloop input timing amount of remaining voice data in the phrase being played 4-bit adpcm2 35 samples or more 8-bit nonlinear/straight pcm 18 samples or more 16-bit straight pcm 18 samples or more in 4-bit adpcm2, if the cloop command is input 35 or more samples earlier than the time when playback of 1 phrase ends, repeat playback will end with that phrase. if the command is input af ter the amount of remaining voice data becomes less than 35 samples, playback of the phrase will be repeated once more. 1 phrase 35 samples 1 phrase if the command is input at this timing, playback of the phrase will be repeated once more. in 8-bit nonlinear/straight pcm or 16-bit straight pcm, if the cloop command is in put 18 or more samples earlier than the time when playback of 1 phrase ends, repeat playback will end with that phrase. if the command is input after the amount of remaining voice data becomes less than 18 samples, playback of the phrase will be repeated once more. 1 phrase 18 samples if the command is input at this timing, playback will end with this phrase. 35/41
fedl2280xfull-04 ml22808/ml22804/ml22802-xxx 10. vol command ? command 1 0 1 0 v3 v2 v1 v0 the vol command is used to adjust the playback vo lume. although it is possible to input the vol command regardless of the status of the ncr signal, a prescrib ed command interval time needs taking. note that vol command input during power down, shifting to power up, and shifting to power down will be ignored. the volume can be set in 16 steps, as shown in the table below. the initial value after reset release is set to 0 db. during power down or at the time of input of the stop command, the value set by the vol command will be retained. v3 v2 v1 v0 volume 0 0 0 0 0 db 0 0 0 1 ? 0.63 db 0 0 1 0 ? 1.31 db 0 0 1 1 ? 2.05 db 0 1 0 0 ? 2.85 db 0 1 0 1 ? 3.74 db 0 1 1 0 ? 4.73 db 0 1 1 1 ? 5.85 db 1 0 0 0 ? 7.13 db 1 0 0 1 ? 8.64 db 1 0 1 0 ? 10.45 db 1 0 1 1 ? 12.76 db 1 1 0 0 ? 15.92 db 1 1 0 1 ? 20.90 db 1 1 1 0 ? 33.98 db 1 1 1 1 off 36/41
fedl2280xfull-04 ml22808/ml22804/ml22802-xxx power supply wiring the power supplies of this lsi are divided into the following three: ? digital power supply (dv dd ) ? rom power supply (pv dd ) ? analog power supply (av dd ) as shown in the figure below, supply dv dd , pv dd , and av dd from the same power supply, and separate them into analog and digital power supplies in the wiring. when power supply voltage = 3 v dv dd a v dd dgnd agnd 3 v ml22808/ml22804/ml22802-xxx/ ml22p808/ml22p804/ml22p802-xxx pv dd pgnd 37/41
fedl2280xfull-04 ml22808/ml22804/ml22802-xxx application circuits ? ml22808/ml22804/ml22p808/ml22p804 aout sel1 sel0 dv dd pv dd av dd dgnd pgnd agnd r ese t c s sck di ncr b usy diph test0,1 vpp xt xt mcu 4.096mhz 33pf 3.3v speaker amplifier 33pf ? ml22802/ml22p802 mcu r ese t c s sck di ncr 4.096mhz 33pf 33pf speaker amplifier aout sel dv dd pv dd av dd dgnd pgnd agnd b usy diph test0,1, 2 vpp xt 3.3v xt 38/41
fedl2280xfull-04 ml22808/ml22804/ml22802-xxx package dimensions ( unit: mm ) ssop30-p-56-0.65-k mirror finish package material epoxy resin lead frame material 42 alloy pin treatment solder plating ( 5 m) package weight (g) 0.19 typ. 5 rev. no./last revised 5/dec. 5, 1996 notes for mounting the su rface mount type package the surface mount type packages are ve ry susceptible to heat in reflow mounting and humidity absorbed in storage. therefore, before you perform reflow mounting, contact rohm?s responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times). 39/41
fedl2280xfull-04 ml22808/ml22804/ml22802-xxx revision history page document no. date previous edition current edition description fedl2280xfull-01 sep. 29, 2006 ? ? final edition 1 ? ? final edition 2 ? 1 to 8, 11, 20, 22, 24 to 26, and 36 the product names (ml22802 and ml22p808/ ml22p804/ml22p802) have been added. fedl2280xfull-02 apr. 09, 2007 ? 18 volume change timing by the vol channel in the ?timing diagrams? section has been modified. ? 22 the explanation for power down was modified. fedl2280xfull-03 dec.25.2007 ? 1,9 to 11, operating temperature was expanded. fedl2280xfull-04 nov. 11, 2009 41 41 change the item of ?notice? 40/41
fedl2280xfull-04 ml22808/ml22804/ml22802-xxx notice no copying or reproduction of this document, in part or in whole, is permitted without the consent of lapis semiconductor co., ltd. the content specified herein is subject to change for improvement without notice. the content specified herein is for the purpose of introducing lapis semiconductor's products (hereinafter "products"). if you wish to use any such product, pleas e be sure to refer to the specifications, which can be obtained from lapis semiconductor upon request. examples of application circuits, circuit constants a nd any other information contained herein illustrate the standard usage and operations of th e products. the peripheral conditions must be taken into account when designing circuits for mass production. great care was taken in ensuring the accuracy of the info rmation specified in this document. however, should you incur any damage arising from any inaccuracy or misprint of such information, lapis semiconductor shall bear no responsibility for such damage. the technical information specified herein is intended on ly to show the typical functions of and examples of application circuits for the products. lapis semiconducto r does not grant you, explicitly or implicitly, any license to use or exercise intellectual property or other rights held by lapis semiconductor and other parties. lapis semiconductor shall bear no responsibility whatso ever for any dispute arising from the use of such technical information. the products specified in this document are intended to be used with general-use electronic equipment or devices (such as audio visual equipment, office-automation equipment, communication devices, electronic appliances and amusement devices). the products specified in this document are not designed to be radiation tolerant. while lapis semiconductor always makes efforts to enhance the quality and reliability of its products, a product may fail or malfunction for a variety of reasons. please be sure to implement in your equipment usi ng the products safety measures to guard against the possibility of physical injury, fire or any other damage caused in the event of the failure of any product, such as derating, redundancy, fire control and fail-safe desi gns. lapis semiconductor shall bear no responsibility whatsoever for your use of any product outside of the prescribed scope or not in accordance with the instruction manual. the products are not designed or manufactured to be used with any equipment, device or system which requires an extremely high level of reliability the failure or malfunction of which may result in a direct threat to human life or create a risk of human injury (suc h as a medical instrument, transportation equipment, aerospace machinery, nuclear-reactor controller, fuel-controller or other safety device). lapis semiconductor shall bear no responsibility in any way for use of any of the products for the above special purposes. if a product is intended to be used for an y such special purpose, please contact a rohm sales representative before purchasing. if you intend to export or ship overseas any product or technology specified herein that may be controlled under the foreign exchange and the foreign trade law, you will be required to obtain a license or permit under the law. copyright 2009 - 2011 lapis semiconductor co., ltd. 41/41

▲Up To Search▲

Price & Availability of FEDL2280X-04

	To Download FEDL2280X-04 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .