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  FW705 rev.0 i page 1 of 4 i www.onsemi.com features composite type with a p-channel mosfet driving from a 2.5v supply voltage contained in a single package. high-density mounting. specifications absolute maximum ratings at ta=25 c parameter symbol conditions ratings unit drain-to-source voltage v dss - -20 v gate-to-source voltage v gss 10 v drain current (dc) i d -- 6 a drain current (pw 10 s) i dp duty cycle 1% --52 a allowable power dissipation p d when mounted on ceramic substrate (1500mm 2 ? 0.8mm) 1unit, pw 10s 2.3 w t otal dissipation p t when mounted on ceramic substrate (1500mm 2 ? 0.8mm), pw 10s 2.5 w channel temperature tch 150 c storage temperature tstg - -55 to +150 c electrical characteristics at ta=25 c ratings parameter symbol conditions min typ max unit drain-to-source breakdown voltage v (br)dss i d =--1ma, v gs =0v --20 v zero-gate voltage drain current i dss v ds =- -20v, v gs =0v --1 a gate-to-source leakage current i gss v gs = 8v, v ds =0v 10 a cutoff voltage v gs (off) v ds =- -10v, i d =- -1ma --0.4 --1.4 v forward transfer admittance ? yfs ? v ds =- -10v, i d =- -6a 7.8 13 s static drain-to-source on-state resistance r ds (on)1 i d =--6a, v gs =- -4v 30 40 m ? r ds (on)2 i d =--3a, v gs =- -2.5v 42 59 m ? marking : w705 continued on next page. ordering number : ena1030 FW705 p-channel silicon mosfet general-purpose switching device applications ? 2011, scillc. all rights reserved. jan-2011, rev. 0 www.onsemi.com publication order number: FW705/d
FW705 rev.0 i page 2 of 4 i www.onsemi.com continued from preceding page. ratings parameter symbol conditions min typ max unit input capacitance ciss v ds =--10v, f=1mhz 1720 pf output capacitance coss v ds =--10v, f=1mhz 260 pf reverse transfer capacitance crss v ds =--10v, f=1mhz 245 pf t urn-on delay time t d (on) see specified test circuit. 19 ns rise time t r see specified test circuit. 390 ns t urn-off delay time t d (off) see specified test circuit. 110 ns fall time t f see specified test circuit. 145 ns t otal gate charge qg v ds =--10v, v gs =--4v, i d =--6a 18.4 nc gate-to-source charge qgs v ds =--10v, v gs =--4v, i d =--6a 3.2 nc gate-to-drain ?iller?charge qgd v ds =--10v, v gs =--4v, i d =--6a 5.2 nc diode forward voltage v sd i s =--6a, v gs =0v --0.82 --1.2 v package dimensions electrical connection unit : mm (typ) 7005-003 switching time test circuit 14 5 8 5.0 4.4 6.0 0.3 1.5 1.8 max 0.1 0.595 1.27 0.2 0.43 1 : source1 2 : gate1 3 : source2 4 : gate2 5 : drain2 6 : drain2 7 : drain1 8 : drain1 sanyo : sop8 pw=10 s d.c. 1% p. g 50 ? g s d i d = --6a r l =1.67 ? v dd = --10v v out FW705 v in 0v - -4v v in 8765 1234 1 : source1 2 : gate1 3 : source2 4 : gate2 5 : drain2 6 : drain2 7 : drain1 8 : drain1 t op view
FW705 rev.0 i page 3 of 4 i www.onsemi.com drain-to-source voltage, v ds -- v drain current, i d -- a gate-to-source voltage, v gs -- v drain current, i d -- a i d -- v ds i d -- v gs -- 1 -- 2 -- 3 -- 4 -- 5 -- 6 -- 7 -- 8 0 0 -- 1 -- 2 -- 3 -- 5 -- 6 - -0.2 -- 4 0 - -0.4 --0.6 --0.8 --1.0 - -0.1 --0.3 --0.5 --0.7 --0.9 v gs = --1.0v - -1.5v -- 2 . 0v - -2.5v - -8.0v it09896 0- -0.2 --0.4 --0.6 --0.8 --1.0 --1.2 --1.4 --1.6 --1.8 --2.0 v ds = --10v 25 c - -25 c t a=75 c it09897 - -4.0v - -5.0v -- 6 . 0v drain current, i d -- a forward transfer admittance, ? y fs ? -- s diode forward voltage, v sd -- v source current, i s -- a i s -- v sd ? y fs ? -- i d static drain-to-source on-state resistance, r ds (on) -- m ? static drain-to-source on-state resistance, r ds (on) -- m ? gate-to-source voltage, v gs -- v ambient temperature, ta -- c r ds (on) -- v gs r ds (on) -- ta - -60 --40 --20 0 20 40 60 80 100 120 140 160 -- 0 -- 1 -- 2 -- 3 -- 4 -- 6 -- 7 -- 5 -- 8 it09898 20 30 10 40 50 60 70 80 90 100 0 it09900 10 20 30 40 50 60 70 80 90 0 ta=25 c - -6a i d = --3a v gs = --4.0v, i d = --6a v gs = --2.5v, i d = --3a it09901 - -0.01 --0.1 23 57 23 57 2 3 57 - -1.0 --10 3 1.0 7 5 3 2 0.1 7 10 2 5 3 2 v ds = --10v 75 c 25 c t a= --25 c it09902 - -0.3 --0.4 --0.5 --0.6 --0.7 --0.8 --0.9 --1.0 --1.1 - -0.01 - -0.1 - -10 7 5 3 2 2 - -1.0 7 5 3 2 7 5 3 v gs =0v - -25 c 25 c t a=75 c 0--5- -10 --15 --20 100 1000 5 3 2 7 5 3 2 f=1mhz ciss coss crss it09904 - -0.01 --0.1 23 57 2 - -1.0 357 2 - -10 357 2 100 7 5 3 2 1000 7 5 3 2 10 v dd = -- 10v v gs = -- 4 v t d (on) t d (off) t r t f it09903 drain-to-source voltage, v ds -- v ciss, coss, crss -- pf drain current, i d -- a switching time, sw time -- ns ciss, coss, crss -- v ds sw time -- i d
FW705 rev.0 i page 4 of 4 i www.onsemi.com a s o drain-to-source voltage, v ds -- v drain current, i d -- a v gs -- qg t otal gate charge, qg -- nc gate-to-source voltage, v gs -- v 02 6 10 14 4812 16 20 18 0 - -0.5 - -1.0 - -1.5 - -2.0 - -2.5 - -3.0 - -3.5 - -4.0 v ds = --10v i d = --6a it09906 0 0 20 40 60 80 100 120 1.2 0.8 0.4 2.8 2.4 2.3 2.5 2.0 1.6 140 160 it13259 - -1.0 - -10 - -100 - -0.01 - -0.1 2 3 5 7 2 3 5 7 2 3 5 7 2 3 5 7 it13258 - -0.01 23 57 - -1.0 --10 - -0.1 23 57 23 57 23 i d = --6a operation in this area is limited by r ds (on). 10ms 100ms 1m s i dp = --52a dc operation ( ta =25 c) 10s 1unit 10 s t a=25 c single pulse when mounted on ceramic substrate (1500mm 2 ? 0.8mm) t otal dissipation p d -- ta ambient temperature, ta -- c allowable power dissipation, p d -- w p d (fet1) -- p d (fet2) allowable power dissipation, p d (fet2) -- w allowable power dissipation, p d (fet1) -- w 0 0.5 1.0 1.5 2.0 2.5 2.3 3.0 0 0.5 1.0 1.5 2.0 3.0 2.5 2.3 it13325 when mounted on ceramic substrate (1500mm 2 ? 0.8mm), pw 10s when mounted on ceramic substrate (1500mm 2 ? 0.8mm), pw 10s FW705/d   
   
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on semiconductor and the on logo are registered trademarks of semiconductor components industries, llc (scillc). scillc reserve s the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any partic ular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitatio n special, consequential or incidental damages. scillc strives to supply high-quality high-reliability products and recommends adopting safety measures when designing equipment to avoid accidents or m alfunctions. such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. "typical" parameter s which may be provided in scillc data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including "typic als," must be validated for each customer application by customer? technical experts. scillc shall not be held liable for any claim or suits with regard to a third party? intellectual property rights which has resulted from the use of the technical information and products mentioned above. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any o ther application in which the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or u nauthorized application, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affi liates, and distributors harmless against all claims, costs, damages, and expen ses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scil lc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affi rmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner.


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