? semiconductor components industries, llc, 2013 march, 2013 ? rev. 4 1 publication order number: nss40600cf8/d nss40600cf8t1g, SNSS40600CF8T1G 40 v, 7.0 a, low v ce(sat) pnp transistor on semiconductor?s e 2 poweredge family of low v ce(sat) transistors are miniature surface mount devices featuring ultra low saturation voltage (v ce(sat) ) and high current gain capability. these are designed for use in low voltage, high speed switching applications where affordable efficient energy control is important. typical applications are dc ? dc converters and power management in portable and battery powered products such as cellular and cordless phones, pdas, computers, printers, digital cameras and mp3 players. other applications are low voltage motor controls in mass storage products such as disc drives and tape drives. in the automotive industry they can be used in air bag deployment and in the instrument cluster. the high current gain allows e 2 poweredge devices to be driven directly from pmu?s control outputs, and the linear gain (beta) makes them ideal components in analog amplifiers. features ? s prefix for automotive and other applications requiring unique site and control change requirements; aec ? q101 qualified and ppap capable ? these are pb ? free devices* *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. collector 1, 2, 3, 6, 7, 8 4 base 5 emitter http://onsemi.com device package shipping ? ordering information ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our t ape and reel packaging specifications brochure, brd8011/d. chipfet case 1206a style 4 marking diagram c c c b c c c e pin connections 5 6 7 81 2 3 4 va = specific device code m = month code = pb ? free package nss40600cf8t1g chipfet (pb ? free) 3,000 / tape & reel ? 40 volts, 7.0 amps pnp low v ce(sat) transistor equivalent r ds(on) 45 m va m SNSS40600CF8T1G chipfet (pb ? free) 3,000 / tape & reel
nss40600cf8t1g, SNSS40600CF8T1G http://onsemi.com 2 maximum ratings (t a = 25 c) rating symbol max unit collector-emitter voltage v ceo ? 40 vdc collector-base voltage v cbo ? 40 vdc emitter-base voltage v ebo ? 7.0 vdc collector current ? continuous i c ? 6.0 adc collector current ? peak i cm ? 7.0 a electrostatic discharge esd hbm class 3b mm class c thermal characteristics characteristic symbol max unit total device dissipation, t a = 25 c derate above 25 c p d (note 1) 830 6.7 mw mw/ c thermal resistance, junction ? to ? ambient r ja (note 1) 150 c/w total device dissipation, t a = 25 c derate above 25 c p d (note 2) 1.4 11.1 w mw/ c thermal resistance, junction ? to ? ambient r ja (note 2) 90 c/w thermal resistance, junction ? to ? lead #1 r jl (note 2) 15 c/w total device dissipation (single pulse < 10 sec) p dsingle (notes 2 & 3) 2.75 w junction and storage temperature range t j , t stg ? 55 to +150 c stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above t he recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may af fect device reliability. 1. fr ? 4 @ 100 mm 2 , 1 oz copper traces. 2. fr ? 4 @ 500 mm 2 , 1 oz copper traces. 3. thermal response.
nss40600cf8t1g, SNSS40600CF8T1G http://onsemi.com 3 electrical characteristics (t a = 25 c unless otherwise noted) characteristic symbol min typical max unit off characteristics collector ? emitter breakdown voltage (i c = ? 10 madc, i b = 0) v (br)ceo ? 40 ? ? vdc collector ? base breakdown voltage (i c = ? 0.1 madc, i e = 0) v (br)cbo ? 40 ? ? vdc emitter ? base breakdown voltage (i e = ? 0.1 madc, i c = 0) v (br)ebo ? 7.0 ? ? vdc collector cutoff current (v cb = ? 40 vdc, i e = 0) i cbo ? ? ? 0.1 adc emitter cutoff current (v eb = ? 7.0 vdc) i ebo ? ? ? 0.1 adc collector cutoff current (v cb = ? 6.5 vdc, v be(off) = 0 vdc) i ceo ? ? ? 10 adc on characteristics dc current gain (note 4) (i c = ? 10 ma, i c = ? 2.0 v) (i c = ? 500 ma, v ce = ? 2.0 v) (i c = ? 1.0 a, v ce = ? 2.0 v) (i c = ? 2.0 a, v ce = ? 2.0 v) (i c = ? 3.0 a, v ce = ? 2.0 v) h fe 250 250 220 180 150 ? ? 300 ? ? ? ? ? ? ? collector ? emitter saturation voltage (note 4) (i c = ? 0.1 a, i b = ? 0.010 a) (note 5) (i c = ? 1.0 a, i b = ? 0.100 a) (i c = ? 1.0 a, i b = ? 0.010 a) (i c = ? 2.0 a, i b = ? 0.020 a) (i c = ? 3.0 a, i b = ? 0.030 a) (i c = ? 4.0 a, i b = ? 0.400 a) v ce(sat) ? ? ? ? ? ? 0.007 0.045 0.080 0.150 0.180 0.160 ? 0.010 ? 0.075 ? 0.110 ? 0.200 ? 0.250 ? 0.220 v base ? emitter saturation voltage (note 4) (i c = ? 1.0 a, i b = ? 0.01 a) v be(sat) ? ? ? 0.90 v base ? emitter turn ? on voltage (note 4) (i c = ? 2.0 a, v ce = ? 3.0 v) v be(on) ? ? ? 0.90 v cutoff frequency (i c = ? 100 ma, v ce = ? 5.0 v, f = 100 mhz) f t 100 ? ? mhz input capacitance (v eb = ? 0.5 v, f = 1.0 mhz) cibo ? ? 650 pf output capacitance (v cb = ? 3.0 v, f = 1.0 mhz) cobo ? ? 150 pf switching characteristics delay (v cc = 30 v, i c = 750 ma, i b1 = 15 ma) t d ? ? 120 ns rise (v cc = 30 v, i c = 750 ma, i b1 = 15 ma) t r ? ? 220 ns storage (v cc = 30 v, i c = 750 ma, i b1 = 15 ma) t s ? ? 650 ns fall (v cc = 30 v, i c = 750 ma, i b1 = 15 ma) t f ? ? 240 ns 4. pulsed condition: pulse width = 300 sec, duty cycle 2%. 5. guaranteed by design but not tested.
nss40600cf8t1g, SNSS40600CF8T1G http://onsemi.com 4 figure 1. collector emitter saturation voltage vs. collector current figure 2. collector emitter saturation voltage vs. collector current 0.001 i c , collector current (a) 0.20 0.05 0 0.01 0.1 1.0 10 0.10 0.15 0.25 i c /i b = 10 v ce(sat) , collector emitter saturation voltage (v) v ce(sat) = 150 c 25 c ? 55 c 0.001 i c , collector current (a) 0.20 0.05 0 0.01 0.1 1.0 10 0.10 0.15 0.35 i c /i b = 100 v ce(sat) , collector emitter saturation voltage (v) v ce(sat) = 150 c 25 c ? 55 c 0.25 150 c 25 c ? 55 c figure 3. dc current gain vs. collector current figure 4. base emitter saturation voltage vs. collector current figure 5. base emitter turn ? on voltage vs. collector current figure 6. saturation region i c , collector current (a) i c , collector current (a) 0.01 0.001 1.0 0.4 0.1 0.001 i c , collector current (a) 0.6 0.4 0.2 0.1 i b , base current (ma) 0.01 1.0 0.6 0.4 0.2 0 0.01 0.1 10 1.0 100 0.1 0.6 0.8 0.8 0.2 150 c 25 c ? 55 c 0.8 1.0 1.0 10 50 150 250 350 450 550 650 0.001 0.01 0.1 1.0 10 h fe , dc current gain 1.0 1.2 v be(sat) , base emitter saturation voltage (v) v be(on) , base emitter turn ? on voltage (v) 10 v ce , collector ? emitter voltage (v) i c = 500 ma 10 ma 100 ma 300 ma v ce = ? 1.0 v 0.30 750 0.7 0.5 0.3 0.9 150 c (5 v) 150 c (2 v) 25 c (5 v) 25 c (2 v) ? 55 c (5 v) ? 55 c (2 v) 1.1 0.5 0.7 0.9 0.3 i c /i b = 10
nss40600cf8t1g, SNSS40600CF8T1G http://onsemi.com 5 v ce (v dc ) figure 7. input capacitance v eb , emitter base voltage (v) 0 600 550 450 350 300 3.0 1.0 2.0 400 750 500 5.0 4.0 6.0 0.01 0.1 1.0 10 0.01 1.0 10 100 c ibo (pf) c ibo , input capacitance (pf) figure 8. output capacitance v cb , collector base voltage (v) 0 150 125 75 50 5.0 100 175 10 15 35 c obo (pf) c obo , output capacitance (pf) figure 9. safe operating area 20 i c (a) 1.0 ms 10 ms 100 ms 1.0 s thermal limit 200 225 0.1 700 650 25 30
nss40600cf8t1g, SNSS40600CF8T1G http://onsemi.com 6 package dimensions chipfet case 1206a ? 03 issue k soldering footprint* 0.457 0.018 2.032 0.08 pitch basic style 2.362 0.093 1 8x 8x mm inches 0.65 0.025 0.66 0.026 2.032 0.08 1.727 0.068 0.66 0.026 2.362 0.093 style 4 0.457 0.018 1 2x 2x mm inches *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. e a b e e1 d 1234 8765 c l 1 2 3 4 8 7 6 5 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. mold gate burrs shall not exceed 0.13 mm per side. 4. leadframe to molded body offset in horizontal and vertical shall not exceed 0.08 mm. 5. dimensions a and b exclusive of mold gate burrs. 6. no mold flash allowed on the top and bottom lead surface. 0.05 (0.002) dim a min nom max min millimeters 1.00 1.05 1.10 0.039 inches b 0.25 0.30 0.35 0.010 c 0.10 0.15 0.20 0.004 d 2.95 3.05 3.10 0.116 e 1.55 1.65 1.70 0.061 e 0.65 bsc e1 0.55 bsc l 0.28 0.35 0.42 0.011 0.041 0.043 0.012 0.014 0.006 0.008 0.120 0.122 0.065 0.067 0.025 bsc 0.022 bsc 0.014 0.017 nom max 1.80 1.90 2.00 0.071 0.075 0.079 h e 5 nom 5 nom h e style 4: pin 1. collector 2. collector 3. collector 4. base 5. emitter 6. collector 7. collector 8. collector on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5817 ? 1050 nss40600cf8/d chipfet is a trademark of vishay siliconix. literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your loca l sales representative
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