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  this is information on a product in full production. july 2015 docid027784 rev 1 1/14 acst310-8b overvoltage protected ac switch datasheet ? production data features ? ac switch with self over voltage protection ? microcontroller direct driven (low gate current max. 10 ma) ? three quadrants (q1, q2 and q3) ? ul94-v0 qualified resin (flammability) ? ecopack ? 2 compliant component benefits ? enables equipment to meet iec61000-4-5 ? high immunity against fast transients described in iec61000-4-4 standard ? needs no external overvoltage protection ? high off-state reliability power device ? interfaces directly with the microcontroller ? reduces component count applications ? ac static switching in appliances and industrial control systems ? driving low power highly inductive loads or resistive ac loads, such as motor control circuits, small home appliances, lighting, fan speed controllers, water valves, pumps, solid state relays, vacuum cleaners, heaters description the acst310-8b belongs to the acs? / acst power switch family built with a.s.d. ? (application specific discrete) technology. this high performance device is suited to home appliances or industrial systems and drives loads up to 3 a. this acst310-8b switch embeds a triac structure and a high voltage clamping device able to absorb the inductive turn-off energy and withstand line transients such as those described in the iec 61000-4-5 standard.the component needs a low gate current to be activated (i gt max. 10 ma) and still shows a high electrical noise immunity complying with iec standards such as iec 61000-4-4 (fast transient burst test). figure 1. functional diagram acs?, is a trademark of stmicroelectronics. ? : a.s.d., ecopack are registered trademarks of stmicroelectronics &20 * 287 '3$. table 1. device summary symbol value unit i t(rms) 3a i gt(q1, q2, q3) 10 ma v drm /v rrm 800 v * &20 287 www.st.com
characteristics acst310-8b 2/14 docid027784 rev 1 1 characteristics table 2. absolute ratings (limiting values) symbol parameter test conditions value unit i t(rms) on-state rms current (full sine wave) t c = 112 c 3 a i tsm non repetitive surge peak on-state current (t j initial = 25 c) f = 50 hz tp = 20 ms 20 a f = 60 hz tp = 16.7 ms 21 i 2 ti 2 t value for fusing tp = 10 ms 2.6 a2s di/dt critical rate of rise of on-state current i g = 2 x i gt, t r = 100 ns f = 120 hz t j = 125 c 50 a/s v pp (1) non repetitive line peak mains voltage t j = 25 c 2 kv p g(av) average gate power dissipation t j = 125c 0.1 w p gm peak gate power t p = 20 s t j = 125 c 10 w i gm peak gate current t p = 20 s t j = 125c 1.6 a t stg storage junction temperature range -40 to +150 c t j operating junction temperature range -40 to +125 c t l maximum lead temperature for soldering during 10 s 260 c 1. according to test described by standard iec 61000-4-5 standard (see figure 16 ). table 3. electrical characteristics symbol test conditions quadrant t j value unit i gt (1) v out = 12 v, r l = 33 i - ii - iii 25 c max. 10 ma v gt max. 1.1 v v gd v out = v drm , r l = 3.3 k i - ii - iii 125 c min. 0.2 v i h (2) i out = 100 ma 25 c max. 20 ma i l i g = 1.2 x i gt i - iii 25 c max. 25 ma ii 35 dv/dt (2) v out = 67% v drm , gate open 125 c min. 1000 v/s (di/dt)c (2) (dv/dt)c = 0.1v/s 125 c min. 5 a/ms (di/dt)c (2) (dv/dt)c = 10 v/s 125 c min. 1 a/ms v cl i cl = 0.1 ma, tp = 1 ms 25 c min. 850 v 1. minimum i gt is guaranteed at 5% of i gt max. 2. for both polarities of out pin referenced to com pin
docid027784 rev 1 3/14 acst310-8b characteristics 14 table 4. static characteristics symbol test conditions value unit v tm (1) i tm = 4.2 a, t p = 380 s t j = 25 c max. 1.8 v v to (1) threshold voltage t j = 125c max. 0.9 v r d (1) dynamic resistance t j = 125 c max. 200 m i drm i rrm v out = v drm / v rrm t j = 25 c max. 10 a t j = 125 c 500 1. for both polarities of out pin referenced to com pin table 5. thermal resistances symbol parameter value unit r th(j-c) junction to case (ac) 3 c/w r th(j-a) junction to ambient 70 c/w figure 2. maximum power dissipation versus rms on-state current (full cycle) figure 3. on-state rms current versus case temperature 3 :              d ? ? , 7 506 $ , 7 506 $            7 f ?& . ?
characteristics acst310-8b 4/14 docid027784 rev 1 figure 4. on-state rms current versus ambient temperature (free air convection) figure 5. relative variation of thermal impedance versus pulse duration            , 7 506 $ 7 d ?& .  ?    ( ( ( ( ( ( ( . >= wk 5 wk @ = wk md = wk mf w 3 v figure 6. non repetitive surge peak on-state current for a sinusoidal pulse with width: tp < 10ms figure 7. surge peak on-state current versus number of cycles ( ( ( ( (     7 - lqlwldo ?& , 760 , 760 $ w s pv gogwolplwdwlrq $?v          1rquhshwlwlyh7 -  ?& 1xpehurif\fohv , 760 $ 5hshwlwlyh7 f  ?& 2qhf\foh w pv
docid027784 rev 1 5/14 acst310-8b characteristics 14 figure 8. relative variation of holding current and latching current versus junction temperature (typical values) figure 9. relative variation of gate trigger current and gate trigger voltage versus junction temperature (typical values)                  , / 7 - ?& , + , / >7 - @, + , / >7 -  ?&@ , +                  , *7 44 9 *7  444 7 - ?& , *7 9 *7 >7 - @, *7 9 *7 >7 -  ?&@ , *7 4 figure 10. on-state characteristics (maximum values) figure 11. relative variation of critical rate of decrease of main current versus junction temperature (typical values) , 70 $                7 -  ?& 7 -  ?& 9 70 9 7 -  pd[ 9 72  9 5 '  p                  7 - ?& gogw f  >7 -  @ gogw f>7 -  ?&@
characteristics acst310-8b 6/14 docid027784 rev 1 figure 14. relative variation of critical rate of decrease of main current versus reapplied (dv/dt)c figure 12. relative variation of static dv/dt immunity versus junction temperature figure 13. relative variation of leakage current versus junction temperature (typical values)           7 - ?& g9gw  >7 - @g9gw>7 -  ?&@ 9 '50  9 550  9 ( ( ( (      7 - ?& , '50 , 550  >7 - @, '50 , 550  >7 -  ?&@ 9 '50  9 550  9            g9gw f 9?v gogw f> g9gw f@vshflilhg gogw f 7 -  ?&
docid027784 rev 1 7/14 acst310-8b application information 14 2 application information 2.1 typical application description the acst310 device has been designed to switch on and off, or by phase angle control, highly inductive or resistive loads such as pump, valve, fan, or bulb lamps. thanks to its high sensitivity (i gt max = 10 ma), the acst310 can be driven directly by logic level circuits through a resistor as shown on the typical application diagram ( figure 15 ). figure 15. ac induction motor control - typical diagram $&0dlqv /lqh $&/rdg / 5 0&8 3rzhuvxsso\ $&67 5j
application information acst310-8b 8/14 docid027784 rev 1 figure 16. phase angle control typical diagram (inductive or resistive load) * &20 287 $&pdlqv 'ldf 9duldeohuhvlvwru &dsdflwru ,qgxfwlyhruuhvlvwlyhordg
docid027784 rev 1 9/14 acst310-8b application information 14 2.2 ac line transient voltage ruggedness in comparison with standard triacs, which are not robust against surge voltage, the acst310 is self-protected against over-voltage, specified by the parameter v cl . in addition, the acst310 is a sensitive device (i gt max. 10 ma), but provides a high noise immunity level against fast transients. the acst310 switch can safely withstand ac line transient voltages either by clamping the low energy spikes, such as inductive spikes at switch off, or by switching to the on state (for less than 10 ms) to dissipate higher energy shocks through the load. this safety feature works even with high turn-on current ramp up. the test circuit of figure 17 represents the acst310 application, and is used to stress the acst310 switch according to the iec 61000-4-5 standard conditions. with the additional effect of the load which is limiting the current, the acst310 switch withstands the voltage spikes up to 2 kv on top of the peak line voltage. the protection is based on an overvoltage crowbar technology. the acst310 folds back safely to the on state as shown in figure 18 . the acst310 recovers its blocking voltage capability after the surge and the next zero current crossing. such a non-repetitive test can be done at least 10 times on each ac line voltage polarity. figure 17. overvoltage ruggedness test circuit for resistive and inductive loads for iec 61000-4-5 standards $&pdlqv )lowhulqjxql w 0rghoriwkhordg $&67 n9vxujh 5  / ?+ 9 33  n9 ?  5j  ? 5 j 5 / 5 jhqh 6xujhjhqhudwru
application information acst310-8b 10/14 docid027784 rev 1 figure 18. typical voltage and current waveforms across the acst310-8b during iec 61000-4-5 standard test 2.3 electrical noise immunity the acst310 is a sensitive device (i gt max. 10 ma) and can be controlled directly through a simple resistor by a logic level circuit, and still provides a high electrical noise immunity. the intrinsic immunity of the acst310 is shown by the specified dv/dt equal to 1000 v/ s at 125 c. this immunity level is 5 to 10 times higher than the immunity provided by an equivalent standard technology triac with the same sensitivity. in other words, the acst310 with i gt = 10 ma has immunity comparable only for higher gate current device (i gt higher than 35 ma). , 9   9 , shdn shdn $ ?vyrowdjhvxujh ?vfxuuhqwvxujh g,gw %2  $?v %2 %uhdnryhu 
docid027784 rev 1 11/14 acst310-8b package information 14 3 package information ? epoxy meets ul94-v0 ? lead-free package ? halogen free molding compound in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions and product status are available at: www.st.com. ecopack ? is an st trademark. 3.1 dpak package information figure 19. dpak package outline ' $ ' ' f f / h e / ( e $ ( $ / 9 h +
package information acst310-8b 12/14 docid027784 rev 1 figure 20. dpak package outline table 6. dpak package mechanical data ref. dimensions millimeters inches typ. min. max. typ. min. max. a 2.18 2.40 0.0858 0.0945 a1 0.9 1.10 0.0354 0.0433 a2 0.03 0.23 0.0012 0.0091 b 0.64 0.90 0.0252 0.0354 b4 4.95 5.46 0.1949 0.2150 c 0.46 0.61 0.0181 0.0240 c2 0.46 0.60 0.0181 0.0236 d 5.97 6.22 0.2339 0.2449 d1 5.1 0.2008 e 6.35 6.73 0.25 0.2650 e1 4.32 0.1701 e 2.286 0.09 e1 4.572 0.18 h 9.35 10.40 0.3681 0.4094 l 1.0 1.78 0.0394 0.0701 l2 1.27 0.05 l4 0.6 1.02 0.0236 0.0401 v2 0 8 0 8       $ % 7khghylfhpxvwehsrvlwlrqhgzlwklq  $ %
docid027784 rev 1 13/14 acst310-8b ordering information 14 4 ordering information figure 21. ordering information scheme 5 revision history table 7. ordering information order code marking package weight base qty. packing mode acst310-8b acst 3108 dpak 0.32 g per pc. 75 tube ACST310-8BTR 2500 tape and reel $&67%75 6hulhv $&vzlwfk 7rsrorj\ 7 7uldf 2qvwdwhupvfxuuhqw  $ 6hqvlwlylw\  p$ 9rowdjh 3dfndjh % '3$.  9 3dfnlqjprgh 75 7dshdqguhho %odqn %odqn 7xeh table 8. document revision history date revision changes 08-jul-2015 1 first issue.
acst310-8b 14/14 docid027784 rev 1 important notice ? please read carefully stmicroelectronics nv and its subsidiaries (?st?) reserve the right to make changes, corrections, enhancements, modifications, and improvements to st products and/or to this document at any time without notice. purchasers should obtain the latest relevant in formation on st products before placing orders. st products are sold pursuant to st?s terms and conditions of sale in place at the time of o rder acknowledgement. purchasers are solely responsible for the choice, selection, and use of st products and st assumes no liability for application assistance or the design of purchasers? products. no license, express or implied, to any intellectual property right is granted by st herein. resale of st products with provisions different from the information set forth herein shall void any warranty granted by st for such product. st and the st logo are trademarks of st. all other product or service names are the property of their respective owners. information in this document supersedes and replaces information previously supplied in any prior versions of this document. ? 2015 stmicroelectronics ? all rights reserved


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