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lt3514 1 3514fa for more information www.linear.com/lt3514 typical application features applications description triple step-down switching regulator with 100% duty cycle operation the lt ? 3514 consists of three buck regulators (2a, 1a, 1a output current). the device has a wide operating input range of 3.2v to 36v. an on-chip boost regulator allows each channel to operate up to 100% duty cycle. the lt3514 is designed to minimize external component count and results in a simple and small application circuit. the lt3514 operates robustly in fault conditions. cycle- by-cycle peak current limit and catch diode current limit sensing protect the ic during overload conditions. ther - mal shutdown protects the power switches at elevated temperatures. soft-start helps control the peak inductor current during startup. the lt3514 also features output voltage tracking and sequencing, programmable frequency, programmable undervoltage lockout, and a power good pin to indicate when all outputs are in regulation. the lt3514 has one fewer channel (ch2) than the lt3504, and has one channel (ch3) that outputs 2a instead of 1a. the lt3514 in qfn is pin compatible with the lt3504. the lt3504 provides four 1a outputs. l , lt, ltc, ltm, linear technology, the linear logo and burst mode are registered trademarks of linear technology corporation. all other trademarks are the property of their respective owners. triple buck regulator lt3514 start-up and shutdown waveform. v in (top trace) is ramped from ov up to 8v and then back down to 0v. the other three traces are the output voltages of all three channels n wide input voltage range: 3.2v to 36v (40v transient) n three outputs: 2a, 1a, 1a n 100% duty cycle operation n resistor-programmed constant frequency n short-circuit robust n wide sync range: 350khz to 2.2mhz n anti-phase switching reduces ripple n feedback voltage: 800mv n independent run/soft-start pins n shutdown with uvlo n internal compensation n thermal shutdown n tiny 28-lead (4mm 5mm) thermally enhanced qfn package n 24-lead exposed pad tssop n automotive battery regulation n industrial control supplies n wall transformer regulation n distributed supply regulation 3514 ta01a 8.2h 1f pg 1f 2 10h v in 5.4v to 20v transient to 40v 47nf 18.2k 1mhz gnd lt3514 sky sw5 v in v in en/uvlopg run/ss1 run/ss3 run/ss4 rt/sync sw1 da1 fb1 1.8v/1a 100pf 12.7k 10.2k 22f sw3 da3 fb3 3.3v/2a 47pf 31.6k 10.2k 47f sw4 da4 fb4 5v/1a 22pf 53.6k 10.2k 22f 3.3h 4.7h 100ms/div 3514 ta01b 5v channel begins 100% dc operation uvlo = ~2.9v parts shuts off 3.3v channel begins 100% dc operation v in 1v/div ch4 1v/div ch3 1v/div ch1 1v/div downloaded from: http:///
lt3514 2 3514fa for more information www.linear.com/lt3514 pin configuration absolute maximum ratings en/uvlo ................................................................... 40v en/uvlo pin above v in .............................................. 5v v in ............................................................................ 40v sky ........................................................................... 46v sw5 .......................................................................... 47v run/ss ....................................................................... 6v fb ............................................................................... 6v rt/sync ..................................................................... 6v (note 1) 9 10 top view ufd package 28-lead (4mm 5mm) plastic qfn 29 gnd 11 12 13 28 27 26 25 24 14 23 6 5 4 3 2 1 ncnc da3 sw3sw1 da1 sw4 da4 ncfb3 fb1 fb4 gnd rt/sync en/uvlo run/ss3 v in gndv in skysw5 pg v in gnd v in run/ss4run/ss1 nc 7 17 18 19 20 21 2216 8 15 ja = 43c/w exposed pad (pin 29) is gnd, must be soldered to pcb 12 3 4 5 6 7 8 9 1011 12 top view fe package 24-lead plastic tssop 2423 22 21 20 19 18 17 16 15 14 13 v in nc da3 sw3sw3 sw1 da1 sw4 da4 nc v in v in skysw5 gnd pg fb3 fb1 fb4 rt/syncen/uvlo run/ss3 run/ss1 run/ss4 25 gnd ja = 33c/w exposed pad (pin 25) is gnd, must be soldered to pcb order information lead free finish tape and reel part marking* package description temperature range lt3514eufd#pbf lt3514eufd#trpbf 3514 28-lead (4mm 5mm) plastic qfn C40c to 125c lt3514iufd#pbf lt3514iufd#trpbf 3514 28-lead (4mm 5mm) plastic qfn C40c to 125c lt3514efe#pbf lt3514efe#trpbf lt3514fe 24-lead plastic tssop C40c to 125c lt3514ife#pbf lt3514ife#trpbf lt3514fe 24-lead plastic tssop C40c to 125c lt3514hfe#pbf lt3514hfe#trpbf lt3514fe 24-lead plastic tssop C40c to 150c consult ltc marketing for parts specified with wider operating temperature ranges. *the temperature grade is identified by a label on the shipping container. consult ltc marketing for information on non-standard lead based finish parts. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ pg ............................................................................. 25v operating junction temperature range (notes 2, 7) lt3514eufd ...................................... C40c to 125c lt3514iufd ....................................... C40c to 125c lt3514efe ......................................... C40c to 125c lt3514ife .......................................... C40c to 125c lt3514hfe ......................................... C40c to 150c storage temperature range .................. C65c to 150c downloaded from: http:///
lt3514 3 3514fa for more information www.linear.com/lt3514 electrical characteristics the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c. v in = 12v unless otherwise noted. symbol conditions min typ max units en/uvlo threshold voltage rising l 1.2 1.44 1.6 v en/uvlo threshold voltage hysteresis 110 mv en/uvlo threshold current hysteresis v en/uvlo = measured rising threshold C 50mv (note 3) 1.3 a internal v in undervoltage lockout 2.4 2.9 3.2 v quiescent current (v in ) in shutdown v en/uvlo = 0v 0.01 2 a quiescent current (v in ) v en/uvlo = 1v 4 10 a quiescent current (v in ) v en/uvlo = 1.5v, v run/ss(1,3,4) = open, v fb(1,3,4) = 0.9v, v sky = 17v (note 4) 2.7 ma quiescent current (sky) v en/uvlo = 1.5v, v run/ss(1,3,4) = open, v fb(1,3,4) = 0.9v, v sky = 17v (note 4) 4.4 ma run/ss pin source current v run/ss = 0v 1.3 a run/ss pin threshold for switching v fb = 0v 50 100 mv feedback voltage l 790 784 800 800 810 816 mv mv fb pin current v fb = measured v fb (note 5) l 15 150 na reference line regulation v in = 5v to 40v C0.015 %/v sky pin current i sw1 = 1a or i sw4 = 1a 27 40 ma sky pin current i sw3 = 2a 54 80 ma sky voltage above v in voltage v sky C v in 4.85 v switching frequency r t = 6.34k r t = 18.2k r t = 100k l l l 1.8 0.85 220 2.1 1 270 2.4 1.15 320 mhz mhz khz switching phase r t = 18.2k 150 180 210 deg sync threshold voltage 1.25 v sync input frequency 0.35 2.2 mhz switch current limit (sw1,4) (note 6) 1.45 1.75 2.1 a switch v cesat (sw1,4) i sw1, sw4 = 1a 400 mv switch leakage current (sw1,4) 0.1 2 a catch diode current limit (sw1,4) fb = 0v fb = 0.7v 0.75 1.0 1.15 1.45 1.33 1.67 a a switch current limit (sw3) (note 6) 3 3.5 4.2 a switch v cesat (sw3) i sw3 = 2a 400 mv switch leakage current (sw3) 0.1 4 a catch diode current limit (sw3) fb = 0v fb = 0.7v 1.5 2.0 2 2.5 2.4 3.0 a a switch current limit (sw5) (note 6) 220 320 ma switch v cesat (sw5) i sw = 200ma 230 mv switch leakage current (sw5) 0.1 2 a boost diode current limit (sw5) v in = 5v 350 450 ma pg threshold offset v fb rising 65 90 125 mv pg hysteresis v fb rising C v fb falling 35 mv downloaded from: http:///
lt3514 4 3514fa for more information www.linear.com/lt3514 efficiency, channel 4, f = 1mhz efficiency, channel 4, f = 1mhz efficiency, channel 4, f = 1mhz electrical characteristics note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: the lt3514e is guaranteed to meet performance specifications from 0c to 125c junction temperature. specifications over the C40c to 125c operating junction temperature range are assured by design, characterization and correlation with statistical process controls. the lt3514i is guaranteed over the full C40c to 125c operating junction temperature range. note 3: current flows into pin. note 4: the v in pin quiescent current and the sky pin quiescent current are specified in the electrical characteristics table. however, the quiescent current for an application circuit is higher than the sum of these two currents because the sky voltage is higher than v in , and there are power losses in the boost regulator. see the typical performance characteristics section for a plot of input quiescent current vs input voltage for a typical application. note 5: current flows out of pin. note 6: current limit is guaranteed by design and/or correlation to static test. slope compensation reduces current limit at higher duty cycles. note 7: this ic includes overtemperature protection that is intended to protect the device during momentary overload conditions. junction temperature will exceed 125c when overtemperature protection is active. continuous operation above the specified maximum operating junction temperature may impair device reliability. load current (a) 0 efficiency (%) 40 60 1 314 g01 20 0 0.2 0.1 0.3 0.5 0.4 0.6 0.7 0.9 0.8 8030 5010 70 v in = 6v v in = 12v v in = 24v v in = 36v v out = 1.8v load current (a) 0 efficiency (%) 40 60 1 3514 g02 20 0 0.2 0.1 0.3 0.5 0.4 0.6 0.7 0.9 0.8 9080 30 5010 70 v in = 6v v in = 12v v in = 24v v in = 36v v out = 2.5v load current (a) 0 efficiency (%) 40 60 1 3514 g03 20 0 0.2 0.1 0.3 0.5 0.4 0.6 0.7 0.9 0.8 9080 30 5010 70 v in = 6v v in = 12v v in = 24v v in = 36v v out = 3.3v symbol conditions min typ max units pg voltage output low i pg = 250a 180 300 mv pg pin leakage v pg = 2v 0.01 1 a the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c. v in = 12v unless otherwise noted. typical performance characteristics t a = 25c, unless otherwise noted. downloaded from: http:///
lt3514 5 3514fa for more information www.linear.com/lt3514 efficiency, channel 4, f = 1mhz load regulation channels 1 and 4 typical performance characteristics t a = 25c, unless otherwise noted. load current (a) 0 efficiency (%) 40 60 1 3514 g04 20 0 0.2 0.1 0.3 0.5 0.4 0.6 0.7 0.9 0.8 100 9080 30 5010 70 v in = 6v v in = 12v v in = 24v v in = 36v v out = 5v load current (a) 0 percent error (%) C3.0 C2.0 1 3514 g09 C4.0C5.0 0.2 0.1 0.3 0.5 0.4 0.6 0.7 0.9 0.8 0 C0.5C1.0 C3.5 C2.5C4.5 C1.5 v out = 1.8v v out = 2.5v v out = 3.3v v out = 5v v in = 12v load current (a) 0 efficiency (%) 40 60 2 3514 g05 20 0 0.4 0.2 0.6 1 0.8 1.2 1.4 1.8 1.6 8030 5010 70 v in = 6v v in = 12v v in = 24v v in = 36v v out = 1.8v load current (a) 0 efficiency (%) 40 60 2 3514 g06 20 0 0.4 0.2 0.6 1 0.8 1.2 1.4 1.8 1.6 9030 5010 70 80 v in = 6v v in = 12v v in = 24v v in = 36v v out = 2.5v load current (a) 0 efficiency (%) 40 60 2 3514 g07 20 0 0.4 0.2 0.6 1 0.8 1.2 1.4 1.8 1.6 9030 5010 70 80 v in = 6v v in = 12v v in = 24v v in = 36v v out = 3.3v load current (a) 0 efficiency (%) 40 60 2 3514 g08 20 0 0.4 0.2 0.6 1 0.8 1.2 1.4 1.8 1.6 100 9030 5010 70 80 v in = 6v v in = 12v v in = 24v v in = 36v v out = 5v efficiency, channel 3, f = 1mhz efficiency, channel 3, f = 1mhz efficiency, channel 3, f = 1mhz efficiency, channel 3, f = 1mhz en/uvlo threshold en/uvlo pin current v en/uvlo (v) 0 i en/uvlo (a) 0.8 1.2 2.0 3514 g12 0 0.4 0.2 0.6 1.0 0.8 1.2 1.6 1.4 1.8 2.01.8 1.6 0.4 0.60.2 1.0 1.4 25c C45c 150c temperature (c) C50 threshold (v) 1.30 1.40 125 3514 g11 1.20 0 C25 25 75 50 100 1.601.55 1.50 1.25 1.35 1.45 falling rising load current (a) 0 percent error (%) C0.5 2 3514 g10 C2.0C2.5 0.5 1 1.5 0.50.0 C1.5 C1.0 v in = 12v v out = 1.8v v out = 2.5v v out = 3.3v v out = 5v load regulation channel 3 downloaded from: http:///
lt3514 6 3514fa for more information www.linear.com/lt3514 fb voltage vs run/ss soft start current switching frequency vs temperature switch voltage drop switch and diode current limit, channel 3 switch and diode current limit run/ss voltage (mv) 0 fb voltage (mv) 400 1200 3514 g16 0 400 200 600 1000 800 900800 700 200 300100 500 600 temperature (c) C50 i run/ss (a) C1.8 C1.2 125 3514 g17 C2.0 0 C25 25 75 50 100 0 C0.6C0.8 C0.2C0.4 C1.6 C1.4 C1.0 switch current (ma) 0 switch voltage drop (mv) 100 2000 3514 g19 0 500 1500 1000 700600 500 400 200 300 channels 1, 4 channel 3 temperature (c) C50 current limit (a) 2.4 125 3514 g20 2.0 0 C25 25 75 50 100 4.03.8 2.8 2.2 2.6 3.2 3.63.0 3.4 temperature (c) C50 current limit (a) 1.2 125 3514 g21 1.0 0 C25 25 75 50 100 2.01.9 1.4 1.1 1.3 1.5 1.7 1.81.6 channels 1, 4 typical performance characteristics t a = 25c, unless otherwise noted. input voltage (v) 0 input quiescent current (ma) 25 45 3514 g15 10 0 10 5 15 25 20 30 40 35 4035 15 20 5 30 all ss = 2vall ss = 0v input quiescent current vs input voltage temperature (c) C50 frequency (mhz) 0.90 150 3514 g18 0.80 50 25 0 C25 75 125 100 1.201.10 1.151.05 0.85 0.95 1.00 r t = 18.2k input voltage undervoltage lockout v in pin current temperature (c) C50 uvlo (v) 2.2 2.8 125 3514 g13 2.0 0 C25 25 75 50 100 3.63.4 3.2 2.4 2.6 3.0 v en/uvlo (v) 0 i vin (a) 4 6 2.0 3514 g14 0 0.4 0.2 0.6 1.0 0.8 1.2 1.6 1.4 1.8 10 98 2 31 5 7 downloaded from: http:///
lt3514 7 3514fa for more information www.linear.com/lt3514 switch current limit, channel 3 switch beta, channel 3 duty cycle (%) 0 switch current limit (a) 2.4 100 3514 g22 2.0 40 20 60 80 4.03.8 2.8 2.2 2.6 3.0 3.4 3.63.2 temperature (c) C50 beta 50 52 150 125 3514 g23 40 0 C25 25 75 50 100 6056 42 44 46 48 54 58 1a 2a typical performance characteristics t a = 25c, unless otherwise noted. switch current limit, channels 1 and 4 switch beta, channels 1 and 4 duty cycle (%) 0 switch current limit (a) 1.1 100 3514 g24 1.0 20 40 80 60 2.01.9 1.4 1.2 1.3 1.5 1.81.6 1.7 temperature (c) C50 beta 50 125 3514 g25 40 0 C25 25 75 50 100 7060 45 55 65 0.5a 1a feedback voltage power good threshold minimum on-time temperature (c) C50 on-time (ns) 70 125 3514 g26 50 0 C25 25 75 50 100 120 9060 80 100 110 temperature (c) C50 feedback voltage (mv) 797 125 3514 g27 795 0 C25 25 75 50 100 805799 796 798 800 801 802 803 804 temperature (c) C50 threshold (mv) 640 125 3514 g28 600 0 C25 25 75 50 100 740680 620 660 700 720 falling rising downloaded from: http:///
lt3514 8 3514fa for more information www.linear.com/lt3514 pin functions nc (pins 1, 2, 14, 22/pins 2, 10): no connection. these pins have no connection to internal circuitry. they can be grounded or left floating. da (pins 3, 6, 8/pins 3, 7, 9): return the schottky catch diode anode to the diode anode (da) pin. an internal com - parator senses the diode current and prevents switching when the diode current is higher than the da pin current limit.sw (pins 4, 5, 7/pins 4, 5, 6, 8): the sw pins are the output of the internal power switches. connect each sw pin to an inductor and schottky catch diode cathode. v in (pins 9, 11, 26, 28/pins 1, 11, 12): the v in pins sup - ply current to the lt3514s internal regulator and to the internal power switches. the v in pins should be locally bypassed with a capacitor to ground, preferably to pins 27 and 10. they must be tied to the same input source. gnd (pins 10, 18, 27, exposed pad pin 29/pin 22, exposed pad pin 25): tie the gnd pins to a local ground plane below the lt3514 and the cir cuit components. the exposed pad must be soldered to the pcb and electrically connected to ground. use a large ground plane and thermal vias to optimize thermal performance. run/ss (pins 12, 13, 15/pins 13, 14, 15): the run/ss pins are used to soft start each channel and to allow each channel to track other outputs. output tracking is implemented by connecting a resistor divider to this pin from the tracked output. for soft start, tie a capacitor from this pin to ground. an internal 1.3a soft-start current charges the capacitor to create a voltage ramp at the pin. each channel can be individually shut down by pulling run/ss below 0.1v. en/uvlo (pin 16/pin 16): the en/uvlo pin is used to start up the internal regulator to power the reference and oscillator. it also starts up the internal boost regulator. pull the en/uvlo pin below 1.44v to shut down the lt3514. the lt3514 will draw less than 10a of current from the v in pin when en/uvlo is less than 1.44v. pull en/uvlo pin below 0.7v to put the lt3514 in a state where the part draws 0a from the v in pin. the threshold can function as an accurate undervoltage lockout (uvlo), preventing the regulator from operating until the input voltage has reached the programmed level. do not drive the en/uvlo pin more than 5v above v in . (qfn/tssop) operating waveforms, discontinuous mode operating waveforms, continuous mode 500ns/div 3514 g29 sw1 10v/div sw3 10v/div sw4 10v/div i out1,3,4 = 40ma v out1,3,4 = 5v 500ns/div 3514 g30 sw1 10v/div sw3 10v/div sw4 10v/div i out1,3,4 = 0.5a v out1,3,4 = 5v typical performance characteristics t a = 25c, unless otherwise noted. downloaded from: http:///
lt3514 9 3514fa for more information www.linear.com/lt3514 rt/sync (pin 17/pin 17): set the switching frequency of the lt3514 by tying an external resistor from this pin to ground. select the value of the programming resistor (r t ) according to table 1 in the applications information section. the rt/sync pin is also used to synchronize the internal oscillator of the lt3514 to an external signal. the synchronization (sync) signal is directly logical compatible and can be driven by any signal with pulse width greater than 50ns. the synchronization range is from 350khz to 2.2mhz. fb (pins 19, 20, 21/pins 18,19, 20): each feedback pin is regulated to 800mv. connect the feedback resistor divider to this pin. the output voltage is programmed according to the following equation: r1 = r2 ? v out 0.8v ? 1 ?? ? ?? ? where r1 connects between out and fb, and r2 connects between fb and gnd. a good value for r2 is 10.2k?. pg (pin 23/pin 21): the power good pin is the open collector output of an internal comparator. pg remains low until all fb pins are greater than 710mv. if not in use, this pin can be left unconnected. the pg comparator is disabled in shutdown. sw5 (pin 24/pin 23): the sw5 pin is an open collector of an internal boost regulator power switch. this power switch generates the drive voltage 4.85v above the input voltage (v in ), to drive the internal buck regulator power switches. connect an inductor from this pin to the v in pin. sky (pin 25/pin 24): the sky pin is the output of an in - tegrated power schottky diode and is the source of drive voltage to the internal buck regulator power switches. connect a 1 f capacitor from this pin to the v in pin. do not drive this pin with an external voltage source. do not draw current from this pin with an external component. pin functions (qfn/tssop) downloaded from: http:///
lt3514 10 3514fa for more information www.linear.com/lt3514 block diagram 3514 bd v in s r nq s r nq sync detect clk1clk2 osc frequency to current to ch3, ch4 startup/shutdown thermal shutdown 0.4v 1a 1.44v on ref precision uvlo v in en/uvlo lock 1shot slope slope 1shot sky 5v boost error amp 0.7v boost switch and drive sw5sw1 da1 pg fb1 sky v in pgood out1 comparators from other channels fb1 0.72v current limit foldback 0.8v 0.7v skybad 0.8v boost regulator q5 d5 q1 switch and drive one of three buck regulators shown power good logic rt/sync run/ss1 gnd 2.2v 0.1v 1a skybad 0 1 + C 4.5v skybad sky v in downloaded from: http:///
lt3514 11 3514fa for more information www.linear.com/lt3514 operation a comparator starts the reference when the en/uvlo pin rises above the 1.44v rising threshold. other comparators prevent switching when the input voltage is below 2.9v or the die temperature is above 175c. when the en/uvlo is above 1.44v, the input voltage is above 3.2v, and the temperature is below 175c, the boost regulator begins switching and charges the sky capacitor to 4.85v above v in . when the sky voltage is less than 4.5v above v in , the run/ss pins and v c nodes are actively pulled low to prevent the buck regulators from switching. the boost regulator (channel 5) consists of an internal 0.4a power switch (q5), an internal power schottky diode (d5), and the necessary logic and other control circuitry to drive the switch. the switch current is monitored to enforce cycle-by-cycle current limit. the diode current is monitored to prevent inductor current runaway during transient conditions. an error amplifier servos the sky voltage to 4.85v above v in . a comparator detects when the sky voltage is 4.5v above v in and allows the buck regulators to begin switching. the oscillator produces two antiphase clock signals running at 50% duty cycle. channel 5 runs antiphase to channels 3 and 4. the oscillator can be programmed by connecting a single resistor from rt/sync to ground, or by applying an external clock signal to rt/sync. a sync detect circuit distinguishes between the type of input. tying a resistor to gnd directly sets the bias current of the oscillator. the sync signal is converted to a current to set the bias cur - rent of the oscillator. the oscillator enables an r s flip-flop, turning on the power switch q1. an amplifier and comparator monitor the current flowing between the v in and sw pins, turning the switch off when this current reaches a level determined by the voltage at the v c node. a second comparator enforces a catch diode current limit to prevent inductor current runaway during transient conditions. an error amplifier measures the output voltage through an external resistor tied to the fb pin and servos the v c node. if the error amplifiers output increases, more current is delivered to the output; if it decreases, less current is delivered. a clamp on the v c pin provides switch current limit. each buck regulator switch driver operates by drawing current from the sky pin. regulating the sky pin to 4.85v above the v in pin voltage is necessary to fully saturate the bipolar power switch for efficient operation.soft-start is implemented by generating a voltage ramp at the run/ss pin. an internal 1.3a current source pulls the run/ss pin up to 2.1v. connecting a capacitor from the run/ss pin to ground programs the rate of the voltage ramp on the run/ss pin. a voltage follower circuit with a 0.1v offset connected from the run/ss pin to the ramp node prevents switching until the voltage at the run/ss pin increases above 0.1v. when the voltage at the ramp node is less than 0.9v, the error amplifier servos the fb voltage to the ramp node voltage. when the ramp node voltage increases above 0.9v, then the error amplifier ser - vos the fb voltage to 0.8v. additionally, a current amplifier reduces the catch diode current limit when the fb voltage is below 0.8v to limit the inductor current during startup. each channel can be placed in shutdown by pulling the respective run/ss pin below 0.1v. the en/uvlo pin can be pulled low (below a v be ) to place the entire part in shutdown, disconnecting the outputs and reducing the input current to less than 2a. downloaded from: http:///
lt3514 12 3514fa for more information www.linear.com/lt3514 the three step-down converters in the lt3514 are referred to as channels 1, 3, and 4, while the boost converter is referred to as channel 5. there is no channel 2. this nam - ing convention is intended to maintain consistency and limited pin compatibility with the lt3504, a four channel step-down converter. essentially, two 1a converters (chan - nels 2 and 3) of the lt3504 were combined to make the 2a converter (channel 3) of the lt3514. fb resistor network the output voltage is programmed with a resistor divider connected from the output and the fb pin. choose the 1% resistor according to: r1 = r2 ? v out 0.8v ? 1 ?? ? ?? ? a good value for r2 is 10.2k, r2 should not exceed 20k to avoid bias current error. input voltage range the input voltage range for lt3514 applications depends on the output voltage and on the absolute maximum rat - ing of the v in pin. the minimum input voltage to regulate the output gener - ally has to be at least 400mv greater than the greatest programmed output voltage. the only exception is when the largest programmed output voltage is less than 2.8v . in this case the minimum input voltage is 3.2v . the absolute maximum input voltage of the lt3514 is 40v and the part will regulate output voltages as long as the input voltage remains less than or equal to 40v. however for constant-frequency operation (no pulse- skipping) the maximum input voltage is determined by the minimum on-time of the lt3514 and the programmed switching frequency. the minimum on-time is the shortest period of time that it takes the switch to turn on and off. therefore the maximum input voltage to operate without pulse-skipping is: v in(ps) = [ (v out + v d )/(f sw ? t on(min) ) ] + v sw C v d applications information where: ? v in(ps) is the maximum input voltage to operate in constant frequency operation without skipping pulses. ? v out is the programmed output voltage ? v sw is the switch voltage drop, at i out1,4 = 1a, v sw1,4 = 0.4v, at i out3 = 2a, v sw3 = 0.4v. ? v d is the catch diode forward voltage drop, for an appropriately sized diode, v d = 0.4v ? f sw is the programmed switching frequency ? t on(min) is the minimum on-time, worst-case over temperature = 110ns (at t = 125c) at input voltages that exceed v in(ps) the part will continue to regulate the output voltage up to 40v. however the part will skip pulses (see figure 1) resulting in unwanted harmonics, increased output voltage ripple, and increased figure 1a. the lt3514 operating in constant-frequency operation (below v in(ps) ), v in = 26.5v, v out = 3.3v, f sw = 2mhz, t on(min) = 74ns at t = 25c figure 1b. the lt3514 operating in pulse-skipping mode (above v in(ps) ), v in = 27v, v out = 3.3v, f sw = 2mhz, t on(min) = 74ns at t = 25c 2s/div 3514 f01a i l 0.5a/div v sw 10v/div 2s/div 3514 f01b i l 0.5a/div v sw 10v/div downloaded from: http:///
lt3514 13 3514fa for more information www.linear.com/lt3514 applications information peak inductor current. provided that the inductor does not saturate and that the switch current remains below 2a (sw1, sw4) or below 4a (sw3), operation above v in(ps) is safe and will not damage the part. for a more detailed discussion on minimum on-time and pulse-skipping, re - fer to the applications information section of the lt3505 data sheet. avoid starting up the lt3514 at input voltages greater than 36v, as the lt3514 must simultaneously conduct maximum currents at high v in . the maximum operating junction temperature of 125c may be exceeded due to the high instantaneous power dissipation. frequency selection the maximum frequency that the lt3514 can be pro - grammed to is 2.5mhz. the minimum frequency is 250khz. the switching frequency can be programmed in two ways. the first method is by tying a 1% resistor (r t ) from the rt/sync pin to ground. table 1 can be used to select the value of r t . the second method is to synchronize (sync) the internal oscillator to an external clock. the external clock must have a minimum amplitude from 0v to 1.5v and a minimum pulse-width of 50ns. table 1. rt/sync pin resistance to program oscillator frequency frequency (mhz) rt/sync pin resistance (k) 0.20 140 0.3 82.5 0.4 56.2 0.5 43.2 0.6 34.8 0.7 28.0 0.8 23.7 0.9 20.5 1.0 18.2 1.1 16.9 1.2 14.7 1.3 13.0 1.4 11.5 figure 2. driving the rt/sync pin from a port that is in a high impedance state when it is inactive figure 3. driving the rt/sync pin from a port that is in a low impedance state when it is inactive frequency (mhz) rt/sync pin resistance (k) 1.5 10.7 1.6 9.76 1.7 8.66 1.8 8.06 1.9 7.32 2.0 6.81 2.1 6.34 2.2 6.04 2.3 5.62 2.4 5.36 2.5 4.99 in certain applications, the lt3514 may be required to be alive and switching for a period of time before it begins to receive a sync signal. if the sync signal is in a high impedance state when it is inactive then the solution is to simply tie an r t resistor from the rt/sync pin to ground (figure 2). the sync signal should be capable of driving the r t resistor. if the sync signal is in a low impedance state or an unknown state when it is inactive, then the solution is to tie the r t resistor from the rt/sync pin to ground and then to drive the rt/sync pin with the sync signal through a 1nf capacitor as shown in figure 3. 3514 f02 port gnd lt3514 rt/sync r t 3514 f03 port 1nf gnd lt3514 rt/sync r t downloaded from: http:///
lt3514 14 3514fa for more information www.linear.com/lt3514 applications information boost regulator and sky pin considerationsthe on-chip boost regulator generates the sky voltage to be 4.85v above v in . the sky voltage is the source of drive current for the buck regulators which is used to fully saturate the power switch. the boost regulator requires two external components: an inductor and a capacitor. a good first choice for an inductor is given by: l = 20.5h f where f is in mhz. thus, for a 250khz programmed switching frequency, a good first choice for an inductor value is 82h. for a 2.5mhz programmed switching frequency, a good first choice for an inductor value is 8.2h. these values will ensure that each buck regulator will have sufficient drive current to saturate the power switch in all applications and under all operating conditions. a user desiring a lower inductor current value can calculate their optimum inductor size based on their output cur - rent requirements. each buck regulator instantaneously requires 20ma from the sky pin per 1a of switch current. the average current that each buck regulator draws from the sky pin is 20ma per 1a of switch current multiplied by the duty cycle. so if all three buck regulators run at 100% duty cycle with channels 1 and 4 supplying 1a of output current and channel 3 supplying 2a of output current, then the sky pin should be able to source 80ma. however if each channel runs at 50% duty cycle then the sky pin only has to source 40ma. alternatively if each channel runs at 100% duty cycle but the output current requirements are reduced by half, then again the sky pin only has to source 40ma. to summarize, the sky pin output current requirement is calculated from the following equation: i sky = i out1 ? v out1 + i out3 ? v out3 + i out4 ? v out4 ( ) 50 ? v in where i outx is the desired output current from channel x, v outx is the programmed output voltage of channel x, and v in is input voltage. once the sky pin output current requirement is deter - mined, the inductor value can be calculated based on the maximum tolerable inductor current ripple from the following equation: l = v in ? dc5 2 ? f sw ? 0.3 ? 1 ? 0.25 ? dc5 ( ) ? i sky ? ? ? ? where f sw is the programmed switching frequency and dc5 is the boost regulator duty cycle, given by: dc5 = 5v/(v in + 5v). for a 1mhz application, with v in = 12v, v out1 = 5v, v out3 = 2.5v, v out4 = 1.8v, i out1,4 = 1a, i out3 = 2a, and the required sky pin current is 20ma and the inductor value is 6.8h. soft-start/tracking the run/ss pin can be used to soft-start the correspond - ing channel, reducing the maximum input current during start-up. the run/ss pin is pulled up through a 1 a current source to about 2.1v. a capacitor can be tied to the pin to create a voltage ramp at this pin. the buck regulator will not switch while the run/ss pin voltage is less than 0.1v. as the run/ss pin voltage increases above 0.1v, the chan - nel will begin switching and the fb pin voltage will track the run/ss pin voltage (offset by 0.1v), until the run/ss pin voltage is greater than 0.8v + 0.1v. at this point the output voltage will be at 100% of it s programmed value and the fb pin voltage will cease to track the run/ss pin voltage and remain at 0.8v (the run/ss pin will continue ramping up to about 2.1v with no effect on the output voltage). the ramp rate can be tailored so that the peak start up current can be reduced to the current that downloaded from: http:///
lt3514 15 3514fa for more information www.linear.com/lt3514 figure 5. circuit to prevent switching when v in < 10v, with 700mv of hysteresis applications information is required to regulate the output, with little overshoot. figure 4 shows the start-up waveforms with and without a soft-start capacitor (c ss ) on the run/ss pin. undervoltage lockout the lt3514 prevents switching when the input voltage decreases below 3.2v. alternatively, the en/uvlo pin can be used to program an undervoltage lockout at input voltages exceeding 3.2v by tapping a resistor divider from v in to en/uvlo as shown in figure 5. the rising threshold on the en/uvlo pin is 1.44v. the falling threshold on the en/uvlo pin is 1.33v. when en/ uvlo is rising and less than 1.44v then the en/uvlo pin sinks 1.3a of current. this 1.3a current can be used to program additional hysteresis on the en/uvlo pin. for the circuit in figure 5, r1 can be determined from: r1 = v in,hysteresis ? 0.11 1.33 v in,falling ( ) 1.3a where v in,hysteresis is the desired amount of hysteresis on the input voltage and v in,falling is the desired input voltage threshold at which the part will shut down. notice that for a given falling threshold (v in,falling ), the amount of hysteresis (v in,hysteresis ) must be at least: v in, hysteresis > 0.11 1.33 ? v in,falling ( ) r220.5k r1133k gnd lt3514 en/uvlo v in v in 3514 f05 notswitching switching v in, falling = 10v v in (v) v in (v) 9 10 11 12 v in, rising = 11v figure 4a. inductor current waveform during start-up without a soft-start capacitor figure 4b. inductor current waveform during start-up with a 1nf soft-start capacitor (c ss ) 100s/div 3514 f04a i l 0.5a/div v out 2v/div 100s/div 3514 f04b i l 0.5a/div v out 2v/div downloaded from: http:///
lt3514 16 3514fa for more information www.linear.com/lt3514 applications information for a falling threshold of 10v, the minimum hysteresis is 0.827v. for a falling threshold of 30v, the minimum hysteresis is 2.48v. r2 can be calculated once r1 is known: r2 = r1? 1.33 v in, falling ? 1.33 the circuit shown in figure 5 will start when the input voltage rises above 11v and will shutdown when the input voltage falls below 10v. inductor selection and maximum output current a good first choice for the inductor value is: l = 2 ? (v out + v d )/f sw for channels 1, 4 l = (v out + v d )/f sw for channel 3 where v d is the voltage drop of the catch diode (~0.4v), l is in h and f sw is in mhz. with this value there will be no subharmonic oscillation for applications with 50% or greater duty cycle. the inductors rms current rating must be greater than your maximum load current and its saturation current should be about 30% higher. for robust operation in fault conditions, the saturation cur - rent should be above 2a for ch1, ch4 and above 4a for ch3. to keep efficiency high, the series resistance (dcr) should be less than 0.1 . table 2 lists several vendors and types that are suitable. of course, such a simple design guide will not always result in the optimum inductor for your application. a larger value provides a higher maximum load current and reduces output voltage ripple at the expense of slower transient response. if your load is lower than 1a for ch1, ch4 or below 2a for ch3, then you can decrease the value of the inductor and operate with higher ripple current. this allows you to use a physically smaller inductor, or one with a lower dcr resulting in higher efficiency. low inductance may result in discontinuous mode operation, which is okay, but further reduces maximum load current. for details on maximum output current and discontinuous mode operation, see linear technology application note 44. catch diode use a 1a schottky diode for channels 1 and 4 and a 2a schottky diode for channel 3. the diode must have a re - verse voltage rating equal to or greater than the maximum input voltage. input capacitor the input of the lt3514 circuit must be bypassed with a x7r or x5r type ceramic capacitor. y5v types have poor performance over temperature and amplified voltage and should not be used. there are four v in pins. each v in pin should be bypassed to the nearest ground pin. however it is not necessary to use a dedicated capaci - tor for each v in pin. pins 9 and 11 may be tied together on the board layout so that both pins can share a single bypass capacitor. since the channels running on pins 9 and 11 are 180 degrees out-of-phase, it is not necessary to double the capacitor value either. similarly, pins 26 and 28 may be tied together on the board layout to save a bypass capacitor. for switching frequencies greater than 750khz, a 1f capacitor or higher value ceramic capacitor should be used to bypass each group of two v in pins. for switching frequencies less than 750khz, a 2.2f or higher value ceramic capacitor should be used to bypass each table 2. inductor vendors vendor url part series inductance (h) size (mm) sumida www.sumida.com cdrh4d28 cdrh5d28 cdrh5d28 1.2 to 4.7 2.5 to 10 2.5 to 33 4.5 4.5 5.5 5.5 8.3 8.3 toko www .toko.com a916cy d585lc 2 to 12 1.1 to 39 6.3 6.2 8.1 8 wrth elektronik www.we-online.com we-tpc(m) we-pd2(m) we-pd(s) 1 to 10 2.2 to 22 1 to 27 4.8 4.8 5.2 5.8 7.3 7.3 downloaded from: http:///
lt3514 17 3514fa for more information www.linear.com/lt3514 applications information group of two v in pins. the ceramic bypass capacitors should be located as close to the v in pins as possible. see the sample layout shown in the pcb layout section. all four v in pins should be tied together on the board and bypassing with a low performance electrolytic capacitor is recommended especially if the input power source has high impedance, or there is significant inductance due to long wires or cables. step-down regulators draw current from the input sup - ply in pulses with very fast rise and fall times. the input capacitor is required to reduce the resulting voltage ripple at the lt3514 and to force this very high frequency switching current into a tight local loop, minimizing emi. to accomplish this task, the input bypass capacitor must be placed close to the lt3514 and the catch diode; see the pcb layout section. a second precaution regarding the ceramic input capacitor concerns the maximum input voltage rating of the lt3514. a ceramic input capacitor combined with trace or cable inductance forms a high quality (underdamped) tank circuit. if the lt3514 circuit is plugged into a live supply, the input voltage can ring to twice its nominal value, possibly exceeding the lt3514s voltage rating. this situation can be easily avoided by add - ing an electrolytic capacitor in parallel with the ceramic input capacitors. see application note 88. output capacitor the output capacitor has two essential functions. along with the inductor , it filters the square wave generated by the l t3514 to produce the dc output. in this role it deter - mines the output ripple so low impedance at the switching frequency is important. the second function is to store energy in order to satisfy transient loads and stabilize the l t3514 s control loop. ceramic capacitors have very low equivalent series re - sistance (esr) and provide the best ripple performance. a good value is: c out = 33/(v out ? f sw ) for channels 1, 4 c out = 132/(v out ? f sw ) for channel 3 where c out is in f and f sw is in mhz. use x5r or x7r types and keep in mind that a ceramic capacitor biased with v out will have less than its nominal capacitance. this choice will provide low output ripple and good transient response. transient performance can be improved with a high value capacitor, if the compensation network is also adjusted to maintain the loop bandwidth. a lower value of output capacitor can be used, but tran - sient performance will suffer. also, a lower value output capacitor may result in increased sensitivity to noise which can be alleviated by adding a 100pf phase lead capacitor from fb to v out . high performance electrolytic capacitors can be used for the output capacitor. low esr is important, so choose one that is intended for use in switching regulators. the esr should be specified by the supplier and should be 0.1 or less. such a capacitor will be larger than a ceramic capacitor and will have a larger capacitance, because the capacitor must be large to achieve low esr. table 3 lists several capacitor vendors. table 3. capacitor vendors vendor phone url part series comments panasonic (714) 373-7366 www.panasonic.com ceramic, polymer, tantalum eef series kemet (864) 963-6300 www.kemet.com ceramic, tantalum t494, t495 sanyo (408) 749-9714 www.sanyovideo.com ceramic, polymer, tantalum poscap murata (404) 436-1300 www.murata.com ceramic avx www.avxcorp.com ceramic, tantalum tps series taiyo yuden (864) 963-6300 www.taiyo-yuden.com ceramic downloaded from: http:///
lt3514 18 3514fa for more information www.linear.com/lt3514 figure 6 shows the transient response of the lt3514 with several output capacitor choices. the output is 3.3v. the load current is stepped from 500ma to 1a and back to 500ma and the oscilloscope traces show the output volt - age. the upper photo shows the recommended value. the second photo shows the improved response (less voltage drop) resulting from a larger output capacitor and a larger phase lead capacitor . the last photo shows the response to a high performance electrolytic capacitor. transient per - formance is improved due to the large output capacitance. shorted and reversed input protectionif the inductor is chosen so that it wont saturate exces - sively, an lt3514 buck regulator will tolerate a shorted output. there is another situation to consider in systems where the output will be held high when the input to the lt3514 is absent. this may occur in battery charging ap - plications or in battery backup systems where a battery or some other supply is diode or-ed with the lt3514 s output. if the v in pin is allowed to float and the en/uvlo pin is held high (either by a logic signal or because it is applications information figure 6. transient load response of the lt3514 with different output cap acitors as the load current is stepped from 500ma to 1a. v in = 12v, v out = 3.3v, l = 10h, r t = 19.1k 10 f 31.6k 10k i out 1a/div v out 20mv/div i out 1a/div v out 20mv/div 20s/div20s/div i out 1a/div v out 20mv/div 20s/div v out 3514 f06a 3514 f06b3514 f06c v out 31.6k 10k 10 f 2 100pf 31.6k 10k v out + 22 f fb lt3514 fb lt3514 fb lt3514 downloaded from: http:///
lt3514 19 3514fa for more information www.linear.com/lt3514 figure 7. diode d4 prevents a shorted input from discharging a backup batte ry tied to the output; it also protects the circuit from a reversed input. the lt3514 runs only when th e input is present 3514 f07 d4 v in v out backup gnd lt3514 sw1 da1 fb1 en/uvlosky sw5 v in v in run/ss1 rt/sync tied to v in ), then the lt3514s internal circuitry will pull its quiescent current through its sw pin. this is fine if your system can tolerate a few ma in this state. if you ground the en/uvlo pin, the sw pin current will drop to essentially zero. however, if the v in pin is grounded while the output is held high, then parasitic diodes inside the lt3514 can pull large currents from the output through the sw pin and the v in pin. figure 7 shows a circuit that will run only when the input voltage is present and that protects against a shorted or reversed input. high temperature considerations while the lt3514 is capable of delivering total output current up to 4a, total power dissipation for an applica - tion circuit and the resulting temperature rise must be considered, especially if all three channels are operating at high duty cycle. the die temperature of the lt3514 must be lower than the maximum rating of 125c. this is generally not a concern unless the ambient temperature is above 85c. for higher temperatures, extra care should be taken in the layout of the circuit to ensure good heat sinking of the lt3514. the maximum load current should be derated as the ambient temperature approaches 125c. programming the lt3514 to a lower switching frequency will improve efficiency and reduce the dependence of efficiency on input voltage. the die temperature is calculated by multiplying the lt3514 power dissipation by the thermal resistance from junc - tion to ambient. power dissipation within the lt3514 can be estimated by calculating the total power loss from an efficiency measurement and subtracting the catch diode losses. thermal resistance depends on the layout of the cir cuit board, but 43c/w is typical for the qfn pack - age and 33c/w is typical for the fe package. thermal shutdown will turn off the buck regulators and the boost regulator when the die temperature exceeds 175c, but this is not a warrant to allow operation at die temperatures exceeding 125c. outputs greater than 9v for outputs greater than 9v, add a 1k resistor in series with a 1nf capacitor across the inductor to damp the discontinuous ringing of the sw node, preventing unin - tended sw current. other linear technology publications application notes 19, 35, 44 contain more detailed descrip - tions and design information for step-down regulators and other switching regulators. design note 318 shows how to generate a bipolar output supply using a step-down regulator. applications information downloaded from: http:///
lt3514 20 3514fa for more information www.linear.com/lt3514 pcb layout for proper operation and minimum emi, care must be taken during printed circuit board layout. figure 8 shows the recommended component placement with trace, ground plane, and via locations for the qfn package. note that large, switched currents flow in the lt3514s v in , sw and da pins, the catch diodes (d1, d3, d4) and the input capacitors (c5, c6). the loop formed by these components should be as small as possible and tied to system ground in only one place. these components, along with the inductors (l1, l3, l4, l5) and output capacitors (c1, c3, c4, c7), should be placed on the same side of the circuit board, and their connections should be made on that layer. place a local, unbroken ground plane below these components, and tie this ground plane to system ground at one location (ideally at the ground terminal of the output capacitors). for the qfn package ground applications information figure 8 via to local ground planeoutline of local ground plane 3514 f08 l5 d3 d1 d4 sw5 vin vin gnd gnd gnd gnd gnd gnd gnd rt/sync fb4 sky sw3 sw4 c4 sw1 out3 out4 out1 gndgnd c3 gnd c1 c5 c7 c8 l3 l1 l4 c6 run/ss4run/ss1 run/ss3 en/uvlo r9 pg nc ncnc nc r2 r5 fb1 r3 r6 fb3 r1 r7 via to vin + downloaded from: http:///
lt3514 21 3514fa for more information www.linear.com/lt3514 applications information pins (pins 10, 27) are provided near the v in pins so that the v in pins can be bypassed to these ground pins. the sw nodes should be kept as small as possible and kept far away from the rt/sync and fb nodes. keep the rt/ sync node and fb nodes small so that the ground pin and ground traces will shield them from the sw nodes. if the user plans on using a sync signal to set the oscillator frequency then the rt/sync node should be kept away from the fb nodes. include vias near the exposed pad of the lt3514 to help transfer heat from the lt3514 to the ground plane. keep the sw5 pad/trace as far away from the fb pads as possible. overvoltage transient protection figure 9 shows the complete application circuit for a 3-out - put step-down regulator with 100% duty cycle operation that withstands 180v surges. under normal operating conditions (v in < 33v), the v sky rail supplies gate drive to mosfet q1, providing the lt3514 with a low resistance path to v supply . in the event that a supply surge occurs, 3514 f09 8.2h csky2.2f vsky pg 2.2f2 d3 l510h v supply 3.2v to 30vsurge protection to 180v q1: fqb34n20ld1: bzt52c36-7-f d2: bzt52c6v8-7-f d3: bat54-7-f l1: cdrh5d28-4r2 l3: cdrh8d28-4r7 l4: cdrh5d28-8r2 l5: cbc2016100m 0.1f 18.2k gnd lt3514 d136v c1 0.1f 22f sky sw5 v in v in v in en/uvlopg run/ss1 run/ss3 run/ss4 rt/sync sw1 da1 fb1 2.5v/1a 82pf 21.5k 10.2k 22f sw3 da3 fb3 3.3v/2a 47pf 31.6k 10.2k 47f sw4 da4 fb4 5v/1a 22pf 53.6k 10.2k 22f 4.2h l3l4 l1 4.7h + d26.8v r3 1k r2100k r1 10 q1 zener diode d1 clamps q1s gate voltage to 36v. the source follower configuration prevents v in from rising any further than about 33v (a v gs below the zener clamp voltage ) . figure 10 shows the lt3514 regulating all three channels through a 180v surge event without interruption. figure 9. complete triple buck regulator with 180v surge protection figure 10. overvoltage protection withstands 180v surge 100ms/div 3514 f10 v out1,3,4 2v/div v supply 50v/div v in 50v/div downloaded from: http:///
lt3514 22 3514fa for more information www.linear.com/lt3514 applications information bear in mind that significant power dissipation occurs in q1 during an overvoltage event. the mosfet junction temperature must be kept below its absolute maximum rating. for the overvoltage transient shown in figure 10, mosfet q1 conducts 0.55a (full load on all buck chan - nels) while withstanding the voltage difference between v supply (180v peak) and v in (33v). this results in a peak power of 81w. since the overvoltage pulse in figure 10 is roughly triangular, average power dissipation during the transient event (about 400ms) is approximately half the peak power. as such, the average power is given by: p avg (w) = 1 2 ? p peak (w) = 40.5w in order to approximate the mosfet junction temperature rise from an overvoltage transient, one must determine the mosfet transient thermal response as well as the mosfet power dissipation. fortunately, most mosfet transient thermal response curves are provided by the manufacturer (as shown in figure 11). for a 400ms pulse duration, the fqb34n20l mosfet thermal response z jc (t) is 0.65c/w. the mosfet junction temperature rise is given by: t rise (c) = z jc (t) ? p avg (w) = 26.3c note that, by properly selecting mosfet q1, it is possible to withstand even higher input voltage surges. consult manufacturer data sheets to ensure that the mosfet operates within its maximum safe operating area. the application circuit start-up behavior is shown in figure 12. resistor r2 pulls up on the gate of q1, forcing sour ce connected v in to follow approximately 3v below v supply . once v in reaches the lt3514s 3.2v minimum start-up voltage, the on-chip boost converter immedi - ately regulates the v sky rail 4.85v above v in . diode d3 and resistor r3 bootstrap q1s gate voltage to the v sky , fully enhancing q1. this connects v in directly to v supply through q1s low resistance drain-source path. it should be noted that, prior to v sky being present, the minimum input voltage is about 6.2v. however, with v sky in regulation and q1 enhanced, the minimum run voltage drops to 3.2v, permitting the lt3514 to maintain regulation through deep input voltage dips figure 13 shows all channels operating down to the lt3514s 3.2v minimum input voltage. z jc (t), thermal response (c/w) z jc (t) = 0.7c/w max duty factor = d = t 1 /t 2 t jm C t c = p dm ? z jc (t) 3514 f11 t 1 , square wave pulse duration (s) 10 10 ?5 1 10 ?3 10 ?4 10 ?3 0.01 0.1 1 0.01 0.1 d = 0.5d = 0.2 d = 0.1 d = 0.05 d = 0.02 d = 0.01 single pulse p dm t 1 t 2 figure 11. fqb34n20l transient thermal response figure 12. figure 9s start-up behavior figure 13. figure 9s dropout performance 20ms/div 3514 f12 sky 2v/div v supply 2v/div v in 2v/div 100ms/div 3514 f13 v out3 1v/div v out1 1v/div v out4 1v/div v in 1v/div downloaded from: http:///
lt3514 23 3514fa for more information www.linear.com/lt3514 package description please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. fe24 (aa) tssop rev b 0910 0.09 ? 0.20 (.0035 ? .0079) 0 ? 8 0.25 ref recommended solder pad layout 0.50 ? 0.75 (.020 ? .030) 4.30 ? 4.50* (.169 ? .177) 1 3 4 5 6 7 8 9 10 11 12 14 13 7.70 ? 7.90* (.303 ? .311) 3.25 (.128) 2.74 (.108) 20 21 2223 24 19 18 17 16 15 1.20 (.047) max 0.05 ? 0.15 (.002 ? .006) 0.65 (.0256) bsc 0.195 ? 0.30 (.0077 ? .0118) typ 2 2.74 (.108) 0.45 0.05 0.65 bsc 4.50 0.10 6.60 0.10 1.05 0.10 3.25 (.128) millimeters (inches) *dimensions do not include mold flash. mold flash shall not exceed 0.150mm (.006") per side note:1. controlling dimension: millimeters 2. dimensions are in 3. drawing not to scale see note 4 4. recommended minimum pcb metal size for exposed pad attachment 6.40 (.252) bsc fe package 24-lead plastic tssop (4.4mm) (reference ltc dwg # 05-08-1771 rev b) exposed pad variation aa downloaded from: http:///
lt3514 24 3514fa for more information www.linear.com/lt3514 package description ufd package 28-lead plastic qfn (4mm 5mm) (reference ltc dwg # 05-08-1712 rev b) 4.00 0.10 (2 sides) 2.50 ref 5.00 0.10 (2 sides) note: 1. drawing proposed to be made a jedec package outline mo-220 variation (wxxx-x). 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on the top and bottom of package pin 1top mark (note 6) 0.40 0.10 27 28 12 bottom viewexposed pad 3.50 ref 0.75 0.05 r = 0.115 typ r = 0.05 typ pin 1 notch r = 0.20 or 0.35 45 chamfer 0.25 0.05 0.50 bsc 0.200 ref 0.00 C 0.05 (ufd28) qfn 0506 rev b recommended solder pad pitch and dimensions apply solder mask to areas that are not soldered 0.70 0.05 0.25 0.05 0.50 bsc 2.50 ref 3.50 ref 4.10 0.05 5.50 0.05 2.65 0.05 3.10 0.05 4.50 0.05 package outline 2.65 0.10 3.65 0.10 3.65 0.05 please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. downloaded from: http:///
lt3514 25 3514fa for more information www.linear.com/lt3514 information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa - tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. revision history rev date description page number a 01/14 added h-grade option clarified switching frequency parametersclarified resistor value for r2 23 11 downloaded from: http:///
lt3514 26 3514fa for more information www.linear.com/lt3514 linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 ? linear technology corporation 2013 lt 0114 rev a ? printed in usa (408) 432-1900 fax : (408) 434-0507 www.linear.com/lt3514 related parts typical application part description comments lt3504 40v, quad 1a step-down 2.5mhz dc/dc converter with 100% duty cycle operation v in(min) = 3.2v, v in(max) = 40v, i q = 7.1ma, i sd < 1a, 4mm x 5mm qfn-28 package lt3507/ l t3507a 36v 2.5mhz, triple [2.4a + 1.5a + 1.5a (i out )] with ldo controller high efficiency step-down dc/dc converter v in(min) = 4v, v in(max) = 36v, v out(min) = 0.8v, i q = 7ma, i sd = 1a, 5mm x 7mm qfn-38 package lt8610 42v 2.2mhz, synchronous, low i q = 2.5a, step-down dc/dc converter v in(min) = 3.4v, v in(max) = 42v, v out(min) = 0.97v, i q = 2.5a, i sd = 1a, msop-16e package lt3988 60v with transient protection to 80v, 2.5mhz, dual 1a high efficiency step-down dc/dc converter v in(min) = 4.0v, v in(max) = 60v, v out(min) = 0.75v, i q = 2ma, i sd = 1a, msop-16e package lt3509 36v with transient protection to 60v, dual 0.70(i out ), 2.2mhz, high efficiency step-down dc/dc converter v in(min) = 3.6v, v in(max) = 36v, v out(min) = 0.8v, i q = 1.9ma, i sd = 1a, 3mm 4mm dfn-14, msop-16e packages lt3500 36v, 40v max , 2a, 2.5mhz high efficiency step-down dc/dc converter and ldo controller v in(min) = 3.6v, v in(max) = 36v, v out(min) = 0.8v, i q = 2.5ma, i sd <10a, 3mm 3mm dfn-10 package lt3508 36v with transient protection to 40v, dual 1.4a (i out ), 3mhz, high efficiency step-down dc/dc converter v in(min) = 3.7v, v in(max) = 37v, v out(min) = 0.8v, i q = 4.6ma, i sd = 1a, 4mm 4mm qfn-24, tssop-16e packages lt3980 58v with transient protection to 80v, 2a (i out ), 2.4mhz, high efficiency step-down dc/dc converter with burst mode ? operation v in(min) = 3.6v, v in(max) = 58v, transient to 80v, v out(min) = 0.8v, i q = 85a, i sd <1a, 3mm 4mm dfn-16 and msop-16e packages lt3480 36v with transient protection to 60v, 2a (i out ), 2.4mhz, high efficiency step-down dc/dc converter with burst mode operation v in(min) = 3.6v, v in(max) = 38v, v out(min) = 0.78v, i q = 70a, i sd <1a, 3mm 3mm dfn-10, msop-10e packages lt3689 36v, 60v transient protection, 800ma, 2.2mhz high efficiency micropower step-down dc/dc converter with por reset and watchdog timer v in(min) = 3.6v, v in(max) = 36v, transient to 60v, v out(min) = 0.8v, i q = 75a, i sd <1a. 3mm 3mm qfn-16 package lt3970 40v, 350ma, 2mhz high efficiency micropower step-down dc/dc converter v in(min) = 4v, v in(max) = 40v, transient to 60v, v out(min) = 1.21v, i q = 2a, i sd <1a, 3mm 2mm dfn-10 and msop-10 packages lt3682 36v, 60vmax, 1a, 2.2mhz high efficiency micropower step-down dc/dc converter v in(min) = 3.6v, v in(max) = 36v, v out(min) = 0.8v, i q = 75a, i sd < 1a, 3mm 3mm dfn-12 package complete triple buck regulator with 180v surge protection 3514 ta02 8.2h csky2.2f vsky pg 2.2f2 d3 l510h v supply 3.2v to 30vsurge protection to 180v q1: fqb34n20ld1: bzt52c36-7-f d2: bzt52c6v8-7-f d3: bat54-7-f l1: cdrh5d28-4r2 l3: cdrh8d28-4r7 l4: cdrh5d28-8r2 l5: cbc2016100m 0.1f 18.2k gnd lt3514 d136v c1 0.1f 22f sky sw5 v in v in v in en/uvlopg run/ss1 run/ss3 run/ss4 rt/sync sw1 da1 fb1 2.5v/1a 82pf 21.5k 10.2k 22f sw3 da3 fb3 3.3v/2a 47pf 31.6k 10.2k 47f sw4 da4 fb4 5v/1a 22pf 53.6k 10.2k 22f 4.2h l3l4 l1 4.7h + d26.8v r3 1k r2100k r1 10 q1 downloaded from: http:///

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