this is information on a product in full production. february 2016 docid027589 rev 4 1/228 stm32f756xx arm ? -based cortex ? -m7 32b mcu+fpu, 462dmips, up to 1mb flash/320+16+ 4kb ram, crypto, usb otg hs/fs, ethernet, 18 tims, 3 adcs, 25 com itf, cam & lcd datasheet - production data features ? core: arm ? 32-bit cortex ? -m7 cpu with fpu, adaptive real-time accelerator (art accelerator?) and l1-cache: 4kb data cache and 4kb instruction ca che, allowing 0-wait state execution from embedded flash memory and external memories, frequency up to 216 mhz, mpu, 462 dmips/2.14 dmips/mhz (dhrystone 2.1), and dsp instructions. ? memories ? up to 1mb of flash memory ? 1024 bytes of otp memory ? sram: 320kb (including 64kb of data tcm ram for critical real-time data) + 16kb of instruction tcm ram (for critical real-time routines) + 4kb of backup sram (available in the lowest power modes) ? flexible external memory controller with up to 32-bit data bus: sram, psram, sdram/lpsdr sdram, nor/nand memories ? dual mode quad-spi ? lcd parallel interface, 8080/6800 modes ? lcd-tft controller up to xga resolution with dedicated chrom-art accelerator? for enhanced graphic content creation (dma2d) ? clock, reset and supply management ? 1.7 v to 3.6 v application supply and i/os ? por, pdr, pvd and bor ? dedicated usb power ? 4-to-26 mhz crystal oscillator ? internal 16 mhz factory-trimmed rc (1% accuracy) ? 32 khz oscillator for rtc with calibration ? internal 32 khz rc with calibration ? low-power ? sleep, stop and standby modes ?v bat supply for rtc, 3232 bit backup registers + 4kb backup sram ? 312-bit, 2.4 msps adc: up to 24 channels and 7.2 msps in trip le interleaved mode ? 212-bit d/a converters ? up to 18 timers: up to thirteen 16-bit (1x low- power 16-bit timer available in stop mode) and two 32-bit timers, each with up to 4 ic/oc/pwm or pulse counter and quadrature (incremental) encoder input. all 15 timers running up to 216 mhz. 2x watchdogs, systick timer ? general-purpose dma: 16-stream dma controller with fifos and burst support ? debug mode ? swd & jtag interfaces ?cortex ? -m7 trace macrocell? ? up to 168 i/o ports with interrupt capability ? up to 164 fast i/os up to 108 mhz ? up to 166 5 v-tolerant i/os ? up to 25 communica tion interfaces ? up to 4 i 2 c interfaces (smbus/pmbus) ? up to 4 usarts/4 uarts (27 mbit/s, iso7816 interface, lin, irda, modem control) ? up to 6 spis (up to 50 mbit/s), 3 with muxed simplex i 2 s for audio class accuracy via internal audio pll or external clock ? 2 x sais (serial audio interface) ? 2 cans (2.0b active) and sdmmc interface ? spdifrx interface ? hdmi-cec ? advanced connectivity ? usb 2.0 full-speed device/host/otg controller with on-chip phy ? usb 2.0 high-speed/full-speed device/host/otg controller with dedicated dma, on-chip full-speed phy and ulpi ? 10/100 ethernet mac with dedicated dma: supports ieee 1588v2 hardware, mii/rmii ? 8- to 14-bit parallel camera interface up to 54 mbyte/s ? cryptographic acceleration: hardware acceleration for aes 128, 192, 256, triple des, hash (md5, sha-1, sha-2), and hmac ? true random number generator ? crc calculation unit ? rtc: subsecond accuracy, hardware calendar ? 96-bit unique id table 1. device summary reference part number stm32f756xx stm32f756vg, STM32F756ZG, stm32f756ig, stm32f756bg, stm32f756ng lqfp100 (14x14 mm) lqfp144 (20x20 mm) lqfp176 (24x24 mm) ufbga176 (10x10 mm) & |