?2008 fairchild semiconductor corporation 1 www.fairchildsemi.com fdp51n25/ FDPF51N25 rev. c0 fdp51n25/ FDPF51N25 n-channel unifet tm mosfet march 2013 fdp51n25 / FDPF51N25 n-channel unifet tm mosfet 500 v, 51 a, 60 m ? features ?r ds(on) = 60 m ? (max.) @ v gs = 10 v, i d = 25.5 a ? low gate charge (typ. 55 nc) ? low crss (typ. 63 pf) applications ?pdp tv ? lighting ? uninterruptible power supply ? ac-dc power supply description unifet tm mosfet is fairchild semiconductor ? ?s high voltage mosfet family based on planar stripe and dmos technology. this mosfet is tailored to reduce on-state resistance, and to provide better switching performance and higher avalanche energy strength. this device fami ly is suitable for switching power converter applications such as power factor correction (pfc), flat panel display (fpd) tv power, atx and electronic lamp ballasts. absolute maximum ratings *drain current limited by maximum junction temperature thermal characteristics d g s to-220f s d g s d g to-220 symbol parameter fdp51n25 FDPF51N25 unit v dss drain-source voltage 250 v i d drain current - continuous (t c = 25 ? c) - continuous (t c = 100 ? c) 51 30 51* 30* a a i dm drain current - pulsed (note 1) 204 204* a v gss gate-source voltage ? 30 v e as single pulsed avalanche energy (note 2) 1111 mj i ar avalanche current (note 1) 51 a e ar repetitive avalanche energy (note 1) 32 mj dv/dt peak diode recovery dv/dt (note 3) 4.5 v/ns p d power dissipation (t c = 25 ? c) - derate above 25 ? c 320 3.7 38 0.3 w w/ ? c t j, t stg operating and storage temperature range -55 to +150 ? c t l maximum lead temperature for soldering purpose, 1/8? from case for 5 seconds 300 ? c symbol parameter fdp51n25 FDPF51N25 unit r ? jc thermal resistance, junction-to-case, max. 0.39 3.3 ? c/w r ? cs thermal resistance, case-to-sink, typ. 0.5 -- ? c/w r ? ja thermal resistance, junction-to-ambient, max. 62.5 62.5 ? c/w
fdp51n25/ FDPF51N25 n-channel unifet tm mosfet ?2008 fairchild semiconductor corporation 2 www.fairchildsemi.com fdp51n25/ FDPF51N25 rev. c0 package marking and ordering information electrical characteristics t c = 25c unless otherwise noted notes: 1. repetitive rating: pulse width limit ed by maximum junction temperature 2. l = 0.68mh, i as = 51a, v dd = 50v, r g = 25 ? , starting t j = 25 ? c 3. i sd ? 51a, di/dt ? 200a/ ? s, v dd ? bv dss , starting t j = 25 ? c 4. essentially independent of operating temperature typical characteristics device marking device package reel size tape width quantity fdp51n25 fdp51n25 to-220 - - 50 FDPF51N25 FDPF51N25 to-220f - - 50 symbol parameter conditions min typ max unit off characteristics bv dss drain-source breakdown voltage v gs = 0v, i d = 250 ? a, t j = 25 ? c 250 -- -- v ? bv dss / ? t j breakdown voltage temperature coefficient i d = 250 ? a, referenced to 25 ? c -- 0.25 -- v/ ? c i dss zero gate voltage drain current v ds = 250v, v gs = 0v v ds = 200v, t c = 125 ? c -- -- -- -- 1 10 ? a ? a i gssf gate-body leakage current, forward v gs = 30v, v ds = 0v -- -- 100 na i gssr gate-body leakage current, reverse v gs = -30v, v ds = 0v -- -- -100 na on characteristics v gs(th) gate threshold voltage v ds = v gs , i d = 250 ? a 3.0 -- 5.0 v r ds(on) static drain-source on-resistance v gs = 10v, i d = 25.5a -- 0.048 0.060 ? g fs forward transconductance v ds = 40v, i d = 25.5a -- 43 -- s dynamic characteristics c iss input capacitance v ds = 25v, v gs = 0v, f = 1.0mhz -- 2620 3410 pf c oss output capacitance -- 530 690 pf c rss reverse transfer capacitance -- 63 90 pf switching characteristics t d(on) turn-on delay time v dd = 125v, i d = 51a r g = 25 ? (note 4) -- 62 135 ns t r turn-on rise time -- 465 940 ns t d(off) turn-off delay time -- 98 205 ns t f turn-off fall time -- 130 270 ns q g total gate charge v ds = 200v, i d = 51a v gs = 10v (note 4) -- 55 70 nc q gs gate-source charge -- 16 -- nc q gd gate-drain charge -- 27 -- nc drain-source diode characteristics and maximum ratings i s maximum continuous drain-source diode forward current -- -- 51 a i sm maximum pulsed drain-source diode forward current -- -- 204 a v sd drain-source diode forward voltage v gs = 0v, i s = 51a -- -- 1.4 v t rr reverse recovery time v gs = 0v, i s = 51a di f /dt =100a/ ? s -- 178 -- ns q rr reverse recovery charge -- 4.0 -- ? c
fdp51n25/ FDPF51N25 n-channel unifet tm mosfet ?2008 fairchild semiconductor corporation 3 www.fairchildsemi.com fdp51n25/ FDPF51N25 rev. c0 typical performance characteristics figure 1. on-region characteristics f igure 2. transfer characteristics figure 3. on-resistance variation vs. figure 4. body diode forward voltage drain current and gate voltage v ariation vs. s ource current and temperatue figure 5. capacitance characteristics f igure 6. gate charge characteristics 10 -1 10 0 10 1 10 0 10 1 10 2 v gs top : 15.0 v 10.0 v 8.0 v 7.0 v 6.5 v 6.0 v bottom : 5.5 v * notes : 1. 250 ? s pulse test 2. t c = 25 o c i d , drain current [a] v ds , drain-source voltage [v] 24681012 10 0 10 1 10 2 150 o c 25 o c -55 o c * notes : 1. v ds = 40v 2. 250 ? s pulse test i d , drain current [a] v gs , gate-source voltage [v] 0 25 50 75 100 125 150 0.04 0.06 0.08 0.10 0.12 0.14 v gs = 20v v gs = 10v * note : t j = 25 o c r ds(on) [ ? ], drain-source on-resistance i d , drain current [a] 0.20.40.60.81.01.21.41.61.8 10 0 10 1 10 2 150 o c * notes : 1. v gs = 0v 2. 250 ? s pulse test 25 o c i dr , reverse drain current [a] v sd , source-drain voltage [v] 10 -1 10 0 10 1 0 2000 4000 6000 c iss = c gs + c gd (c ds = shorted) c oss = c ds + c gd c rss = c gd * note ; 1. v gs = 0 v 2. f = 1 mhz c rss c oss c iss capacitances [pf] v ds , drain-source voltage [v] 0 102030405060 0 2 4 6 8 10 12 v ds = 125v v ds = 50v v ds = 200v * note : i d = 51a v gs , gate-source voltage [v] q g , total gate charge [nc]
fdp51n25/ FDPF51N25 n-channel unifet tm mosfet ?2008 fairchild semiconductor corporation 4 www.fairchildsemi.com fdp51n25/ FDPF51N25 rev. c0 typical performance characteristics (continued) figure 7. breakdown voltage variatio n figure 8. on-resistance variation vs. temperature vs. temperature figure 9-1. maximum safe operating area figure 9-2. maximum safe operating area for fdp51n25 for FDPF51N25 figure 10. maximum drain current vs. case temperature -100 -50 0 50 100 150 200 0.8 0.9 1.0 1.1 1.2 * notes : 1. v gs = 0 v 2. i d = 250 ? a bv dss , (normalized) drain-source breakdown voltage t j , junction temperature [ o c] -100 -50 0 50 100 150 200 0.0 0.5 1.0 1.5 2.0 2.5 3.0 * notes : 1. v gs = 10 v 2. i d = 25.5 a r ds(on) , (normalized) drain-source on-resistance t j , junction temperature [ o c] 10 0 10 1 10 2 10 -2 10 -1 10 0 10 1 10 2 100 ms 1 ms 10 ? s dc 10 ms 100 ? s operation in this area is limited by r ds(on) * notes : 1. t c = 25 o c 2. t j = 150 o c 3. single pulse i d , drain current [a] v ds , drain-source voltage [v] 10 0 10 1 10 2 10 -2 10 -1 10 0 10 1 10 2 100 ms 1 ms 10 ? s dc 10 ms 100 ? s operation in this area is limited by r ds(on) * notes : 1. t c = 25 o c 2. t j = 150 o c 3. single pulse i d , drain current [a] v ds , drain-source voltage [v] 25 50 75 100 125 150 0 10 20 30 40 50 60 i d , drain current [a] t c , case temperature [ o c]
fdp51n25/ FDPF51N25 n-channel unifet tm mosfet ?2008 fairchild semiconductor corporation 5 www.fairchildsemi.com fdp51n25/ FDPF51N25 rev. c0 typical performance characteristics (continued) figure 11-1. transient thermal response curve for fdp51n25 figure 11-2. transient thermal response curve for FDPF51N25 10 -5 10 -4 10 -3 10 -2 10 -1 10 0 10 1 10 -2 10 -1 * notes : 1. z ? jc (t) = 0.39 0 c/w max. 2. duty factor, d=t 1 /t 2 3. t jm - t c = p dm * z ? jc (t) single pulse d=0.5 0.02 0.2 0.05 0.1 0.01 z ? jc (t), thermal response t 1 , square w ave pulse duration [sec] t 1 p dm t 2 10 -5 10 -4 10 -3 10 -2 10 -1 10 0 10 1 10 -2 10 -1 10 0 * notes : 1. z ? jc (t) = 3.3 0 c/w max. 2. duty factor, d=t 1 /t 2 3. t jm - t c = p dm * z ? jc (t) single pulse d=0.5 0.02 0.2 0.05 0.1 0.01 z ? jc (t), thermal response t 1 , square wave pulse duration [sec] t 1 p dm t 2
fdp51n25/ FDPF51N25 n-channel unifet tm mosfet ?2008 fairchild semiconductor corporation 6 www.fairchildsemi.com fdp51n25/ FDPF51N25 rev. c0 gate charge test circuit & waveform resistive switching test circuit & waveforms unclamped inductive switching test circuit & waveforms
fdp51n25/ FDPF51N25 n-channel unifet tm mosfet ?2008 fairchild semiconductor corporation 7 www.fairchildsemi.com fdp51n25/ FDPF51N25 rev. c0 peak diode recovery dv/dt test circuit & waveforms
fdp51n25/ FDPF51N25 n-channel unifet tm mosfet ?2008 fairchild semiconductor corporation 8 www.fairchildsemi.com fdp51n25/ FDPF51N25 rev. c0 mechanical dimensions to-220b03 dimensions in millimeters
fdp51n25/ FDPF51N25 n-channel unifet tm mosfet ?2008 fairchild semiconductor corporation 9 www.fairchildsemi.com fdp51n25/ FDPF51N25 rev. c0 mechanical dimensions (continued) to-220m03 dimensions in millimeters
fdp51n25/ FDPF51N25 n-channel unifet tm mosfet ?2008 fairchild semiconductor corporation 10 www.fairchildsemi.com fdp51n25/ FDPF51N25 rev. c0 trademarks the following includes registered and unregistered trademarks and service marks, owned by fairchild semiconductor and/or its gl obal subsidiaries, and is not intended to be an exhaustive list of all such trademarks. *trademarks of system general corporation, used under license by fairchild semiconductor. disclaimer fairchild semiconductor reserves the right to make changes with out further notice to any products herein to improve reliability, function, or design. fairchild does not assume an y liability arising out of th e application or use of any product or circuit described herein; neither does it convey an y license under its patent rights, nor the rights of others. these specifications do not expand the terms of fairchild?s wo rldwide terms and conditions , specifically the warranty therein, which covers these products. life support policy fairchild?s products are not authorized fo r use as critical components in life support devices or systems without the express written approval of fa irchild semiconductor corporation. as used here in: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform w hen properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. a critical component in any component of a life support, device, or system whose failure to perform can be reasonably ex pected to cause the failure of the life support device or system, or to affect its safety or effectiveness. product status definitions definition of terms 2cool? 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