![]() |
|
If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
Datasheet File OCR Text: |
? 2015 microchip technology inc. ds20005344a-page 1 hv9910b features switch mode controller for single switch led drivers enhanced drop-in replac ement to the hv9910 open loop peak current controller internal 8.0 to 450v linear regulator constant frequency or constant off-time operation linear and pwm dimming capability requires few external components for operation applications dc/dc or ac/dc led driver applications rgb backlighting led driver back lighting of flat panel displays general purpose constant current source signage and decorative led lighting chargers description hv9910b is an open loop, current mode control, led driver ic. this ic can be programmed to operate in either a constant frequency or constant off-time mode. it includes an 8.0 - 450v linear regulator which allows it to work from a wide range of input voltages without the need for an external low voltage supply. hv9910b includes a pwm-dimming input that can accept an external control signal with a duty ratio of 0 - 100% and a frequency of up to a few kilohertz. it also includes a 0 - 250mv linear dimming input which can be used for lin- ear dimming of the led current. hv9910b is ideally suited for buck led drivers. since the hv9910b operates in open loop current mode con- trol, the controller achieves good output current regula- tion without the need for any loop compensation. pwm dimming response is limited only by the rate of rise and fall of the inductor current, enabling very fast rise and fall times. hv9910b requires only three external com- ponents, apart from the power stage, to produce a con- trolled led current. this makes hv9910b an ideal solution for low cost led drivers. universal high-brightness led driver downloaded from: http:///
hv9910b ds20005344a-page 2 ? 2015 microchip technology inc. package type typical application circuit 8-lead soic 16-lead soic 12 3 4 5 6 7 8 16 15 14 13 12 11 10 9 87 6 5 12 3 4 vin cs gnd gate rtld vdd pwmd vin ncnc cs gnd ncnc gate ncnc rt ld vdd nc nc pwmd see table 2-1 for pin information c dd r t r cs l1 q1 d1 c o c in hv9910b vin gate pwmd vdd ld cs rt gnd downloaded from: http:/// ? 2015 microchip technology inc. ds20005344a-page 3 hv9910b 1.0 electrical characteristics absolute maximum ratings v in to gnd...................................................... -0.5v to +470v v dd to gnd.......................................................................12v cs, ld, pwmd, gate, rt to gnd... ....-0.3v to (v dd + 0.3v) operating temperature ..................................-40c to +125c storage temperature .....................................-65c to +150c continuous power dissipation (t a = +25c) 8-lead soic ...............................................630 mw 16-lead soic ...........................................1300 mw note : stresses above those listed under absolute maximum ratings may cause permanent dam age to the device. this is a stress rating only and functional operation of the device at those or any other conditions, above those indicated in the operational listings of this specif ication, is not implied. expo- sure to maximum rating conditions for extended periods may affect device reliability. 1.1 electrical specifications table 1-1: electrical characteristics (sheet 1 of 2) 1 symbol parameter note min typ max units conditions input v indc input dc supply voltage range 2 3 8.0 - 450 v dc input voltage i insd shut-down mode supply current 3 - 0.5 1.0 ma pin pwmd to gnd internal regulator v dd internally regulated voltage - 7.25 7.5 7.75 v v in = 8.0v, i dd(ext) = 0, 500pf at gate; r t = 226k ? , pwmd = v dd ? v dd, line line regulation of v dd -0-1 . 0v vin = 8.0 - 450v, i dd(ext) = 0, 500pf at gate; rt = 226k ? , pwmd = v dd ? v dd, load load regulation of v dd -0-1 0 0m v i dd(ext) = 0 - 1.0ma, 500pf at gate; r t = 226k ? , pwmd = v dd uvlo v dd undervoltage lockout threshold 3 6.45 6.7 6.95 v v dd rising ? uvlo v dd undervoltage lockout hysteresis --5 0 0-m v v dd falling i in,max current that the regulator can supply before ic goes into uvlo 4 5.0 - - ma v in = 8.0v pwm dimming v en(lo) pin pwmd input low voltage 3 --0 . 8vv in = 8.0 - 450v v en(hi) pin pwmd input high voltage 3 2.0 - - v v in = 8.0 - 450v r en pin pwmd pull-down resis- tance at pwmd - 50 100 150 k ? v pwmd = 5.0v downloaded from: http:/// hv9910b ds20005344a-page 4 ? 2015 microchip technology inc. current sense comparator v cs,th current sense pull-in thresh- old voltage - 225 250 275 mv -40c < t a < +85c 213 250 287 t a < +125c v offset offset voltage for ld com- parator 3 -12 - 12 mv t blank current sense blanking interval - 150 215 280 ns 0 < t a < +85c, v ld = v dd , v cs = v cs,th + 50mv after t blank - 145 215 315 -40 < t a < +125c, v ld = v dd , v cs = v cs,th + 50mv after t blank t delay delay to output - - 80 150 ns v ld = v dd , v cs = v cs,th + 50mv after t blank oscillator f osc oscillator frequency -2 02 53 0 khz r t = 1.00m ? - 80 100 120 r t = 226k ? gate driver i source gate sourcing current - 165 - - ma v gate = 0v, v dd = 7.5v i sink gate sinking current - 165 - - ma v gate = v dd , v dd = 7.5v t rise gate output rise time - - 30 50 ns c gate = 500pf, v dd = 7.5v t fall gate output fall time - - 30 50 ns c gate = 500pf, v dd = 7.5v 1 specifications are t a = 25c, v in = 15v unless otherwise noted. 2 also limited by package-power dissipation limit; whichever is lower. 3 applies over the full operating ambient temperature range of -40c < t a < +125c. 4 for design guidance only table 1-1: electrical characteristics (continued) (sheet 2 of 2) 1 symbol parameter note min typ max units conditions table 1-2: thermal resistance package ja 8-lead soic 101c/w 16-lead soic 83c/w downloaded from: http:/// ? 2015 microchip technology inc. ds20005344a-page 5 hv9910b 2.0 pin description the locations of the pins are listed in package type . table 2-1: pin description pin # function description 8-lead soic 16-lead soic 1 1 vin input of an 8.0 - 450v linear regulator. 24c s current sense pin used to sense the fet current by means of an external sense resistor. when this pin exceeds the lower of either the internal 250mv or the voltage at the ld pin, the gate output goes low. 35g n d ground return for all internal circuitry. this pin must be electrically connected to the ground of the power train. 4 8 gate output gate driver for an external n-channel power mosfet. 59p w m d pwm dimming input of the ic. when this pin is pulled to gnd, the gate driver is turned off. when the pin is pulled high, the gate driver operates normally. 61 2v d d power supply for all internal circuits. it must be bypassed with a lo w esr capacitor to gnd ( 0.1 f). 71 3l d linear dimming input and sets the current sense threshold as long as the voltage at the pin is less than 250mv (typ). 81 4r t sets the oscillator frequency. when a resistor is connected between rt and gnd, the hv9910 b operates in constant fre- quency mode. when the resistor is connected between rt and gate, the ic operates in constant off-time mode. - 2, 3, 6, 7, 10, 11, 15, 16 nc no connection downloaded from: http:/// hv9910b ds20005344a-page 6 ? 2015 microchip technology inc. 3.0 application information hv9910b is optimized to drive buck led drivers using open-loop, peak current mode control. this method of control enables fairly accurate led current control without the need for high side current sensing or the design of any closed loop controllers. the ic uses very few external components and enables both linear and pwm-dimming of the led current. a resistor connected to the rt pin programs the fre- quency of operation (or the off-time). the oscillator pro- duces pulses at regular intervals. these pulses set the sr flip-flop in the hv9910b which causes the gate driver to turn on. the same pulses also start the blank- ing timer, which inhibits the reset input of the sr flip- flop and prevent false turn-offs due to the turn-on spike. when the fet turns on, the current through the induc- tor starts ramping up. this current flows through the external sense resistor r cs and produces a ramp volt- age at the cs pin. the comparators are constantly comparing the cs pin voltage to both the voltage at the ld pin and the internal 250mv. once the blanking timer is complete, the output of t hese comparators is allowed to reset the flip-flop. when the output of either one of the two comparators goes high, the flip flop is reset and the gate output goes low. the gate goes low until the sr flip-flop is set by the oscillator. assuming a 30% ripple in the inductor, th e current sense resistor rcs can be set using: constant frequency peak current mode control has an inherent disadvantage C at duty cycles greater than 0.5, the control scheme goes into subharmonic oscilla- tions. to prevent this, an artificial slope is typically added to the current sense waveform. this slope com- pensation scheme will affect the accuracy of the led current in the present form. however, a constant off- time peak current control scheme does not have this problem and can easily op erate at duty cycles greater then 0.5. this control scheme also gives inherent input voltage rejection, making the led current almost insensitive to input voltage variations. however, this scheme leads to variable frequency operation and the frequency range depends grea tly on the input and out- put voltage variation. hv9910b makes it easy to switch between the two modes of operation by changing one connection (see section 3.3 oscillator ). 3.1 input voltage regulator hv9910b can be powered directly from its vin pin and can work from 8.0 - 450vdc at its vin pin. when a volt- age is applied at the vin pi n, the hv9910b maintains a constant 7.5v at the vdd pin. this voltage is used to power the ic and any external resistor dividers needed to control the ic. the vdd pin must be bypassed by a low-esr capacitor to provide a low impedance path for the high frequency current of the output gate driver. hv9910b can also be operated by supplying a voltage at the vdd pin greater than the internally regulated voltage. this will turn off the internal linear regulator of the ic and the hv9910b will operate directly off the voltage supplied at the vdd pin. please note that this external voltage at the vdd pin should not exceed 12v. although the vin pin of the hv9910b is rated up to 450v, the actual maximum voltage that can be applied is limited by the power dissi pation in the ic. for exam- ple, if an 8-pin soic (junction to ambient thermal resis- tance r ,j-a = 128c/w) hv9910b draws about i in = 2.0ma from the vin pin, and has a maximum allowable temperature rise of the junction temperature limited to about ? t = 100c, the maximum voltage at the vin pin would be: in these cases, to operate the hv9910b from higher input voltages, a zener diode can be added in series with the vin pin to divert some of the power loss from the hv9910b to the zener di ode. in the above exam- ple, using a 100v zener diode will allow the circuit to easily work up to 450v. the input current drawn from the vin pin is a sum of the 1.0ma current drawn by the internal circuit and the cur- rent drawn by the gate driver.the gate driver depends on the switching frequency and the gate charge of the external fet). in the above equation, f s is the switching frequency and qg is the gate charge of the external fet (which can be obtained from the data sheet of the fet). 3.2 current sense the current sense input of the hv9910b goes to the non-inverting inputs of two comparators. the inverting terminal of one comparator is tied to an internal 250mv reference, whereas the inverting terminal of the other comparator is connected to the ld pin. the outputs of both these comparators are fed into an or gate and the output of the or gate is fed into the reset pin of the flip-flop. thus, the comp arator which has the lowest voltage at the inverting terminal determines when the gate output is turned off. r cs 0.25v orv ld ?? 1.15 i led a ?? ? ------------------------------------ = v in max ?? ? t r ? ja C -------------- 1 i in ----- - ? 100 ? c 128 ? cw ? -------------------------- - 1 2ma ------------ - ? 390v = = = i in 1.0ma q g f s ? + ? downloaded from: http:/// ? 2015 microchip technology inc. ds20005344a-page 7 hv9910b the outputs of the comparators also include a 150- 280ns blanking time which prevents spurious turn-offs of the external fet due to the turn-on spike normally present in peak current mode control. in rare cases, this internal blanking might not be enough to filter out the turn-on spike. in these cases, an external rc filter needs to be added between t he external sense resistor (rcs) and the cs pin. please note that the comparators are fast with a typical 80ns response time. hence these comparators are more susceptible to be triggered by noise than the comparators of the hv9910. a proper layout minimiz- ing external inductances will prevent false triggering of these comparators. 3.3 oscillator the oscillator in the hv9910b is controlled by a single resistor connected at the rt pin. the equation govern- ing the oscillator time period t osc is given by: if the resistor is conn ected between rt and gnd, hv9910b operates in a constant frequency mode and the above equation determines the time-period. if the resistor is connected between rt and gate, the hv9910b operates in a cons tant off-time mode and the above equation determines the off-time. 3.4 gate output the gate output of the hv 9910b is used to drive an external fet. it is recommended that the gate charge of the external fet be less than 25nc for switching fre- quencies 100khz and less than 15nc for switching frequencies > 100khz. 3.5 linear dimming the linear dimming pin is used to control the led cur- rent. there are two cases when it may be necessary to use the linear dimming pin. 1. in some cases, when using the internal 250mv, it may not be possible to find the exact rcs value required to obtain the led current. in these cases, an external voltage divider from the vdd pin can be connected to the ld pin to obtain a voltage (less than 250mv) correspond- ing to the desired voltage across r cs . 2. linear dimming may be desired to adjust the current level to reduce t he intensity of the leds. in these cases, an external 0-250mv voltage can be connected to the ld pin to adjust the led current during operation. to use the internal 250mv, the ld pin can be con- nected to vdd. 3.6 pwm dimming pwm dimming can be achieved by driving the pwmd pin with a low frequency square wave signal. when the pwm signal is zero, the gate driver is turned off; when the pwmd signal if high, the gate driver is enabled. the pwmd signal does not turn off the other parts of the ic, therefore, the respon se of the hv9910b to the pwmd signal is almost instantaneous. the rate of rise and fall of the led current is thus determined solely by the rise and fall times of the inductor current. to disable pwm dimming and enable the hv9910b permanently, connect the pwmd pin to vdd. t osc ? s ?? r t k ? ?? 22 + 25 -------------------------------- - = note: although the ld pin can be pulled to gnd, the output current will not go to zero. this is due to the presence of a minimum on- time, which is equal to the sum of the blanking time and the delay to output time, or about 450ns. this minimum on-time causes the fet to be on for a minimum of 450ns, and thus the led current when ld = gnd is not zero. this current is also dependent on the input voltage, induc- tance value, forward voltage of the leds, and circuit parasitics. to get zero led cur- rent, the pwmd pin has to be used. downloaded from: http:/// hv9910b ds20005344a-page 8 ? 2015 microchip technology inc. figure 3-1: internal block diagram por 250mv rt pwmd gate vdd vin ld cs gnd blanking oscillator regulator + - + - s rq downloaded from: http:/// ? 2015 microchip technology inc. ds20005344a-page 9 hv9910b 4.0 packaging information 4.1 package marking information legend: xx...x product code or customer-specific information y year code (last digit of calendar year) yy year code (last 2 digits of calendar year) ww week code (week of january 1 is week 01) nnn alphanumeric traceability code pb-free jedec ? designator for matte tin (sn) * this package is pb-free. the pb-free jedec designator ( ) can be found on the outer packaging for this package. note : in the event the full microchip part nu mber cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for product code or customer-specific information. package may or not include the corporate logo. 3 e 3 e 8-lead soic example nnn xx xxxxxxxx yyww e 3 343 lg hv9910b 1447 e 3 16-lead soic xxxxxxxxx xxxxxxxxxxx yywwnnn e 3 example hv9910bng1447343 e 3 downloaded from: http:/// hv9910b ds20005344a-page 10 ? 2015 microchip technology inc. note: for the most current package drawings, see the microchip packaging specification at www.microchip.com/packaging. downloaded from: http:/// ? 2015 microchip technology inc. ds20005344a-page 11 hv9910b 16-lead soic (narrow body) package outline (ng) 9.90x3.90mm body, 1.75mm height (max), 1.27mm pitch symbol a a1 a2 b d e e1 e h l l1 l2 dimension (mm) min 1.35* 0.10 1.25 0.31 9.80* 5.80* 3.80* 1.27 bsc 0.25 0.40 1.04 ref 0.25 bsc 0 o 5 o nom - - - - 9.90 6.00 3.90 - - - - max 1.75 0.25 1.65* 0.51 10.00* 6.20* 4.00* 0.50 1.27 8 o 15 o jedec registration ms-012, variation ac, issue e, sept. 2005. 7 k l v g l p h q v l r q l v q r w v s h f l ? h g l q w k h - ( ' ( & |