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datashee t product structure : silicon monolithic integrated circuit this product has no designed protec tion against radioactive rays . 1/25 tsz02201-0l2l0h500270-1-2 ? 2014 rohm co., ltd. all rights reserved. 06.july.2016 rev.003 tsz22111 14 001 www.rohm.com lvds interface lsi 27bit lvds dual-out transmitter BU90T82 general description the BU90T82 transmitter operates from 10mhz to 174mhz wide clock range, and 27bits data of parallel cmos level inputs (r/g/b24bits and vsync, hsync, de) are converted to eight channels of lvds data stream. data is transmitted seven times (7x) stream and reduce cable number by 3(1/3) or less. the BU90T82 has low swing mode to be able to expect further low power and low emi. flexible input/output m ode support vari ous application interfaces. features 27bits data of parallel lvcmos level inputs are converted to 4 or 8 channels of lvds data stream. the maximum data rate is 1218mbps/lane support clock frequency from 10mhz up to 174mhz flexible input/output mode 1. single in / single lvds out 2. single in / dual lvds out 3. double edge single in / dual lvds out 4. single in / distribution lvds out key specifications supply voltage range vdd vddio operating frequency operating temperature range package sbga072t070a applications security camera, digital camera tablet flat panel display 1.62 to 1.98 v 1.62 to 3.60 v 10 to 174 mhz -40 to +85 (typ) (typ) (max) 7.0mm7.0mm1.2mm power down mode clock edge selectable 6bit/8bit mode selectable lvds output mapping selectable (vesa/jieda) support reduced swing lvds for low emi support lvds outputs pin reverse function support spread spectrum clock generator input block diagram figure 1. block diagram [:] [:] [:] y y + + + + + + + + + + downloaded from: http:///
datasheet d a t a s h e e t 2/25 tsz02201-0l2l0h500270-1-2 ? 2014 rohm co., ltd. all rights reserved. 06.july.2016 rev.003 www.rohm.com tsz22111 15 001 BU90T82 contents general desc ription ........................................................................................................... ......................................... 1 key specifi cations ............................................................................................................ .......................................... 1 package w(typ) x d(typ) x h(max) .................................................................................................... 1 applications .................................................................................................................. .............................................. 1 features ...................................................................................................................... ................................................. 1 block di agram ................................................................................................................. ............................................ 1 figure 1. blo ck diagram ....................................................................................................... .................................. 1 pin confi guration ............................................................................................................. ........................................... 4 figure 2. pin c onfiguration ................................................................................................... ................................. 4 pin descr iption................................................................................................................ ............................................ 5 absolute maximum ra tings (ta = 25c) .......................................................................................... ......................... 6 recommended operating condition s (ta= -40c to +85c) ......................................................................... .......... 6 dc characte ristics ............................................................................................................ .......................................... 6 ac characte ristics ............................................................................................................ .......................................... 7 figure 3. lvds output ac ti ming diagrams ................................................................................................ ........ 7 figure 4. lvcmos input ac timing di agrams ..................................................................................... ................ 8 figure 5. lvcmos input ac timing diagrams (ddrn=l) ............................................................................ ....... 8 lvds output ac timing diagrams ................................................................................................ ........................... 9 figure 6. lvds output ac ti ming diagrams ................................................................................................ ........ 9 phase locked loop se t time ................................................................................................... ............................... 9 figure 7. phase locked loop set time .......................................................................................... ...................... 9 supply cu rrent ................................................................................................................ .......................................... 10 figure 8. gray scale patte rn, worst case pattern .............................................................................. ............... 10 lvcmos data inputs pixel map table ............................................................................................ ........................ 11 output mode select on mode, ddrn pins ......................................................................................... ................... 12 figure 9. output mode select on mode,dd rn pins ......................................................................................... 12 de input timi ng diagra ms ...................................................................................................... ................................. 12 figure 10. dual-out mode de i nput timing diagra ms (mode=l) .................................................................... 12 single-in / singl e-out mode ................................................................................................... ................................... 13 figure 11. single-in / single-out mode ........................................................................................ ........................ 13 single-in / dual -out mode ..................................................................................................... .................................... 13 figure 12. single-in / dual-out mode .......................................................................................... ......................... 13 single-in / distri bution-out mode ............................................................................................. ............................... 14 figure 13. single-in / di stribution-ou t mode .................................................................................. ..................... 14 single-in / ddr du al-out mode ................................................................................................. ............................... 14 figure 14. single-in / ddr dual-out mode ...................................................................................... .................... 14 lvds output data mapping table (6b8b = l) .......................................................................................................... 15 figure 15. 8bit mode lvds output mapping ...................................................................................... ................. 15 downloaded from: http:///
datasheet d a t a s h e e t 3/25 tsz02201-0l2l0h500270-1-2 ? 2014 rohm co., ltd. all rights reserved. 06.july.2016 rev.003 www.rohm.com tsz22111 15 001 BU90T82 lvds output data mapping table (6b8b = h) ......................................................................................................... 15 figure 16. 6bit mode lvds output mapping ...................................................................................... ................. 15 lvds data output table for function of flip pin ............................................................................... .................. 16 figure 17. lvds data output for function of flip pin .......................................................................... ............ 16 typical applicat ion circuit ................................................................................................... .................................... 17 figure 18. application circui t (24bit singl e-out m ode) ........................................................................ ............. 17 figure 19. application circui t (18bit singl e-out m ode) ........................................................................ ............. 18 figure 20. application circuit ( 24bit distributi on-out mode) .................................................................. .......... 19 figure 21. application circui t (24bit dual -out mode) .......................................................................... .............. 20 operationa l notes ............................................................................................................. ........................................ 21 ordering info rmation .......................................................................................................... ...................................... 23 marking di agrams .............................................................................................................. ....................................... 23 physical dimension, tape and reel in formation ................................................................................. .................. 24 revision hi story............................................................................................................... ......................................... 25 downloaded from: http:///
datasheet d a t a s h e e t 4/25 tsz02201-0l2l0h500270-1-2 ? 2014 rohm co., ltd. all rights reserved. 06.july.2016 rev.003 www.rohm.com tsz22111 15 001 BU90T82 pin configuration 1 2 3 4 5 6 7 8 9 a ta1+ tb1+ tc1+ tclk1+ td1+ ta2+ tb2+ tc2+ tclk2+ a b ta1- tb1- tc1- tclk1- td1- ta2- tb2- tc2- tclk2- b c prbs flip test gnd vdd gnd vdd td2- td2+ c d r11 r10 vdd gnd pwdn oe d e r13 r12 gnd mode map ddrn e f r15 r14 gnd 6b8b rs clkin f g r17 r16 vdd gnd vdd gnd vddio rf de g h g10 g12 g14 g16 b10 b12 b14 b16 vsync h j g11 g13 g15 g17 b11 b13 b15 b17 hsync j 1 2 3 4 5 6 7 8 9 figure 2. pin configuration (top view) downloaded from: http:///
datasheet d a t a s h e e t 5/25 tsz02201-0l2l0h500270-1-2 ? 2014 rohm co., ltd. all rights reserved. 06.july.2016 rev.003 www.rohm.com tsz22111 15 001 BU90T82 pin description pin name pin no. type descriptions ta1+/-, tb1+/-, tc1+/-,td1+/- a1,b1,a2,b2,a3,b3,a5,b5 lvds output lvds data output (channel1) tclk1+/- a4,b4 lvds clock output (channel1) ta2+/-, tb2+/-, tc2+/-,td2+/- a6,b6,a7,b7,a8,b8,c9,c8 lvds output lvds data output (channel2) tclk2+/- a9,b9 lvds clock output (channel2) r1[7:0] g1,g2,f1, f2,e1,e2,d1,d2 lvcmos input pixel data input g1[7:0] j4,h4,j3 ,h3,j2,h2,j1,h1 b1[7:0] j8,h8,j7 ,h7,j6,h6,j5,h5 de g9 lvcmos input control data input hsync j9 vsync h9 clkin f9 lvcmos input clock input pwdn d8 lvcmos input power down h normal operation l power down (all lvds output signal are hi-z) oe d9 lvds output enable. h: output enable l: output disable(all lvds output signal are hi-z) rf g8 input clk triggering edge select. h rising edge l falling edge rs f8 lvds swing mode select h: 350mv l: 200mv map e8 lvds output data mapping select h: jeida l: vesa mode e7 lvds output mode select h: single in / single out l: single in / dual out (mode=h, ddrn=l distribution out) ddrn e9 input clk triggering edge select. h: ddr function disable l: ddr function enable (it is possible only at dual-out mode) (mode=h, ddrn=l distribution out) 6b8b f7 6bit/8bit mode select h : 6bit mode (td1+/-, td2+/- outputs are hi-z) l : 8bit mode flip c2 lvds output pin reverse select. h: reverse l/open: normal test c3 test mode select (normal operation is low) prbs c1 prbs data output (normal operation is low) vdd c5,c7,d3,g3,g5 power power supply for internal core vddio g7 power supply for i/o gnd c4,c6,d7,e3,f3,g4,g6 ground ground pins downloaded from: http:///
datasheet d a t a s h e e t 6/25 tsz02201-0l2l0h500270-1-2 ? 2014 rohm co., ltd. all rights reserved. 06.july.2016 rev.003 www.rohm.com tsz22111 15 001 BU90T82 absolute maximum ratings (ta = 25c) (note1) package power when ic mo unting on the pcb board. the size of pcb board : 114.5101.51.6 mm 3 the material of pcb board : the fr4 glass epoxy board. caution: operating the ic over the absolute maximum ratings may damage the ic. the damage can either be a short circuit between pins or an open circuit between pins and the internal circuitry. therefore, it is important to consider circuit protection measures, such as adding a f use, in case the ic is operated over the absolute maximum ratings. recommended operating conditions parameter symbol rating units min typ max supply voltage vdd 1.62 1.8 1.98 v vddio 1.62 1.8 / 2.5 / 3.3 3.6 v operating temperature range ta -40 - 85 operating frequency mode=l dual-out single edge (ddrn=h) input 20 - 174 mhz lvds output 10 - 87 mhz double edge (ddrn=l) input 10 - 174 mhz lvds output 10 - 174 mhz mode=h single-out, distribution-out input 10 - 174 mhz lvds output 10 - 174 mhz dc characteristics table 1. lvcmos dc specifications vddio=1.62v~3.6v, vdd=1.62~1.98v, ta=-40 ~+85 symbol parameter limits units conditions min typ max v ih high level input voltage vddio0.65 - vddio v - v il low level input voltage gnd - vddio0.35 v i inc input current -10 - +10 a 0v v in vddio (exclude test, flip pins) i rdn pull-down resister - 50 - k ? test, flip pins table 2. lvds transmitter dc specifications vddio=1.62v~3.6v, vdd=1.62v~1.98v, ta=-40 ~+85 symbol parameter limits units conditions min typ max v od differential output voltage 250 350 450 mv rl=100 ? rs = h 140 200 300 mv rs = l v od change in vod between complementary output states - - 35 mv rl=100 ? v oc common mode voltage 1.125 1.25 1.375 v v oc change in voc between complementary output states - - 35 mv i os output short circuit current - 100 150 ma v out =gnd i oz output tri-state current -10 - +10 a pwdn=l, v out =0v to vdd parameter symbol rating units min max supply voltage vddio -0.3 4.0 v vdd -0.3 2.1 v input voltage v in -0.3 vddio+0.3 v output voltage v out -0.3 vdd+0.3 v storage temperature range tstg -55 125 power dissipation (note ) p d 0.86 w downloaded from: http:///
datasheet d a t a s h e e t 7/25 tsz02201-0l2l0h500270-1-2 ? 2014 rohm co., ltd. all rights reserved. 06.july.2016 rev.003 www.rohm.com tsz22111 15 001 BU90T82 ac characteristics table 3. switching characteristics vddio=2.5v, vdd=1.8v, ta=25 , rl=100 ? , cl=5pf symbol parameter limits units min typ max t tcp input clk period (figure-4,5) 5.75 - 100 ns t tch clk in high time (figure -4,5) 0.35t tcp 0.5t tcp 0.65t tcp ns t tcl clk in low time (figure -4,5) 0.35t tcp 0.5t tcp 0.65t tcp ns t ts lvcmos data set up to clk in (figure -4,5) 0.8 - - ns t th lvcmos data hold from clk in (figure -4,5) 0.8 - - ns t lvt lvds transition time (figure -3) - 0.6 1.5 ns t tcop clk out period (figure -6) 5.75 - 100 ns t tsup differential output setup time clkout (note2) =174mhz - - 120 ps t thld differential output hold time clkout (note2) =174mhz - - 120 ps t tcd clk in to tclk+/- delay (figure-4,5) mode=l,ddrn=h 3.5t tcop - 9.5t tcop ns others 6.5t tcop - 12.5t tcop ns t top1 output data position 1 (figure -6) - t thld 0 + t tsup ns t top0 output data position 0 (figure -6) 7 t tc - t thld 7 t tc 7 t tc + t tsup ns t top6 output data position 6 (figure -6) 2 7 t tc - t thld 2 7 t tc 2 7 t tc + t tsup ns t top5 output data position 5 (figure -6) 3 7 t tc - t thld 3 7 t tc 3 7 t tc + t tsup ns t top4 output data position 4 (figure -6) 4 7 t tc - t thld 4 7 t tc 4 7 t tc + t tsup ns t top3 output data position 3 (figure -6) 5 7 t tc - t thld 5 7 t tc 5 7 t tc + t tsup ns t top2 output data position 2 (figure -6) 6 7 t tc - t thld 6 7 t tc 6 7 t tc + t tsup ns t tpll phase locked loop set time (figure -7) - - 10 ms t deint de input period (figure C10) 4t tcp t tcp *(2n) (note3) - ns t deh de high time (figure -10) 2t tcp t tcp *(2m) (note3) - ns t del de low time (figure -10) 2t tcp - - ns (note2) clkout: lvds output clock frequency. (note3) m, n= integer refer to figure 10 (de input timing diagrams) ac timing diagrams vdiff=(tyx+)-(tyx-) tyx+ tyx- cl rl lvds output load 80% 80% 20% 20% t lvt t lvt vdiff x=1, 2 y=a,b,c,d,clk lvds output figure 3. lvds output ac timing diagrams downloaded from: http:///
datasheet d a t a s h e e t 8/25 tsz02201-0l2l0h500270-1-2 ? 2014 rohm co., ltd. all rights reserved. 06.july.2016 rev.003 www.rohm.com tsz22111 15 001 BU90T82 ac timing diagrams figure 4. lvcmos input ac ti ming diagrams (ddr function off) figure 5. lvcmos input ac timing diagrams (ddr function on) downloaded from: http:///
datasheet d a t a s h e e t 9/25 tsz02201-0l2l0h500270-1-2 ? 2014 rohm co., ltd. all rights reserved. 06.july.2016 rev.003 www.rohm.com tsz22111 15 001 BU90T82 lvds output ac timing diagrams tyx out +/- tyx6 tyx5 tyx4 tyx3 tyx2 tyx1 tyx0 tclkx out +/- previous cycle t top1 t top0 t top6 t top5 t top4 t top3 t top2 next cycle tyx1 tyx0 x = 1,2 y = a, b, c, d t tcop figure 6. lvds output ac timing diagrams phase locked loop set time v diff =0v clkin tclkx+/- pwdn vddio0.65 vddio t tpll x = 1,2 figure 7. phase locked loop set time downloaded from: http:///
datasheet d a t a s h e e t 10/25 tsz02201-0l2l0h500270-1-2 ? 2014 rohm co., ltd. all rights reserved. 06.july.2016 rev.003 www.rohm.com tsz22111 15 001 BU90T82 supply current table 4. supply current vddio=2.5v, vdd=1.8v, temp=25 , 6b8b = l, rs=h, rl=100 ? ,cl=5pf symbol parameter limits units conditions min typ max gray scale pattern (i tccg ) supply current - 95 - ma single-in/single-out mode=h, ddrn=h clkin=174mhz - 128 - ma double edge single-in/dual-out mode=l, ddrn=l clkin =174mhz - 101 - ma single-in/dual-out mode=l, ddrn=h clkin =174mhz - 126 - ma single-in/distribution-out mode=h, ddrn=l clkin =174mhz worst case pattern (i tccw ) - 108 - ma single-in/single-out mode=h, ddrn=h clkin =174mhz - 139 - ma double edge single-in/dual-out mode=l, ddrn=l clkin =174mhz - 111 - ma single-in/dual-out mode=l, ddrn=h clkin =174mhz - 131 - ma single-in/distribution-out mode=h, ddrn=l clkin =174mhz i tccs transmitter power down supply current - - 10 a pwdn=l gray scale pattern clkin d10d11 d12 d13 d14 d15 d16 d=r,g,b d17 figure 8-(1). gray scale pattern worst case pattern (maximum power condition) clkin d=r,g,b d10d11 d12 d13 d14 d15 d16 d17 figure 8-(2). worst case pattern downloaded from: http:///
datasheet d a t a s h e e t 11/25 tsz02201-0l2l0h500270-1-2 ? 2014 rohm co., ltd. all rights reserved. 06.july.2016 rev.003 www.rohm.com tsz22111 15 001 BU90T82 lvcmos data inputs pixel map table table 5. lvcmos data inputs pixel map table tft panel data BU90T82 input 24bit 18bit (map=l) 18bit (map=h) lsb r10 r10 - r10 r11 r11 - r11 r12 r12 r10 r12 r13 r13 r11 r13 r14 r14 r12 r14 r15 r15 r13 r15 r16 - r14 r16 msb r17 - r15 r17 lsb g10 g10 - g10 g11 g11 - g11 g12 g12 g10 g12 g13 g13 g11 g13 g14 g14 g12 g14 g15 g15 g13 g15 g16 - g14 g16 msb g17 - g15 g17 lsb b10 b10 - b10 b11 b11 - b11 b12 b12 b10 b12 b13 b13 b11 b13 b14 b14 b12 b14 b15 b15 b13 b15 b16 - b14 b16 msb b17 - b15 b17 vsync vsync vsync vsync hsync hsync hsync hsync de de de de downloaded from: http:///
datasheet d a t a s h e e t 12/25 tsz02201-0l2l0h500270-1-2 ? 2014 rohm co., ltd. all rights reserved. 06.july.2016 rev.003 www.rohm.com tsz22111 15 001 BU90T82 output mode select on mode, ddrn pins single-in / single-out mode 174mhz tx tx data mapping 87mhz single-in / dual-out mode (ddr disable) - 87mhz - 174mhz tx tx data mapping 174mhz - 174mhz tx tx data mapping 174mhz single-in / dual-out mode (ddr enable) - 174mhz - 174mhz tx tx data mapping 174mhz single-in / distribution-out mode - 174mhz mode=h, ddrn=h mode=h, ddrn=l mode=l, ddrn=h mode=l, ddrn=l figure 9. output mode select on mode,ddrn pins table 6. input de signal in out mode pin select ddrn pin select input de signal single single h h optional single dual l h require(figure 10, 12) single distribution h l optional single dual (ddr function on) l l optional de input timing diagrams in single-in/dual out mode the period between rising edges of de(t deint ), high time of de(t deh ) t deh = t tcp * (2m) t deint = t tcp * (2n) m, n=integer figure 10. single-in / dual-out mode de input timing diagrams (mode=l,ddrn=h) downloaded from: http:///
datasheet d a t a s h e e t 13/25 tsz02201-0l2l0h500270-1-2 ? 2014 rohm co., ltd. all rights reserved. 06.july.2016 rev.003 www.rohm.com tsz22111 15 001 BU90T82 single-in / single-out mo de (mode=h; ddrn=h) pixel data pixel data are mapped previous cycle current cycle tclk1+/- ta1+/- tb1+/- tc1+/- td1+/- rn,gn,bn, n=10-17 hsync,vsync,de tclk2+/- ta2+/- tb2+/- tc2+/- td2+/- no output (hiz) figure 11. single-in/single-out mode (flip=l) single-in / dual-out mo de (mode=l; ddrn=h) 1st pixel data 2st pixel data 1st pixel data 2st pixel data 1st pixel data are mapped 2nd pixel data are mapped previous cycle current cycle tclk1+/- tclk2+/- ta1+/- tb1+/- tc1+/- td1+/- ta2+/- tb2+/- tc2+/- rn,gn,bn, n=10-17 hsync,vsync de td2+/- figure 12. single-in/dual-out mode (flip=l) downloaded from: http:///
datasheet d a t a s h e e t 14/25 tsz02201-0l2l0h500270-1-2 ? 2014 rohm co., ltd. all rights reserved. 06.july.2016 rev.003 www.rohm.com tsz22111 15 001 BU90T82 single-in / distribution-out mode (mode=h; ddrn=l) pixel data pixel data are mapped same pixel data are mapped previous cycle current cycle tclk1+/- tclk2+/- ta1+/- tb1+/- tc1+/- td1+/- ta2+/- tb2+/- tc2+/- rn,gn,bn, n=10-17 hsync,vsync,de td2+/- figure 13. single-in/distrib ution-out mode (flip=l) single-in / ddr dual-out mode (mode=l; ddrn=l) figure 14. single-in/ddr dual-out mode (flip=l) downloaded from: http:///
datasheet d a t a s h e e t 15/25 tsz02201-0l2l0h500270-1-2 ? 2014 rohm co., ltd. all rights reserved. 06.july.2016 rev.003 www.rohm.com tsz22111 15 001 BU90T82 lvds output data mapping table (6b8b = l) r13 r12 g12 r17 r16 r15 r14 r13 r12 r11 r10 l b11 b10 g11 g10 r11 r10 g14 g13 b13 b12 g17 g16 g15 g14 g13 b15 b14 de vsync hsync b17 b16 b15 b14 current cycle previous cycle tclkx+/- tax+/- tbx+/- tcx+/- tdx+/- x = 1, 2 figure 15-(1). 8bit mode lvds output mapping (map=h: jeida) r11 r10 g10 r15 r14 r13 r12 r11 r10 r17 r16 l b17 b16 g17 g16 r17 r16 g12 g11 b11 b10 g15 g14 g13 g12 g11 b13 b12 de vsync hsync b15 b14 b13 b12 current cycle previous cycle tclkx+/- tax+/- tbx+/- tcx+/- tdx+/- x = 1, 2 figure 15-(2). 8bit mode lvds output mapping (map=l; vesa) lvds output data mapping table (6b8b = h) hiz r13 r12 g12 r17 r16 r15 r14 r13 r12 g14 g13 b13 b12 g17 g16 g15 g14 g13 b15 b14 de vsync hsync b17 b16 b15 b14 current cycle previous cycle tclkx+/- tax+/- tbx+/- tcx+/- tdx+/- x = 1, 2 figure 16-(1). 6bit mode lvds output mapping (map=h; jeida) hiz r11 r10 g10 r15 r14 r13 r12 r11 r10 g12 g11 b11 b10 g15 g14 g13 g12 g11 b13 b12 de vsync hsync b15 b14 b13 b12 current cycle previous cycle tclkx+/- tax+/- tbx+/- tcx+/- tdx+/- x = 1, 2 figure 16-(2). 6bit mode lvds output mapping (map=l; vesa) downloaded from: http:///
datasheet d a t a s h e e t 16/25 tsz02201-0l2l0h500270-1-2 ? 2014 rohm co., ltd. all rights reserved. 06.july.2016 rev.003 www.rohm.com tsz22111 15 001 BU90T82 lvds data output table for function of flip pin table 7. lvds data output pin name pin no output data single out dual out distribute out 8bit 6bit 8bit 6bit 8bit 6bit flip=l flip=h flip=l flip=h flip=l flip=h flip=l flip=h flip=l flip=h flip=l flip=h a1 ta1+ - ta1+ - ta1+ td2- ta1+ - ta1+ td1- ta1+ - b1 ta1- - ta1- - ta1- td2+ ta1- - ta1- td1+ ta1- - a2 tb1+ - tb1+ - tb1+ tclk2- tb1+ tclk2- tb1+ tclk1- tb1+ tclk1- b2 tb1- - tb1- - tb1- tclk2+ tb1- tclk2+ tb1- tclk1+ tb1- tclk1+ a3 tc1+ - tc1+ - tc1+ tc2- tc1+ tc2- tc1+ tc1- tc1+ tc1- b3 tc1- - tc1- - tc1- tc2+ tc1- tc2+ tc1- tc1+ tc1- tc1+ a4 tclk1+ - tclk1+ - tclk1+ tb2- tclk1+ tb2- tclk1+ tb1- tclk1+ tb1- b4 tclk1- - tclk1- - tclk1- tb2+ tclk1- tb2+ tclk1- tb1+ tclk1- tb1+ a5 td1+ - - - td1+ ta2- - ta2- td1+ ta1- - ta1- b5 td1- - - - td1- ta2+ - ta2+ td1- ta1+ - ta1+ a6 - td1- - - ta2+ td1- ta2+ - ta1+ td1- ta1+ - b6 - td1+ - - ta2- td1+ ta2- - ta1- td1+ ta1- - a7 - tclk1- - tclk1- tb2+ tclk1- tb2+ tclk1- tb1+ tclk1- tb1+ tclk1- b7 - tclk1+ - tclk1+ tb2- tclk1+ tb2- tclk1+ tb1- tclk1+ tb1- tclk1+ a8 - tc1- - tc1- tc2+ tc1- tc2+ tc1- tc1+ tc1- tc1+ tc1- b8 - tc1+ - tc1+ tc2- tc1+ tc2- tc1+ tc1- tc1+ tc1- tc1+ a9 - tb1- - tb1- tclk2+ tb1- tclk2+ tb1- tclk1+ tb1- tclk1+ tb1- b9 - tb1+ - tb1+ tclk2- tb1+ tclk2- tb1+ tclk1- tb1+ tclk1- tb1+ c9 - ta1- - ta1- td2+ ta1- - ta1- td1+ ta1- - ta1- c8 - ta1+ - ta1+ td2- ta1+ - ta1+ td1- ta1+ - ta1+ figure 17. lvds data output for function of flip pin downloaded from: http:///
datasheet d a t a s h e e t 17/25 tsz02201-0l2l0h500270-1-2 ? 2014 rohm co., ltd. all rights reserved. 06.july.2016 rev.003 www.rohm.com tsz22111 15 001 BU90T82 typical application circuit ( 24bit ? single-out mode) example BU90T82: lvcmos data input (24bit) / rising edge / 350mv swing output / vesa mapping / single-out y y [] [] [] [] [] [] [] [] [] [] [] [] [] [] [] [] [] [] [] [] [] [] [] [] y y + + + + + + + + + + + + + + + + figure 18. application circuit (24bit single-out mode) downloaded from: http:///
datasheet d a t a s h e e t 18/25 tsz02201-0l2l0h500270-1-2 ? 2014 rohm co., ltd. all rights reserved. 06.july.2016 rev.003 www.rohm.com tsz22111 15 001 BU90T82 typical application circuit (18bit ? single-out mode) example BU90T82: lvcmos data input (18bit) / rising edge /350mv swing output / vesa mapping /single-out y y [] [] [] [] [] [] [] [] [] [] [] [] [] [] [] [] [] [] y y + + + + + + + + + + + + + + + + figure 19. application circuit (18bit single-out mode) downloaded from: http:///
datasheet d a t a s h e e t 19/25 tsz02201-0l2l0h500270-1-2 ? 2014 rohm co., ltd. all rights reserved. 06.july.2016 rev.003 www.rohm.com tsz22111 15 001 BU90T82 typical application circuit (24bit ? distribution-out mode) example BU90T82: lvcmos data input (24bit) / rising edge / 350mv swing output / vesa mapping y y [] [] [] [] [] [] [] [] [] [] [] [] [] [] [] [] [] [] [] [] [] [] [] [] y y + + + + + + + + + + + + + + + + + + + + figure 20. application circuit (24bit distribution-out mode) downloaded from: http:///
datasheet d a t a s h e e t 20/25 tsz02201-0l2l0h500270-1-2 ? 2014 rohm co., ltd. all rights reserved. 06.july.2016 rev.003 www.rohm.com tsz22111 15 001 BU90T82 typical application circuit (24bit ? dual-out mode) example BU90T82: lvcmos data input (24bit) / rising edge / 350mv swing output / vesa mapping / dual-out y y [] [] [] [] [] [] [] [] [] [] [] [] [] [] [] [] [] [] [] [] [] [] [] [] y y + + + + + + + + + + + + + + + + + + + + + figure 21. application circuit (24bit dual-out mode) downloaded from: http:///
datasheet d a t a s h e e t 21/25 tsz02201-0l2l0h500270-1-2 ? 2014 rohm co., ltd. all rights reserved. 06.july.2016 rev.003 www.rohm.com tsz22111 15 001 BU90T82 operational notes 1. reverse connection of power supply connecting the power supply in reverse polarity can damage the ic. take precautions against reverse polarity when connecting the power supply, such as mounting an external diode between the power supply and the ics power supply pins. 2. power supply lines design the pcb layout pattern to provide low impedance supply lines. separate the ground and supply lines of the digital and analog blocks to prevent noise in the ground and supply lines of the digital bloc k from affecting the analog block. furthermore, connect a capacitor to ground at all powe r supply pins. consider the effect of temperature and aging on the capacitance value when using electrolytic capacitors. 3. ground voltage ensure that no pins are at a voltage below that of t he ground pin at any time, even during transient condition. 4. ground wiring pattern when using both small-signal and large-current ground traces , the two ground traces should be routed separately but connected to a single ground at the refe rence point of the application board to avoid fluctuations in the small-signal ground caused by large currents. also ensure that the ground trac es of external components do not cause variations on the ground voltage. the ground lines must be as short and thick as possible to reduce line impedance. 5. thermal consideration should by any chance the maximum junction temperature rati ng be exceeded the rise in temperature of the chip may result in deterioration of the properti es of the chip. in case of exceeding this absolute maximum rating, increase the board size and copper area to prevent exceeding the maximum junction temperature rating. 6. recommended operating conditions these conditions represent a range within which the ex pected characteristics of the ic can be approximately obtained. the electrical characteristics are g uaranteed under the condit ions of each parameter 7. inrush current when power is first supplied to the ic, it is possible that the internal logic may be unstable and inrush current may flow instantaneously due to the internal powering sequence and delays, especially if the ic has more than one power supply. therefore, give special consi deration to power coupling capacitance, power wiring, width of ground wiring, and routing of connections 8. operation under strong electromagnetic field operating the ic in the presence of a strong electromagnetic field may cause the ic to malfunction. 9. testing on application boards when testing the ic on an application board, connecting a capacitor directly to a low-impedance output pin may subject the ic to stress. always dischar ge capacitors completely after each process or step. the ics power supply should always be turned off completely before connecting or removing it from the test setup during the inspection process. to prevent damage from static discharge, ground the ic during assembly and use similar precautions during transport and storage. 10. inter-pin short and mounting errors ensure that the direction and position are correct when mounting the ic on the pc b. incorrect mounting may result in damaging the ic. avoid nearby pins being shorted to each ot her especially to ground, power supply and output pin. inter-pin shorts could be due to many reasons such as me tal particles, water droplets (in very humid environment) and unintentional solder bridge deposited in between pins during assembly to name a few 11. unused input pins input pins of an ic are often connected to the gate of a mos transis tor. the gate has extremely high impedance and extremely low capacitance. if left unconnected, the electr ic field from the outside can easily charge it. the small charge acquired in this way is enough to produce a signifi cant effect on the conduction through the transistor and cause unexpected operation of the ic. so unless otherwise specified, unused input pins should be connected to the power supply or ground line downloaded from: http:///
datasheet d a t a s h e e t 22/25 tsz02201-0l2l0h500270-1-2 ? 2014 rohm co., ltd. all rights reserved. 06.july.2016 rev.003 www.rohm.com tsz22111 15 001 BU90T82 operational notes C continued 12. regarding the input pin of the ic in the construction of this ic, p-n junctions are inevit ably formed creating parasitic diodes or transistors. the operation of these parasitic elements can result in mutual interference among circuits, operational faults, or physical damage. therefore, conditions which c ause these parasitic elements to operate, such as applying a voltage to an input pin lower than the ground voltage should be avoide d. furthermore, do not apply a voltage to the input pins when no power supply voltage is applied to the ic. even if t he power supply voltage is applied, make sure that the input pins have voltages within the values specifi ed in the electrical characteristics of this ic downloaded from: http:///
datasheet d a t a s h e e t 23/25 tsz02201-0l2l0h500270-1-2 ? 2014 rohm co., ltd. all rights reserved. 06.july.2016 rev.003 www.rohm.com tsz22111 15 001 BU90T82 ordering part number bu9 0 t 8 2 - e2 part no. packaging and forming specification e2:embossed ta p e and reel marking diagram sbga072t070a(top view) BU90T82 part number marking lot number 1pin mark downloaded from: http:///
datasheet d a t a s h e e t 24/25 tsz02201-0l2l0h500270-1-2 ? 2014 rohm co., ltd. all rights reserved. 06.july.2016 rev.003 www.rohm.com tsz22111 15 001 BU90T82 physical dimension, tape and reel information package name sbga072t070a downloaded from: http:///
datasheet d a t a s h e e t 25/25 tsz02201-0l2l0h500270-1-2 ? 2014 rohm co., ltd. all rights reserved. 06.july.2016 rev.003 www.rohm.com tsz22111 15 001 BU90T82 revision history date revision changes 30.jul.2014 001 new release 23.mar.2015 002 page 2: added contents; page 7: modified clkin to tclk+/- delay time 06.jul.2016 003 page 6: change supply voltage, size of mounting pcb in absolute maximum ratings add spec of pull-down resistor page 7: change t tcp to t tcop in table 3. clkin to tclk+/- delay, output data position. page 8: modify rf setting in figure 4, 5 page 17-20: figure 18,19,20,21. modify application circuit page 24: modify bga ball assign in physical dimension downloaded from: http:///
notice-p ga -e rev.003 ? 201 5 rohm co., ltd. all rights reserved. notice precaution on using rohm products 1. our products are designed and manufactured for application in ordinary electronic equipments (such as av equipment, oa equipment, telecommunication equipment, home electronic appliances, amusement equipment, etc.). if you intend to use our products in devices requiring extremely h igh reliability (such as medical equipment (note 1) , transport equipment, traffic equipment, aircraft/spacecraft, nuclear powe r controllers, fuel controllers, car equipment including car accessories, safety devices, etc.) and whose malfunction or failure may cause loss of human life, bodily injury or serious damage to property ( specific applications ), please consult with the rohm sales representative in adv ance. unless otherwise agreed in writing by rohm in advance, rohm s hall not be in any way responsible or liable for any damages, expenses or losses incurred by you or third parties arisin g from the use of any rohm s products for specific applications. (note1) medical equipment classification of the specific appl ications japan usa eu china class class class b class class ? class 2. rohm designs and manufactures its products subject to stri ct quality control system. however, semiconductor products can fail or malfunction at a certain rate. please be sure to implement, at your own responsibilities, adequ ate safety measures including but not limited to fail-safe desig n against the physical injury, damage to any property, whic h a failure or malfunction of our products may cause. the followi ng are examples of safety measures: [a] installation of protection circuits or other protective devic es to improve system safety [b] installation of redundant circuits to reduce the impact of single or multiple circuit failure 3. our products are designed and manufactured for use under standard conditions and not under any special or extraordinary environments or conditions, as exemplified be low. accordingly, rohm shall not be in any way responsible or liable for any damages, expenses or losses arising from th e use of any rohms products under any special or extraordinary environments or conditions. if yo u intend to use our products under any special or extraordinary environments or conditions (as exemplified belo w), your independent verification and confirmation of product performance, reliability, etc, prior to use, must be n ecessary: [a] use of our products in any types of liquid, including water, oils, chemicals, and organi c solvents [b] use of our products outdoors or in places where the products are exposed to direct sunlight or dust [c] use of our products in places where the products are e xposed to sea wind or corrosive gases, including cl 2 , h 2 s, nh 3 , so 2 , and no 2 [d] use of our products in places where the products are exposed t o static electricity or electromagnetic waves [e] use of our products in proximity to heat-producing component s, plastic cords, or other flammable items [f] sealing or coating our products with resin or other coating materials [g] use of our products without cleaning residue of flux (even if you use no-clean type fluxes, cleaning residue of flux is recommended); or washing our products by using water or water-soluble cleaning agents for cleaning residue after soldering [h] use of the products in places subject to dew condensation 4. the products are not subject to radiation-proof design. 5. please verify and confirm characteristics of the final or mou nted products in using the products. 6 . in particular, if a transient load (a large amount of load appl ied in a short period of time, such as pulse. is applied, confirmation of performance characteristics after on-board mou nting is strongly recommended. avoid applying power exceeding normal rated power; exceeding the power rating u nder steady-state loading condition may negatively affec t product performance and reliability. 7 . de -rate power dissipation depending on ambient temperature. wh en used in sealed area, confirm that it is the use in the range that does not exceed the maximum junction temperature. 8 . confirm that operation temperature is within the specified range desc ribed in the product specification. 9 . rohm shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in this document. precaution for mounting / circuit board design 1. when a highly active halogenous (chlorine, bromine, etc .) flux is used, the residue of flux may negatively affect prod uct performance and reliability. 2. in principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method mus t be used on a through hole mount products. i f the flow soldering method is preferred on a surface-mount p roducts , please consult with the rohm representative in advance. for details, please refer to rohm mounting specification downloaded from: http:///
notice-p ga -e rev.003 ? 201 5 rohm co., ltd. all rights reserved. precautions regarding application examples and external circuits 1. if change is made to the constant of an external circuit, p lease allow a sufficient margin considering variations o f the characteristics of the products and external components, inc luding transient characteristics, as well as static characteristics. 2. you agree that application notes, reference designs, and a ssociated data and information contained in this docum ent are presented only as guidance for products use. therefore, i n case you use such information, you are solely responsible for it and you must exercise your own independ ent verification and judgment in the use of such information contained in this document. rohm shall not be in any way respon sible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of such informat ion. precaution for electrostatic this product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. please take pr oper caution in your manufacturing process and storage so t hat voltage exceeding the products maximum rating will not be applied to products. please take special care under dry co ndition (e.g. grounding of human body / equipment / solder iro n, isolation from charged objects, setting of ionizer, friction prevention and temperature / humidity control). precaution for storage / transportation 1. product performance and soldered connections may deteriorate i f the products are stored in the places where: [a] the products are exposed to sea winds or corrosive gases, in cluding cl2, h2s, nh3, so2, and no2 [b] the temperature or humidity exceeds those recommended by rohm [c] the products are exposed to direct sunshine or condensation [d] the products are exposed to high electrostatic 2. even under rohm recommended storage condition, solderabil ity of products out of recommended storage time period may be degraded. it is strongly recommended to confirm so lderability before using products of which storage time is exceeding the recommended storage time period. 3. store / transport cartons in the correct direction, which is indi cated on a carton with a symbol. otherwise bent leads may occur due to excessive stress applied when dropping of a c arton. 4. use products within the specified time after opening a humi dity barrier bag. baking is required before using products of which storage time is exceeding the recommended storage tim e period. precaution for product label a two-dimensional barcode printed on rohm products label is f or rohm s internal use only. precaution for disposition when disposing products please dispose them properly usi ng an authorized industry waste company. precaution for foreign exchange and foreign trade act since concerned goods might be fallen under listed items of export control prescribed by foreign exchange and foreign trade act, please consult with rohm in case of export. precaution regarding intellectual property rights 1. all information and data including but not limited to appl ication example contained in this document is for reference only. rohm does not warrant that foregoing information or data will not infringe any intellectual property rights or any other rights of any third party regarding such information or data. 2. rohm shall not have any obligations where the claims, a ctions or demands arising from the combination of the products with other articles such as components, circuits, systems or ex ternal equipment (including software). 3. no license, expressly or implied, is granted hereby under any inte llectual property rights or other rights of rohm or any third parties with respect to the products or the information contai ned in this document. provided, however, that rohm will not assert it s intellectual property rights or other rights against you or you r customers to the extent necessary to manufacture or sell products containing the products, subject to th e terms and conditions herein. other precaution 1. this document may not be reprinted or reproduced, in whole or in part, without prior written consent of rohm. 2. the products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written consent of rohm. 3. in no event shall you use in any way whatsoever the pr oducts and the related technical information contained in the products or this document for any military purposes, includi ng but not limited to, the development of mass-destruction weapons. 4. the proper names of companies or products described in this document are trademarks or registered trademarks of rohm, its affiliated companies or third parties. downloaded from: http:///
datasheet datasheet notice ? we rev.001 ? 2015 rohm co., ltd. all rights reserved. general precaution 1. before you use our pro ducts, you are requested to care fully read this document and fully understand its contents. rohm shall n ot be in an y way responsible or liabl e for fa ilure, malfunction or acci dent arising from the use of a ny rohms products against warning, caution or note contained in this document. 2. all information contained in this docume nt is current as of the issuing date and subj ec t to change without any prior notice. before purchasing or using rohms products, please confirm the la test information with a rohm sale s representative. 3. the information contained in this doc ument is provi ded on an as is basis and rohm does not warrant that all information contained in this document is accurate an d/or error-free. rohm shall not be in an y way responsible or liable for an y damages, expenses or losses incurred b y you or third parties resulting from inaccur acy or errors of or concerning such information. downloaded from: http:///

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