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automotive power data sheet rev 1.0, 2012-10-01 tle 8088 em engine management ic for small engines
data sheet 2 rev 1.0, 2012-10-01 tle 8088 em table of contents 1 overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3.1 pin assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3.2 pin definitions and functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 4 general product characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 4.1 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 4.2 functional range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 4.3 thermal resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 5 voltage regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 5.1 voltage regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 5.2 power on reset and reset output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 5.3 watchdog operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 6 power drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 6.1 low-side drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 6.2 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 7k-line . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 7.1 k-line . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 8 application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 8.1 further application informat ion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 9 package outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 10 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 table of contents
pg-ssop-24 type package marking TLE8088EM pg-ssop-24 TLE8088EM data sheet 3 rev 1.0, 2012-10-01 engine management ic for small engines TLE8088EM 1overview features ? supply 5 v ( 2%), 250ma ? over-temperature and over-current protection ? watchdog and reset function ? k-line transceiver ? 1 low side driver for inductive lo ads with maximum operation current of 2.6a including over-temperature , over-current protection and open load/short to gnd in off diagnosis ? 1 low side driver for resistive loads with maximum operation current of 3a including over-temperatu re and over-current protection ? small package pg-s sop-24 exposed pad ? temperature range: -40c to 150c ? green product (rohs compliant) ? aec qualified description TLE8088EM is an engine management ic based on infineo n smart power technology (spt). it is protected by embedded protection functions and integrates a power su pply, k-line and power stages to drive different loads in an engine management system. it is designed to provid e a compact and cost optimized solution for engine management and powertrain systems. it is specially suitable for one cylinder motorcycle engine management system.
data sheet 4 rev 1.0, 2012-10-01 engine management ic tle 8088 em block diagram 2 block diagram figure 1 block diagram ls-driver 2 ls-driver 1 5v voltage regulator out1 out2 gnd in1 in2 tx kio vs rx agnd k line transceiver nro wdi watchdog & reset wde v5dd st
engine management ic tle 8088 em pin configuration data sheet 5 rev 1.0, 2012-10-01 3 pin configuration 3.1 pin assignment figure 2 pin configuration 3.2 pin definitions and functions pin symbol function 1 n.c. not connected 2 gnd power ground 3 kio k-line bus connection 4 out1 output channel 1 5 out2 output channel 2 6 vs battery voltage: 100nf ceramic capacitor directly connected at the ic to ground 7 agnd analog ground: should be connected to the system logic ground 8 wde watchdog enable: active high, internal pull up 9 v5dd 5v supply output: connected to external blocking capacitor. 10 n.c. not connected 11 n.c. not connected 12 n.c. not connected 13 n.c. not connected 14 n.c. not connected 15 n.c. not connected 16 nro reset output: open drain, active low 17 wdi watchdog input: trigger input for watchdog pulses 18 st status signal: output diagnostic signal 19 in2 control input channel 2: internal pull down pg-ssop -24 .vsd 24 23 22 21 20 19 18 17 16 15 1 2 3 4 5 6 7 8 9 10 14 13 11 12 24 23 22 21 20 19 18 17 16 15 1 2 3 4 5 6 7 8 9 10 14 13 11 12 n.c. gnd kio out1 out2 vs agnd wde v5dd n.c. n.c. n.c. n.c. gnd rx tx in1 in2 st wdi nro n.c. n.c. n.c.
data sheet 6 rev 1.0, 2012-10-01 tle 8088 em pin configuration 20 in1 control input channel 1: internal pull down 21 tx logic level input for data to be transmitted on the k-line bus kio 22 rx logic output of data received from the k-line bus kio. 23 gnd power ground 24 n.c. not connected exposed pad should be connected to gnd and to the ground plane of the ecu pin symbol function
tle 8088 em general product characteristics data sheet 7 rev 1.0, 2012-10-01 4 general product characteristics 4.1 absolute maximum ratings note: stresses above the ones listed here may cause perm anent damage to the device. exposure to absolute maximum rating conditions for extended periods may affect device reliability. note: integrated protection functions are designed to prevent ic destruction under fault conditions described in the data sheet. fault conditions are considered as ?outside? normal operating range. protection functions are not designed for continuous repetitive operation. absolute maximum ratings 1) t j = -40 c to +150 c; all voltages with respect to ground. positive current flowing into pin (unless otherwise specified) 1) not subject to production test, specified by design pos. parameter symbol limit values unit conditions min. max. voltages 4.1.1 continuous voltage on pin vs v s -0.3 40 v 4.1.2 continuous voltage on pin out1 v out1 -0.3 30 v in1=0v 4.1.3 continuous voltage on pin out2, kio v out2, kio -0.3 35 v in2=0v tx=v5dd 4.1.4 in1, in2, v5dd, rxd, txd, st, nro, wdi, wde v x -0.3 5.5 v 2) 2) for outputs no short circuit is allowed temperatures 4.1.5 junction temperature t j -40 150 c? 4.1.6 storage temperature t stg -55 150 c? esd susceptibility 4.1.7 esd resistivity to gnd, vs, k-line, out1,2 v esd -4 4 kv hbm 3) 3) esd susceptibility, hbm according to eia/jesd 22-a114 b (1.5kohm, 100pf) 4.1.8 esd resistivity to gnd, other pins v esd -2 2 kv hbm 3) 4.1.9 electro static discharge voltage ?charged device model - cdm? v esd -500 500 v all pins cdm 4) 4) esd susceptibility, charged devi ce model ?cdm? eia/jesd22-c101-c 4.1.10 electro static discharge voltage ?charged device model - cdm? v esd -750 750 v pin 1, 12, 13, 24 (corner pins) cdm 4)
data sheet 8 rev 1.0, 2012-10-01 engine management ic tle 8088 em general product characteristics 4.2 functional range note: within the functional range the ic operates as de scribed in the circuit description. the electrical characteristics are specifi ed within the conditions given in the re lated electrical ch aracteristics table. 4.3 thermal resistance pos. parameter symbol limit values unit conditions min. max. 4.2.1 supply voltage v s 618v? 4.2.2 junction temperature t j -40 150 c? pos. parameter symbol limit values unit conditions min. typ. max. 4.3.1 junction to case r thjc ? 6.3 9 k/w measured to exposed pad 1) 1) not subject to production test, specified by design. 4.3.2 junction to ambient r thja ?29?k/w 1) 2) 2) specified r thja value is according to jedec jesd51-2,-5,-7 at natural convection on fr4 2s2p board; the product (chip+package) was simulated on a 76.2 x 114.3 x 1.5 mm boar d with 2 inner copper layers (2 x 70m cu, 2 x 35m cu). where applicable a thermal via array under the ex posed pad contacted the first inner copper layer. .
data sheet 9 rev 1.0, 2012-10-01 tle 8088 em voltage regulator 5 voltage regulator 5.1 voltage regulator the TLE8088EM integrates a voltage regulator for load currents up to 250 ma. the voltage applied to pin vs is regulated at pin v5dd to 5.0 v with a precision of 2%. the sophisticated design allows to achieve stable operation even with ceramic output capa citors down to 470nf. the voltage regulator features under-voltage reset, power on reset and watchdog. it is protected against over -current, short circuit and over temperature conditions. the low-side switch function and the k-line transceiver are independent of the reset and watchdog signals. figure 3 5v supply 5.2 power on reset and reset output reset output is an open drain output. when the level of v v5dd reaches the reset threshold v rt , the signal at nro remains low for the power-on reset delay time t rd . the reset function and ti ming is illustrated in figure 4 . the reset reaction time t rr avoids wrong triggering caused by short ?glitches? on the v5dd-line. in case of v5dd power down ( v v5dd < v rt for t > t rr ) a logic low signal is generated at the pin nro to reset an external micro controller. the level of the reset threshold for increasing v v5dd is for the hysteresis ( v rh ) higher than the level for decreasing v v5dd . the reset and watchdog signals are for external use and do not affect the state of the channels and k-line transceiver. the correct functionality of the devices is ensured by an in dependent voltage monitoring circuitry. + - vref v5dd vs e.g. c i v5dd i vs
data sheet 10 rev 1.0, 2012-10-01 tle 8088 em voltage regulator figure 4 reset function and timing diagram 5.3 watchdog operation after power on, the reset output signal at the nro pin is kept low for the power-on reset delay time t rd of typ. 15ms. with the low to high transition of the sig nal at nro the micro controller reset is released. the TLE8088EM integrates a watchdog function. if wde is connected to low, the watchdog function is disabled. if the wde is connected to 5v or left open, the watchdog function is enabled. a pull up current source is integrated in the wde pin. after the activation of the watchdog function, the timing of the signal on wdi from the micro-controller must correspond the wd-period t wd,p specified in the electrical characteristics. a re-trigger of the wd-period is done with a high-to-low transition at the wdi-pin within the time t wd,p . a high to low transition of the watchdog trigger signal on pin wdi is taken as a trigger. to avoid wrong triggering due to parasitic glitches two high samples followed by two low samples (sample period t sam typ. 64 s ) are decoded as a valid trigger, see figure 6 . a reset is generated (nro goes low) for the time t wr if there is no trigger pulse during the watchdog period as shown in figure 5 . v s t v v5dd t v rt < t rr v nro t v nro _h t rd t rr t rr v nro _l t rd
data sheet 11 rev 1.0, 2012-10-01 tle 8088 em voltage regulator figure 5 watchdog timing diagram figure 6 watchdog valid trigger t vs v 5dd v nro trigger window wdi t rd v rt 1. correct trigger no trigger causing reset t t t t t rr t wr normal operation t sam t wd,p wdi t wd,p valid trigger wd period restart no trigger wd time-out time-out t sam no trigger wd time-out no trigger wd time-out
data sheet 12 rev 1.0, 2012-10-01 tle 8088 em voltage regulator electrical characteristics: voltage regulator v s = 13.5 v, t j = -40 c to +150 c, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) pos. parameter symbol limit values unit conditions min. typ. max. output v5dd 5.3.1 output voltage v v5dd 4.90 5.00 5.10 v 0ma < i v5dd < 150ma 6v < v s < 18v 5.3.2 output voltage v v5dd 4.90 5.00 5.10 v 0ma < i v5dd < 250ma 6v < v s < 18v 1) 5.3.3 output current limitation i v5dd 250 ? 650 ma v v5dd = 0v, 6v < v s < 18v 5.3.4 load regulation v v5dd,lo ? ? 20 mv 1 ma < i v5dd < 150ma 5.3.4a load regulation v v5dd,lo ? ? 50 mv 1 ma < i v5dd < 250ma 1) 5.3.5 line regulation v v5dd,li ??10mv i v5dd = 1 ma; 10 v < v s < 18v 5.3.6 power supply rejection ratio psrr ?60?db f r = 100 hz; v r = 0.5 vpp 1) 5.3.7 output capacitor c q 470 ? ? nf 1) esr(c q ) ??10 5.3.8 low drop voltage v v5dd 4.80 ? ? v i v5dd = 1ma v s =5v 5.3.9 4.40 ? ? v i v5dd = 150ma v s =5v; after device ramp-up ( v s >9v) 5.3.9a 4.15 ? ? v i v5dd = 250ma v s =5v; after device ramp-up ( v s >9v) 1) current consumption 5.3.10 quiescent current i q ??4ma i v5dd = 0a; ch1,ch2 off, k-line off wde 5.3.11 low level input voltage v in,l ? ? 1.00 v ? 5.3.12 high level input voltage v in,h 2.00 ? ? v ? 5.3.13 hysteresis wde v in,hys 50 ? 250 mv 1) 5.3.14 input pull up current i in_pu_l -20 -50 -100 a v in =0v i in_pu_h -2.40 ? ? a v in =4.4v watchdog input wdi 5.3.15 low level input voltage v in,l ? ? 1.00 v 5.3.16 high level input voltage v in,h 2.00 ? ? v 5.3.17 input voltage hysteresis v in,hys 50 ? 250 mv 1)
data sheet 13 rev 1.0, 2012-10-01 tle 8088 em voltage regulator 5.3.18 input pull down current i in_pd_h 20 50 100 a v in =5v i in_pd_l 2.40 ? ? a v in =0.6v 5.3.19 watchdog sampling time t sam 40 64 130 s 5.3.20 watchdog period t wd,p 50 60 70 ms 5.3.21 watchdog reset time t wr 120 240 360 s reset output nro 5.3.22 output voltage reset switching threshold v rt 4.00 4.25 4.50 v v v5dd decreasing 5.3.23 reset hysteresis v rh 10 ? 150 mv 5.3.24 low level output voltage v nro,l ? ? 1.10 v i nro =1ma 5.3.25 leakage current i nro,lk ??1a v rt = 5v 5.3.26 power-on reset delay time t rd 10 15 20 ms 5.3.27 reset reaction time t rr 148s? over temperature protection 5.3.28 over-temperature t ot 150 ? 200 c 1) 5.3.29 over-tempera ture hysteresis t oth ?20?c 1) 1) not subject to production test, specified by design. electrical characteristics: voltage regulator (cont?d) v s = 13.5 v, t j = -40 c to +150 c, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) pos. parameter symbol limit values unit conditions min. typ. max.
data sheet 14 rev 1.0, 2012-10-01 tle 8088 em power drivers 6 power drivers 6.1 low-side drivers the power stages are built by n-channel power mosfet transistors. the channels are universal multi channel switches but mostly suitable to be used in engine management systems. wi thin an engine management system, the best fit of the channel s to the typical loads is: ? channel 1 for injector, valves or si milar sized solenoids with a maximum operation current requirement of 2.6a ? channel 2 for malfunction indication lamps or other re sistive loads with a maximum current requirement of 3a figure 7 low-side switches channel 1 has open load detection in off state. if an open load condition pers ists for a time longer than the filter time t d , an open load will be dete cted and the st pin set to low. on the ri sing edge of the in1 signal the st pin will be released after the time t st,clear , see figure 9 . in over-current situation channel 1 w ill be switched off and kept latched. additionally the st signal will be set to low after the settling time t st,set,oc . on the falling edge of the in1 signal the st pin will be released after the time t st,clear , see figure 10 . therefore channel 1 can be switched on again by toggling the in1 pin. during an over-temperature event the st signal is set to low and will turn ba ck to high if the failure condition is disappeared (see table 1 ). in over-current situation the channel 2 will be switched off, and after typ. 4ms the channel will be switched on again. channel 2 is also ov er-temperature protected. in over-temperature si tuation channel 2 will be switched off and will restart if the juncti on temperature falls by t hermal shutdown hysteresis t oth . table 1 truth table for diagnostics of ch1 open load over current over temperature st status 0 0 0 1 normal operation 1 x x 0 failure detected x 1 x 0 failure detected and latched channel 1 is switched off x x 1 0 failure detected and channel 1 is switched off failure situation st 0 = situation doesn?t exist 1 = normal operation 1 = situation exists 0 = failure detected x = 0 or 1 v bat i d v dscl out v ds gnd l , r l v bat i d out v ds gnd r channel 1 channel 2
data sheet 15 rev 1.0, 2012-10-01 tle 8088 em power drivers 6.2 electrical characteristics electrical characteristics v s = 13.5 v, t j = -40 c to +150 c: all voltages with respect to ground. positive current flowing into pin (unless otherwise specified). pos. parameter symbol limit values unit conditions min. typ. max. output channel resistance 6.2.1 on state resistance ch1 r dson ? 0.60 0.70 i dnom =1.3a; t j =150c 6.2.2 on state resistance ch2 r dson ? 1.10 1.20 i dnom =0.3a; t j =150c input characteristics 6.2.3 parallel input pin low level in1,in2 v in,l ? ? 1.00 v ? 6.2.4 parallel input pin high level in1,in2 v in,h 2.00 ? ? v ? 6.2.5 parallel input pin hysteresis in1,in2 v in,hys 50 ? 250 mv 1) 6.2.6 parallel input pin input pull down current in1, in2 i in_pd_h 20 50 100 a v in =5v i in_pd_l 2.40 ? ? a v in =0.6v clamping voltage 6.2.7 output clamping voltage ch1 v dscl 30 35 40 v i out1 =0.02a leakage currents 6.2.8 output leakage current in off mode, ch1 i doff ??3a v ds =13.5v; t j =150c 1) 2) 6.2.9 output leakage current in off mode, ch2 i doff ??3a v ds =13.5v; t j =150c 1) timing 6.2.10 turn-on delay time ch1 t don ?0.251s v s = 13.5v, i ds1 = 1.3a, resistive load 1) 3) 6.2.11 turn-on delay time ch2 t don 0.15 1.2 s v s = 13.5v, i ds2 = 0.3a, resistive load 1) 6.2.12 turn-off delay time ch1 t doff ? 0.65 1.5 s v s = 13,5v, i ds1 = 1.3a, resistive load 1) 6.2.13 turn-off delay time ch2 t doff ? 0.35 1.5 s v s = 13.5v, i ds2 = 0.3a, resistive load 1) 6.2.14 turn-on time ch1 t son ? 0.45 1.2 s v s = 13.5v, i ds1 = 1.3a, resistive load 1)
data sheet 16 rev 1.0, 2012-10-01 tle 8088 em power drivers 6.2.15 turn-on time ch2 t son ?0.201s v s = 13.5v, i ds2 = 0.3a, resistive load 1) 6.2.16 turn-off time ch1 t soff ? 0.40 1.2 s v s = 13.5v, i ds1 = 1.3a, resistive load 1) 6.2.17 turn-off time ch2 t soff ?0.201s v s = 13.5v, i ds2 = 0.3a, resistive load 1) over current protection 6.2.18 output current switch off threshold ch1 i ds_oc 2.6 ? 5 a 6v < v s < 18v 6.2.19 output current switch off threshold ch2 i ds_oc 3.0? 6.5a6v < v s < 18v 6.2.20 off time of ch2 in current switch off t off 3?8ms? 6.2.21 current switch off filter time ch1, ch2 t cl_f 0.5 ? 3 s ? open load diagnosis for ch 1 in off state 6.2.22 open load detection threshold voltage for ch 1 v dsol 2.00 2.80 3.20 v ? 6.2.23 output pull-down diagnosis current i dpd 50 100 150 a v ds = 13.5 v 6.2.24 open load diagnosis delay time t d 100? 200s? status signal 6.2.25 low level output voltage v out_l ??0.4v i nro =100 a 6.2.26 high level output voltage v out_h v 5dd ? 0.4 ??v i nro = ?100 a 6.2.27 status settlin g time after over current t st,set,oc ??20s 1) 6.2.28 status clear time t st,clear ??20s 1) over temperature protection 6.2.29 over temperature t ot 150 ? 200 c 1) 6.2.30 over temperature hysteresis t oth ?20?c 1) 1) not subject to production test, specified by design. 2) in off mode open load diagnosis pull down current active 3) definition see figure 8 electrical characteristics (cont?d) v s = 13.5 v, t j = -40 c to +150 c: all voltages with respect to ground. positive current flowing into pin (unless otherwise specified). pos. parameter symbol limit values unit conditions min. typ. max.
data sheet 17 rev 1.0, 2012-10-01 tle 8088 em power drivers figure 8 timing figure 9 open load detection figure 10 over current detection t t v in x v outx v batt 80 % 20 % t don t son t doff t soff 50 % v dsol open load t in1 v ds st t d t st,clear i ds_oc over current t switch-off in1 i ds st t st,set ,oc t cl_f t st,clear
data sheet 18 rev 1.0, 2012-10-01 tle 8088 em k-line 7k-line 7.1 k-line the k-line module is a serial link bus interface de vice designed to provide bi-directional half-duplex communication interfacing. it is design ed to interface between the vehicles via the special iso k-line and meets the iso norm 9141 specification. the device's k line bus driver's output is protected against bus shorts. k-line module transforms 5.0v micro-controller logic signals to battery level lo gic signals and vice versa. the over current limitation limits the current to a specified limit. in case of over-temperature on out1 the low-side switch and the output stage kio will be switch ed off and can only be re -activated if the temper ature has decreased below the minimum hysteresis value. . figure 11 k-line vs v5dd rx tx kio driver & protection
data sheet 19 rev 1.0, 2012-10-01 tle 8088 em k-line electrical characteristics: k-line table 2 electrical characteristics: k-line v s = 13.5 v, t j = -40 c to +150 c: all voltages with respect to ground. positive current flowing into pin (unless otherwise specified). pos. parameter symbol limit values unit conditions min. typ. max. output rx 7.1.1 low level output voltage v rx,l ??0.4v i rx =100 a 7.1.2 high level output voltage v rx,h v 5dd - 0.4 ??v i rx =-100 a input tx 7.1.3 input pin low level v tx,l ?1.00v? 7.1.4 input pin high level v tx,h 3.20 ? v ? 7.1.5 input pin hysteresis v tx,hys 280 500 700 mv 1) 1) not subject to production test, specified by design. 7.1.6 input pin pull up current i in_pu -70 ? -150 a vtx=0 kio input / output 7.1.7 low level output voltage v kio,l ??1.4vtx=low, r kio =480 7.1.8 current limitation i kio(lim) 40 ? 140 ma 7.1.9 output pull-down current i kio,pd 5?15atx=high kio input comparator 7.1.10 input low voltage v in_l ? ? 0.4* v s v? 7.1.11 input high voltage v in_h 0.6* v s ??v? 7.1.12 input threshold hysteresis v in_hys 0.02* v s ?0.175* v s v? transfer characteristics kio->rx and tx->kio crx=25pf; rkio=540 ; ckio<=1.3nf; vs=13.5v 7.1.13 transmission frequency kio->rx f rkio ??500khz c kio =0pf 7.1.14 transmission frequency tx->kio f tkio ??100khz? 7.1.15 off delay / rise time kio->rx t drr 0.05 ? 0.5 s c rx,load =1.6pf 2) 2) for definition see figure 12 7.1.16 off delay / rise time tx->kio t drt 0.05 ? 0.5 s c kio,load =1.6pf 1) 2) 7.1.17 on delay / fall time kio->rx t dfr 0.05 ? 0.5 s c rx,load =1.6pf 2) 7.1.18 on delay / fall time tx->kio t dft 0.05 ? 0.5 s c kio,load =1.6pf 2)
data sheet 20 rev 1.0, 2012-10-01 tle 8088 em k-line . figure 12 transfer characteristics t t v kio v rx t drr 50 % 70 % 30 % t v tx 50 % t dfr 70 % t drt 30 % t dft
engine management ic tle 8088 em application information data sheet 21 rev 1.0, 2012-10-01 8 application information note: the following information is given as a hint for the implementation of the device only and shall not be regarded as a description or warranty of a certain functionality, condition or quality of the device. figure 13 application diagram note: this is a very simplified example of an application ci rcuit. the function must be verified in the real application. 8.1 further application information ? for further information you may contact http://www.infineon.com/ (1) pins marked as not connected (nc) are internally not bonded. related pads can be used for fac ilitating the pcb routing. tle 8088 nc (1) gnd gnd kio rx out2 tx out1 in1 vs in2 agnd st wde wdi v5dd nro 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 ecu v bat 100nf 510 ? load 2.2nf 4.7nf 4.7nf 470nf to c to loads load 100f to c resi stive inductive close to ic pin nc (1) nc (1) nc (1) nc (1) nc (1) nc (1) nc (1) v bat
data sheet 22 rev 1.0, 2012-10-01 tle 8088 em package outlines 9 package outlines figure 14 pg-ssop-24 green product (rohs compliant) to meet the world-wide customer requirements for environmentally friendly products and to be compliant with government regulations, the device is available as a green product. green products are rohs-compliant (i.e pb-free finish on leads and suitable for pb-free soldering according to ipc/jedec j-std-020). 1) does not include plastic or metal protrusion of 0.15 max. per side 112 24 13 2) does not include dambar protrusion of 0.13 max. 8.65 ?.1 c 0.1 a-b 2x 0.65 0.25 2) m c 0.2 d 24x ?.05 a-b b a index marking c (1.47) 1.7 max. 0.08 c seating plane ?.1 3.9 1) 0.35 x 45? ?.25 0.64 ?.2 d 6 m 0.2 d +0 -0.1 0.1 stand off +0.06 0.19 8? max. cd 2x 0.1 bottom view 24 1 6.4 ?.25 2.65 13 12 ?.25 for further information on alternativ e packages, please vi sit our website: http://www.infineon.com/packages . dimensions in mm
data sheet 23 rev 1.0, 2012-10-01 tle 8088 em revision history 10 revision history revision date changes 1.0 2012-10-01 data sheet release
edition 2012-10-01 published by infineon technologies ag 81726 munich, germany ? 2012 infineon technologies ag all rights reserved. legal disclaimer the information given in this docu ment shall in no event be regarded as a guarantee of conditions or characteristics. with respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, infine on technologies hereby disclaims any and all warranties and liabilities of any kind, including witho ut limitation, warranties of non-infrin gement of intellectua l property rights of any third party. information for further information on technology, delivery terms and conditions and prices, please contact the nearest infineon technologies office ( www.infineon.com ). warnings due to technical requirements, components may contain dangerous substances. for information on the types in question, please contact the nearest infineon technologies office. infineon technologies compon ents may be used in life-su pport devices or systems only with the express written approval of infineon technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safe ty or effectiveness of that de vice or system. life support devices or systems are intended to be implanted in the hu man body or to support an d/or maintain and sustain and/or protect human life. if they fail, it is reasonable to assume that the health of the user or other persons may be endangered.

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