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this is information on a product in full production. october 2014 docid027128 rev 1 1/16 STL16N65M2 n-channel 650 v, 0.325 ? typ., 7.5 a mdmesh m2 power mosfet in a powerflat? 5x6 hv package datasheet ? production data figure 1. internal schematic diagram features ? extremely low gate charge ? excellent output capacitance (c oss ) profile ? 100% avalanche tested ? zener-protected applications ? switching applications description this device is an n-channel power mosfet developed using mdmesh? m2 technology. thanks to its strip layout and an improved vertical structure, the device exhibits low on-resistance and optimized switching characteristics, rendering it suitable for the most demanding high efficiency converters. am15540v2 5 6 7 8 12 34 top view d(5, 6, 7, 8) g(4) s(1, 2, 3) 1 2 3 4 powerflat? 5x6 hv order code v ds @ t jmax r ds(on) max i d STL16N65M2 710 v 0.395 ? 7.5 a table 1. device summary order codes marking package packaging STL16N65M2 16n65m2 powerflat? 5x6 hv tape and reel www.st.com
contents STL16N65M2 2/16 docid027128 rev 1 contents 1 electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3 test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 4 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 5 packaging mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 6 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 docid027128 rev 1 3/16 STL16N65M2 electrical ratings 16 1 electrical ratings table 2. absolute maximum ratings symbol parameter value unit v gs gate-source voltage 25 v i d drain current (continuous) at t c = 25 c 7.5 a i d drain current (continuous) at t c = 100 c 4.7 a i dm (1) 1. pulse width limited by safe operating area. drain current (pulsed) 30 a p tot total dissipation at t c = 25 c 56 w dv/dt (2) 2. i sd 7.5 a, di/dt 400 a/s; v ds peak < v (br)dss , v dd =400 v. peak diode recovery voltage slope 15 v/ns dv/dt (3) 3. v ds 520 v mosfet dv/dt ruggedness 50 v/ns t stg storage temperature - 55 to 150 c t j max. operating junction temperature table 3. thermal data symbol parameter value unit r thj-case thermal resistance junction-case max 2.23 c/w r thj-pcb thermal resistance junction-pcb max (1) 1. when mounted on 1 inch2 fr-4, 2 oz copper board 59 c/w table 4. avalanche characteristics symbol parameter value unit i ar avalanche current, repetitive or not repetitive (pulse width limited by t jmax ) 1.5 a e as single pulse avalanche energy (starting t j =25c, i d = i ar ; v dd =50) 115 mj electrical characteristics STL16N65M2 4/16 docid027128 rev 1 2 electrical characteristics (t c = 25 c unless otherwise specified) table 5. on /off states symbol parameter test conditions min. typ. max. unit v (br)dss drain-source breakdown voltage v gs = 0, i d = 1 ma 650 v i dss zero gate voltage drain current v gs = 0, v ds = 650 v 1 a v gs = 0, v ds = 650 v, t c =125 c 100 a i gss gate-body leakage current v ds = 0, v gs = 25 v 10 a v gs(th) gate threshold voltage v ds = v gs , i d = 250 a 2 3 4 v r ds(on) static drain-source on-resistance v gs = 10 v, i d = 3.5 a 0.325 0.395 ? table 6. dynamic symbol parameter test conditions min. typ. max. unit c iss input capacitance v gs = 0, v ds = 100 v, f = 1 mhz - 718 - pf c oss output capacitance - 32 - pf c rss reverse transfer capacitance -1.1-pf c oss eq. (1) 1. c oss eq. is defined as a constant equivalent capacitance giving the same charging time as c oss when v ds increases from 0 to 80% v dss equivalent output capacitance v gs = 0, v ds = 0 to 520 v - 189 - pf r g intrinsic gate resistance f = 1 mhz open drain - 5.2 - ? q g total gate charge v dd = 520 v, i d = 11 a, v gs = 10 v (see figure 15 ) -19.5-nc q gs gate-source charge - 4 - nc q gd gate-drain charge - 8.3 - nc docid027128 rev 1 5/16 STL16N65M2 electrical characteristics 16 table 7. switching times symbol parameter test conditions min. typ. max. unit t d(on) turn-on delay time v dd = 325 v, i d = 5.5 a, r g = 4.7 ? , v gs = 10 v (see figure 14 and 19 ) - 11.3 - ns t r rise time - 8.2 - ns t d(off) turn-off delay time - 36 - ns t f fall time - 11.3 - ns table 8. source drain diode symbol parameter test conditions min. typ. max. unit i sd source-drain current - 7.5 a i sdm (1) 1. pulse width limited by safe operating area source-drain current (pulsed) - 30 a v sd (2) 2. pulsed: pulse duration = 300 s, duty cycle 1.5% forward on voltage v gs = 0, i sd = 11 a - 1.6 v t rr reverse recovery time i sd = 11 a, di/dt = 100 a/s v dd = 60 v (see figure 16 ) -342 ns q rr reverse recovery charge - 3.5 c i rrm reverse recovery current - 20.4 a t rr reverse recovery time i sd = 11 a, di/dt = 100 a/s v dd = 60 v, t j =150 c (see figure 16 ) -458 ns q rr reverse recovery charge - 4.6 c i rrm reverse recovery current - 20.5 a electrical characteristics STL16N65M2 6/16 docid027128 rev 1 2.1 electrical characteristics (curves) figure 2. safe operating area figure 3. thermal impedance , ' 9 ' 6 9 $ 2 s h u d w l r q l q w k l v d u h d l v / l p l w h g e \ p d [ 5 ' 6 r q ? v p v p v 7 m ? & 7 f ? & 6 l q j o h s x o v h ? v * , 3 ' ) 6 5 single pulse 0.05 0.02 0.01 =0.5 0.1 0.2 k 10 t p (s) -5 10 -4 10 -3 10 10 -2 10 -1 10 -6 10 -3 10 -2 -1 10 0 zthpowerflat_5x6_19 figure 4. output characteristics figure 5. transfer characteristics , ' 9 ' 6 9 $ 9 * 6 9 9 9 9 * , 3 ' ) 6 5 , ' 9 * 6 9 $ 9 ' 6 9 * , 3 ' ) 6 5 figure 6. normalized gate threshold voltage vs. temperature figure 7. normalized v (br)dss vs. temperature v gs(th) 0.8 -75 -25 25 t j (c) (norm) 0.6 75 0.7 0.9 1.0 125 1.1 i d = 250 a gipd180920141442fsr v (br)dss 0.96 -75 -25 75 t j (c) 25 (norm) 0.88 125 0.92 1.00 1.04 1.08 i d = 1ma gipd180920141448fsr docid027128 rev 1 7/16 STL16N65M2 electrical characteristics 16 figure 8. static drain-source on-resistance figure 9. normalized on-resistance vs. temperature 5 ' 6 r q , ' $ 9 * 6 9 * , 3 ' ) 6 5 r ds(on) 1 -75 -25 75 t j (c) 25 (norm) 0.2 125 0.6 1.4 1.8 2.2 v gs = 10v gipd180920141459fsr figure 10. gate charge vs. gate-source voltage figure 11. capacitance variations 9 * 6 4 j q & |