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irf2907z irf2907zs irf2907zl www.irf.com 1 automotive mosfet hexfet ? is a registered trademark of international rectifier. descriptionspecifically designed for automotive applications, this hexfet ? power mosfet utilizes the latest processing techniques to achieve extremely lowon-resistance per silicon area. additional features of this design are a 175c junction operating temperature, fast switching speed and improved repetitive avalanche rating . these features com- bine to make this design an extremely efficient and reliable device for use in automotive applica- tions and a wide variety of other applications. features advanced process technology ultra low on-resistance 175c operating temperature fast switching repetitive avalanche allowed up to tjmax pd - 95872 d 2 pak irf2907zs to-220ab irf2907z to-262 irf2907zl hexfet ? power mosfet v dss = 75v r ds(on) = 4.5m ? i d = 75a s d g absolute maximum ratings parameter units i d @ t c = 25c continuous drain current, v gs @ 10v (silicon limited) a i d @ t c = 100c continuous drain current, v gs @ 10v (see fig. 9) i d @ t c = 25c continuous drain current, v gs @ 10v (package limited) i dm pulsed drain current p d @t c = 25c maximum power dissipation w linear derating factor w/c v gs gate-to-source voltage v e as single pulse avalanche energy (thermally limited) mj e as (tested) single pulse avalanche energy tested value i ar avalanche current a e ar repetitive avalanche energy mj t j operating junction and c t stg storage temperature range soldering temperature, for 10 seconds mounting torque, 6-32 or m3 screw thermal resistance parameter typ. max. units r jc junction-to-case CCC 0.45 c/w r cs case-to-sink, flat, greased surface 0.50 CCC r ja junction-to-ambient CCC 62 r ja junction-to-ambient (pcb mount, steady state) CCC 40 10 lbfin (1.1nm) 330 2.2 20 300 690 see fig.12a,12b,15,16 300 (1.6mm from case ) -55 to + 175 max. 170 120 680 75 downloaded from: http:///
2 www.irf.com repetitive rating; pulse width limited by max. junction temperature. (see fig. 11). limited by t jmax , starting t j = 25c, l=0.11mh, r g = 25 ? , i as = 75a, v gs =10v. part not recommended for use above this value. i sd 75a, di/dt 340a/s, v dd v (br)dss , t j 175c. pulse width 1.0ms; duty cycle 2%. c oss eff. is a fixed capacitance that gives the same charging time as c oss while v ds is rising from 0 to 80% v dss . limited by t jmax , see fig.12a, 12b, 15, 16 for typical repetitive avalanche performance. this value determined from sample failure population. 100%tested to this value in production. this is applied to d 2 pak, when mounted on 1" square pcb ( fr-4 or g-10 material ). for recommended footprint andsoldering techniques refer to application note #an-994. r is measured at s d g s d g static @ t j = 25c (unless otherwise specified) parameter min. t y p. max. units v (br)dss drain-to-source breakdown volta g e7 5C C CC C Cv ? v dss / ? t j breakdown volta g e temp. coefficient CCC 0.069 CCC v/c r ds(on) static drain-to-source on-resistance CCC 3.5 4.5 m ? v gs(th) gate threshold volta g e 2.0 CCC 4.0 v g fs forward transconductance 180 CCC CCC s i dss drain-to-source leaka g e current CCC CCC 20 a CCC CCC 250 i gss gate-to-source forward leaka g e CCC CCC 200 na gate-to-source reverse leaka g e CCC CCC -200 q g total gate char g e CCC 180 270 q gs gate-to-source char g e CCC 46 CCC nc q gd gate-to-drain ("miller") char g e CCC 65 CCC t d(on) turn-on dela y time CCC 19 CCC ns t r rise time CCC 140 CCC t d(off) turn-off dela y time CCC 97 CCC t f fall time CCC 100 CCC l d internal drain inductance CCC 5.0 CCC nh between lead, 6mm (0.25in.) l s internal source inductance CCC 13 CCC from packa g e and center of die contact c iss input capacitance CCC 7500 CCC pf c oss output capacitance CCC 970 CCC c rss reverse transfer capacitance CCC 510 CCC c oss output capacitance CCC 3640 CCC c oss output capacitance CCC 650 CCC c oss eff. effective output capacitance CCC 1020 CCC diode characteristics parameter min. t y p. max. units i s continuous source current CCC CCC 75 (body diode) a i sm pulsed source current CCC CCC 680 ( bod y diode ) v sd diode forward voltage CCC CCC 1.3 v t rr reverse recovery time C C C4 16 1n s q rr reverse recover y char g e CCC 59 89 nc t on forward turn-on time intrinsic turn-on time is negligible (turn-on is dominated by ls+ld) v ds = v gs , i d = 250a v ds = 75v, v gs = 0v v ds = 75v, v gs = 0v, t j = 125c conditions v gs = 0v, i d = 250a reference to 25c, i d = 1ma v gs = 10v, i d = 75a t j = 25c, i f = 75a, v dd = 38v di/dt = 100a/ s t j = 25c, i s = 75a, v gs = 0v showing the integral reverse p-n junction diode. v gs = 0v, v ds = 1.0v, ? = 1.0mhz v gs = 10v mosfet symbol v gs = 0v v ds = 25v v gs = 0v, v ds = 60v, ? = 1.0mhz conditions v gs = 0v, v ds = 0v to 60v ? = 1.0mhz, see fig. 5 r g = 2.5 ? i d = 75a v ds = 25v, i d = 75a v dd = 38v i d = 75a v gs = 20v v gs = -20v v ds = 60v v gs = 10v downloaded from: http:/// www.irf.com 3 fig 2. typical output characteristics fig 1. typical output characteristics fig 3. typical transfer characteristics fig 4. typical forward transconductance vs. drain current 0.1 1 10 100 v ds , drain-to-source voltage (v) 1 10 100 1000 10000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) vgs top 15v 10v 8.0v 7.0v 6.0v 5.5v 5.0v bottom 4.5v 60s pulse width tj = 25c 4.5v 0.1 1 10 100 v ds , drain-to-source voltage (v) 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) 4.5v 60s pulse width tj = 175c vgs top 15v 10v 8.0v 7.0v 6.0v 5.5v 5.0v bottom 4.5v 2 4 6 8 10 v gs , gate-to-source voltage (v) 0.1 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( ) t j = 25c t j = 175c v ds = 25v 60s pulse width 0 25 50 75 100 125 150 i d ,drain-to-source current (a) 0 50 100 150 200 g f s , f o r w a r d t r a n s c o n d u c t a n c e ( s ) t j = 25c t j = 175c v ds = 10v 380s pulse width downloaded from: http:/// 4 www.irf.com fig 8. maximum safe operating area fig 6. typical gate charge vs. gate-to-source voltage fig 5. typical capacitance vs. drain-to-source voltage fig 7. typical source-drain diode forward voltage 1 10 100 v ds , drain-to-source voltage (v) 100 1000 10000 100000 c , c a p a c i t a n c e ( p f ) v gs = 0v, f = 1 mhz c iss = c gs + c gd , c ds shorted c rss = c gd c oss = c ds + c gd c oss c rss c iss 0 50 100 150 200 q g total gate charge (nc) 0.0 2.0 4.0 6.0 8.0 10.0 12.0 v g s , g a t e - t o - s o u r c e v o l t a g e ( v ) v ds = 60v v ds = 38v v ds = 15v i d = 90a 0.0 0.5 1.0 1.5 2.0 2.5 v sd , source-to-drain voltage (v) 1 10 100 1000 i s d , r e v e r s e d r a i n c u r r e n t ( a ) t j = 25c t j = 175c v gs = 0v 1 10 100 1000 v ds , drain-to-source voltage (v) 0.1 1 10 100 1000 10000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) 1msec 10msec operation in this area limited by r ds (on) 100sec tc = 25c tj = 175c single pulse downloaded from: http:/// www.irf.com 5 fig 11. maximum effective transient thermal impedance, junction-to-case fig 9. maximum drain current vs. case temperature fig 10. normalized on-resistance vs. temperature -60 -40 -20 0 20 40 60 80 100 120 140 160 180 t j , junction temperature (c) 0.5 1.0 1.5 2.0 2.5 r d s ( o n ) , d r a i n - t o - s o u r c e o n r e s i s t a n c e ( n o r m a l i z e d ) i d = 90a v gs = 10v 25 50 75 100 125 150 175 t c , case temperature (c) 0 20 40 60 80 100 120 140 160 180 i d , d r a i n c u r r e n t ( a ) limited by package 1e-006 1e-005 0.0001 0.001 0.01 0.1 1 t 1 , rectangular pulse duration (sec) 0.0001 0.001 0.01 0.1 1 t h e r m a l r e s p o n s e ( z t h j c ) 0.20 0.10 d = 0.50 0.02 0.01 0.05 single pulse ( thermal response ) notes: 1. duty factor d = t1/t2 2. peak tj = p dm x zthjc + tc ri (c/w) i (sec) 0.251 0.0004570.199 0.003019 j j 1 1 2 2 r 1 r 1 r 2 r 2 c ci i / ri ci= i / ri downloaded from: http:/// 6 www.irf.com q g q gs q gd v g charge fig 13b. gate charge test circuit fig 13a. basic gate charge waveform fig 12c. maximum avalanche energy vs. drain current fig 12b. unclamped inductive waveforms fig 12a. unclamped inductive test circuit t p v (br)dss i as fig 14. threshold voltage vs. temperature r g i as 0.01 ? t p d.u.t l v ds + - v dd driver a 15v 20v v gs 1k vcc dut 0 l -75 -50 -25 0 25 50 75 100 125 150 175 200 t j , temperature ( c ) 1.0 1.5 2.0 2.5 3.0 3.5 4.0 v g s ( t h ) g a t e t h r e s h o l d v o l t a g e ( v ) i d = 250a 25 50 75 100 125 150 175 starting t j , junction temperature (c) 0 200 400 600 800 1000 1200 e a s , s i n g l e p u l s e a v a l a n c h e e n e r g y ( m j ) i d top 10a 14a bottom 75a downloaded from: http:/// www.irf.com 7 fig 15. typical avalanche current vs.pulsewidth fig 16. maximum avalanche energy vs. temperature notes on repetitive avalanche curves , figures 15, 16:(for further info, see an-1005 at www.irf.com) 1. avalanche failures assumption: purely a thermal phenomenon and failure occurs at a temperature far in excess of t jmax . this is validated for every part type.2. safe operation in avalanche is allowed as long ast jmax is not exceeded. 3. equation below based on circuit and waveforms shown in figures 12a, 12b. 4. p d (ave) = average power dissipation per single avalanche pulse.5. bv = rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. i av = allowable avalanche current. 7. ? t = allowable rise in junction temperature, not to exceed t jmax (assumed as 25c in figure 15, 16). t av = average time in avalanche. d = duty cycle in avalanche = t av f z thjc (d, t av ) = transient thermal resistance, see figure 11) p d (ave) = 1/2 ( 1.3bvi av ) = t/ z thjc i av = 2 t/ [1.3bvz th ] e as (ar) = p d (ave) t av 1.0e-05 1.0e-04 1.0e-03 1.0e-02 1.0e-01 tav (sec) 1 10 100 a v a l a n c h e c u r r e n t ( a ) 0.05 duty cycle = single pulse 0.10 allowed avalanche current vs avalanche pulsewidth, tav assuming ? tj = 25c due to avalanche losses 0.01 25 50 75 100 125 150 175 starting t j , junction temperature (c) 0 50 100 150 200 250 300 350 e a r , a v a l a n c h e e n e r g y ( m j ) top single pulse bottom 1% duty cycle i d = 75a downloaded from: http:/// 8 www.irf.com fig 17. for n-channel hexfet power mosfets ? ? ? p.w. period di/dt diode recovery dv/dt ripple 5% body diode forward drop re-appliedvoltage reverserecovery current body diode forward current v gs =10v v dd i sd driver gate drive d.u.t. i sd waveform d.u.t. v ds waveform inductor curent d = p. w . period + - + + + - - - ? ? !"!! ? # $$ ? !"!!%" v ds 90%10% v gs t d(on) t r t d(off) t f &' 1 ( # 0.1 % + - fig 18a. switching time test circuit fig 18b. switching time waveforms downloaded from: http:/// www.irf.com 9 dimensions are shown in millimeters (inches) lead assignments 1 - gate 2 - drain 3 - source 4 - drain - b - 1.32 (.052) 1.22 (.048) 3x 0.55 (.022) 0.46 (.018) 2.92 (.115) 2.64 (.104) 4.69 (.185) 4.20 (.165) 3x 0.93 (.037) 0.69 (.027) 4.06 (.160) 3.55 (.140) 1.15 (.045) min 6.47 (.255) 6.10 (.240) 3.78 (.149) 3.54 (.139) - a - 10.54 (.415) 10.29 (.405) 2.87 (.113) 2.62 (.103) 15.24 (.600) 14.84 (.584) 14.09 (.555) 13.47 (.530) 3x 1.40 (.055) 1.15 (.045) 2.54 (.100) 2x 0.36 (.014) m b a m 4 1 2 3 notes: 1 dimensioning & tolerancing per ansi y14.5m, 1982. 3 outline conforms to jedec outline to-220ab. 2 controlling dimension : inch 4 heatsink & lead measurements do n ot include burrs. hexfet 1- gate 2- drain 3- source 4- drain lead assignments igbts, copack 1- gate 2- collector 3- emitter 4- collector |