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wideband, unity - gain stable, fast settling op amp data sheet ad841 rev. c document feedback information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to chang e without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062 - 9106, u.s.a. tel: 781.329.4700 ? 2013 analog devices, inc. all rights reserved. technical support www.analog.com features ac p erformance unity - g ain bandwidth : 40 mhz fast settling time : 110 ns to 0.01% slew rate : 300 v/ s full power bandwidth : 4.7 mhz for 20 v p - p into a 500 l oad dc performance input offset voltage : 1 mv max imum input voltage noise : 1 5 nv/ hz typ ical open - loop gain : 45 v/mv into a 1 k l oad output current : 50 ma min imum supply current : 12 ma max imum applications high speed signal conditioning video and pulse amplifiers data acquisition systems line drivers active filters available in 14 - pin plastic p dip , 14- pin hermetic cerdip , and 20- p in lcc p ackages chips and mil - std - 883b parts available connection diagram s figure 1. p dip (n - 14 ) package and cerdip (q - 14 ) package figure 2. lcc (e - 20 - 1 ) package general description the ad841 is a member of the analog devices , inc., family of wide bandwidth operational amplifiers. this high speed/high precision family includes the ad842 , which is stable at a gain of two or greater and has 100 ma minimum output current drive. these devic es are fabricated using analog devices junction isolated complementary bipolar (cb) process. this process permits a combination of dc precision and wideba nd ac perfor - mance previously unobtainable in a monolithic op amp. in addition to its 40 mhz unity - gain bandwidth product, the ad841 offers extremely fast settling characteristics, typically settlin g to within 0.01% of final value in 110 ns for a 10 v step. unlike many high frequency amplifiers, the ad841 requires no external compensation. it remains stable over its full operating temperature range. it also offers a low quiescent current of 12 ma maximum, a minimum output current drive capability of 50 ma, a low input voltage noise of 1 5 nv/ hz , and low input offset voltage of 1 mv maximum. the 300 v/ s slew rate of the ad841 , along with its 40 mhz gain bandwidth, ensures excellent performance in video and pulse amplifier applications. this amplifier is well suited for use in high frequency signal conditioning circuits and wide bandwidth active filters. the extremely rapid settling time of the ad841 makes it the preferred choice for data acquisition applications that require 12 - bit accuracy. the ad841 is also appropriate for other applications such as high speed dac and adc buffer amplifiers and other wide bandwidth circuitry. product highlights 1. the high slew rate and fast settling time of the ad841 make it ideal for dac and adc buffers, and all types of video instrumentation circuitry. 2. the ad841 is a precision amplifier. it offers a ccuracy to 0.01% or better and wide bandwidth performance previously available only in hybrids. 3. the ad841 s thermally balanced layout and the speed of the c b process allow the ad841 to settle to 0.01% in 110 ns without the long tails that occur with other fast op amps. 4. laser wafer trimming reduces the input offset voltage to 1 mv max imum on the k grade, thus eliminating the need for external o ffset nulling in many applications. offset null pins are provided for additional versatility. notes 1. nc = no connect. nc 1 nc 2 balance 3 ?input 4 nc 14 nc 13 balance 12 +v s 11 +input 5 output 10 ?v s 6 nc 9 nc 7 nc 8 ad841 top view (not to scale) 1 1340-001 notes 1. nc = no connect. ad841 4 nc 5 ?input 6 nc 7 +input 8 nc 18 nc 17 +v s 16 nc 15 output 14 nc 19 nc 20 offset null 1 nc 2 offset null 3 nc 13 nc 12 nc 11 nc 10 ?v s 9 nc 1 1340-002
ad841* product page quick links last content update: 02/23/2017 comparable parts view a parametric search of comparable parts. documentation application notes ? an-402: replacing output clamping op amps with input clamping amps ? an-417: fast rail-to-rail operational amplifiers ease design constraints in low voltage high speed systems ? an-581: biasing and decoupling op amps in single supply applications data sheet ? ad841: military data sheet ? ad841: wideband, unity-gain stable, fast settling op amp data sheet tools and simulations ? power dissipation vs die temp ? vrms/dbm/dbu/dbv calculators reference materials tutorials ? mt-032: ideal voltage feedback (vfb) op amp ? mt-033: voltage feedback op amp gain and bandwidth ? mt-047: op amp noise ? mt-048: op amp noise relationships: 1/f noise, rms noise, and equivalent noise bandwidth ? mt-049: op amp total output noise calculations for single-pole system ? mt-050: op amp total output noise calculations for second-order system ? mt-052: op amp noise figure: don't be misled ? mt-053: op amp distortion: hd, thd, thd + n, imd, sfdr, mtpr ? mt-056: high speed voltage feedback op amps ? mt-058: effects of feedback capacitance on vfb and cfb op amps ? mt-059: compensating for the effects of input capacitance on vfb and cfb op amps used in current-to- voltage converters ? mt-060: choosing between voltage feedback and current feedback op amps design resources ? ad841 material declaration ? pcn-pdn information ? quality and reliability ? symbols and footprints discussions view all ad841 engineerzone discussions. sample and buy visit the product page to see pricing options. technical support submit a technical question or find your regional support number. document feedback submit feedback for this data sheet. this page is dynamically generated by analog devices, inc., and inserted into this data sheet. a dynamic change to the content on this page will not trigger a change to either the revision number or the content of the product data sheet. this dynamic page may be frequently modified.
ad841 data sheet rev. c | page 2 of 16 table of contents features .............................................................................................. 1 applications ....................................................................................... 1 connection diagrams ...................................................................... 1 general de scription ......................................................................... 1 product highlights ........................................................................... 1 revision history ............................................................................... 2 specificatio ns ..................................................................................... 3 absolute maximum ratings ............................................................ 5 thermal characteristics .............................................................. 5 esd caution .................................................................................. 5 typical performance characteristics ............................................. 6 theory of operation ...................................................................... 10 offset nulling ............................................................................. 10 input considerations ................................................................. 10 ad841 se ttling time ................................................................. 10 grounding and bypassing ......................................................... 11 capacitive load driving ability ............................................... 11 terminated line driver ............................................................. 12 overdr ive recovery ................................................................... 1 2 outline dimensions ....................................................................... 13 ordering guide .......................................................................... 14 revision history 2 /13 rev. b to rev. c removed to - 8 package ..................................................... universal changed input voltage noise 13 nv/hz to 15 nv/hz and changes to general description section ...................................... 1 changes to endnote 1, table 1 ........................................................ 4 added operating temperature range, table 2 ............................ 5 deleted using a heat sink section ............................................... 1 1 updated outline dimensions ....................................................... 13 added ordering guide .................................................................. 1 4 11/ 88 rev. a to rev. b
data sheet ad841 rev. c | page 3 of 16 specifications t a = 25 c and 15 v dc, unless otherwise noted . all min imum and max imum specifications are guaranteed . table 1 . parameter test conditions/ comments ad841j ad841k ad841s 1 unit min typ max min typ max min typ max inpu t offset voltage 2 0.8 2.0 0.5 1.0 0.5 2.0 mv t min ? t max 5.0 3.3 5.5 mv offset drift 35 35 35 v/ c input bias current 3.5 8 3.5 5 3.5 8 a t min C t max 10 6 12 a input offset current 0.1 0.4 0.1 0.2 0.1 0.4 a t min ? t max 0.5 0.3 0.6 a input characteristics differential m ode input resi stance 200 200 200 k input capacitance 2 2 2 pf input voltage range common mod e 10 12 10 12 10 12 v common - mode rejection v cm = 10 v 86 100 103 109 86 110 db t min C t max 80 100 80 db input voltage noise f = 1 khz 15 15 15 nv/ hz wideband n oise 10 hz to 10 mhz 47 47 47 v rms open - loop gain v o ut = 10 v r load 5 00 25 45 25 45 25 45 v/mv t min ? t max 12 20 12 v/mv output characteristics voltage r l oad 500 t min ? t max 10 10 10 v current v out = 10 v 50 50 50 ma output resistance open l oop 5 5 5 frequency response unity gain bandwidth v ou t = 90 mv p - p 40 40 40 mhz full power bandwidth 3 v o ut = 20 v p -p r load 500 3.1 4.7 3.1 4.7 3.1 4.7 mhz rise time 4 a v = ? 1 10 10 10 ns overshoot 4 a v = ? 1 10 10 10 % slew rate 4 a v = ? 1 200 300 200 300 200 300 v/ s settling time 10 v step a v = ? 1 to 0.1% 90 00 90 ns to 0.01% 110 110 110 ns overdrive recovery ? overdrive 200 200 200 ns +over drive 700 700 700 ns differential gain f = 4.4 mhz 0.03 0.03 0.03 % differenti al phase f = 4.4 mhz 0.022 0.022 0.022 degree power supply rated perf ormance 15 15 15 v operating range 5 18 5 18 5 18 v quiescent current 11 12 11 12 11 12 ma t min ? t max 14 14 16 ma power supply rejection ratio v s = 5 v to 18 v 86 100 90 100 86 100 db t min ? t max 80 86 80 db
ad841 data sheet rev. c | page 4 of 16 parameter test conditions/ comments ad841j ad841k ad841s 1 unit min typ max min typ max min typ max temperature range rated performance 5 0 7 0 0 7 0 ? 55 +125 c 1 standard military drawing available : 5962 - 89641012a C (se /883b). 2 input offset voltage specifications are guaranteed after 5 minutes at t a = 25c. 3 full power bandwidth = slew rate/2 v peak . 4 refer to figure 22 to figure 24. 5 s grade t min C t max specifications are tested with automatic test equipment at t a = ?55c and t a = +125c.
data sheet ad841 rev. c | page 5 of 16 absolute maximum ratings table 2. parameter rating supply voltage (v s ) 18 v internal power dissipation 1 pdip (n-14) 1.5 w cerdip (q-14) 1.3 w input voltage v s differential input voltage 6 v storage temperature range q-14 ?65c to +150c n-14 ?65c to +125c operating temperature range ad841j/ad841k 0c to 70c ad841s ?55c to +125c junction temperature +175c lead temperature range (soldering 60 sec) +300c 1 maximum internal power dissipation is specified so that t j does not exceed 175 c at an ambient temperature of 25c. stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. thermal characteristics table 3. package type jc ja sa unit 14-lead cerdip 35 110 38 c/w 14-lead pdip 30 100 c/w 20-lead lcc 35 150 c/w esd caution figure 3. metalization photograph contact factory for latest dimensions dimensions shown in inches and (millimeters) balance output +v s ?v s ?v in +v in balance 0 .067 (1.7) 0.099 (2.5) substrate connected to +v s 11340-003
ad841 data sheet rev. c | page 6 of 16 typical performance characteristics t a = 25c and v s = 15 v, unless otherwise noted . figure 4. input common - mode range vs. supply voltage figure 5. output voltage swing vs. supply voltage figure 6. output voltage swing vs. load resistance figure 7. quiescent current vs. supply voltage figure 8. input bias current vs. temperature figure 9. output impedance vs. frequency 20 v in 0 5 10 15 0 5 10 15 20 input common-mode range (v) supply voltage (v) 1 1340-004 20 v out 0 5 10 15 0 5 10 15 20 output voltage swing (v) supply voltage (v) 1 1340-005 30 25 20 0 5 10 15 10 100 1k 10k output voltage swing (v p-p) load resistance () 15v supplies 1 1340-006 12 4 6 8 10 0 5 10 15 20 quiescent current (ma) supply voltage (v) 1 1340-007 6 3 4 5 ?60 ?40 ?20 0 20 40 60 80 100 120 140 input bias current (a) temperature (c) 1 1340-008 100 0.01 0.1 1 10 10k 100k 10m 1m 100m output impedance () frequency (hz) 1 1340-009
data sheet ad841 rev. c | page 7 of 16 figure 10 . quiescent current vs. temperature figure 11 . short - circuit current limit vs. temperature figure 12 . gain bandwidth product vs. temperature figure 13 . open - loop gain and phase margin vs. frequency figure 14 . open - loop gain vs. supply voltage figure 15 . power supply rejection vs. frequency 15 14 13 12 11 10 9 8 7 ?60 ?40 ?20 0 20 40 60 80 100 120 140 quiescent current (ma) temperature (c) 1 1340-010 140 130 120 110 100 90 80 70 60 ?60 ?40 ?20 0 20 40 60 80 100 120 140 short-circuit current limit (ma) temperature (c) +output current ?output current 1 1340-0 1 1 50 45 40 35 30 ?60 ?40 ?20 0 20 40 60 80 100 120 140 gain bandwidth (mhz) temperature (c) 1 1340-012 100 80 60 40 20 0 ?20 100 80 60 40 20 0 ?20 100 100m 10m 1m 100k 10k 1k open-loop gain (db) phase margin (degrees) frequency (hz) 500 load 1 1340-013 98 90 92 94 96 0 5 10 15 20 open-loop gain (db) supply voltage (v) 500 load 1 1340-014 120 100 80 60 40 20 0 100 100m 10m 1m 100k 10k 1k power supply rejection (db) frequency (hz) +supply ?supply 1 1340-015
ad841 data sheet rev. c | page 8 of 16 figure 16 . common - mode rejection vs. frequency figure 17 . large signal frequency response figure 18 . output swing and error vs. settling time figure 19 . harmonic distortion vs. frequency figure 20 . slew rate vs. temperature figure 21 . input voltage noise spectral density 120 100 80 60 40 20 1k 100m 10m 1m 100k 10k common-mode rejection (db) frequency (hz) v s = 15v v cm = 1v p-p t a = 25c 1 1340-016 30 25 20 15 10 5 0 1m 100m 10m output voltage (v p-p) frequency (hz) v s = 15v r l = 1k t a = 25c 1 1340-017 10 ?10 ?8 ?6 ?4 ?2 0 2 4 6 8 30 110 70 40 80 50 90 60 100 output swing from 0 to v settling time (ns) 0.01% 0.1% 0.01% 0.1% 1 1340-018 ?70 ?80 ?90 ?100 ?110 ?120 ?130 100 1k 10k 100k harmonic distortion (db) frequency (hz) 3v rms r l = 1k second harmonic third harmonic 1 1340-019 500 200 300 400 450 250 350 ?60 ?40 ?20 0 20 40 60 80 100 120 140 slew rate (v/s) temperature (c) 1 1340-020 30 25 20 15 10 5 10 100 10m 1m 100k 10k 1k input voltage (nv/ hz) frequency (hz) 1 1340-021
data sheet ad841 rev. c | page 9 of 16 figure 22 . inverting amplifier configuration ( p dip pinout) figure 23 . inverter large signal pulse response figure 24 . inverter small signal pulse response figure 25 . unity - gain buffer amplifier configuration ( p dip pinout) figure 26 . buffer large signal pulse response figure 27 . buffer small signal pulse response 11 6 4 5 10 ? + ad841 +v s ?v s 2.2f 0.1f 2.2f 0.1f v out 499? 49.9? r b 499? r f 1k? r in 1k? hp3314a function generator or equivalent 1 1340-022 100 90 10 0% 2v 50ns 1 1340-023 100 90 10 0% 50mv 50ns 1 1340-024 49.9? r in 100? hp3314a function generator or equivalent v in 11 6 4 5 10 ? + ad841 +v s ?v s 2.2f 0.1f 2.2f 0.1f v out 499? r b 120? 1 1340-025 100 90 10 0% 2v 50ns 1 1340-026 100 90 10 0% 50mv 50ns 1 1340-027
ad841 data sheet rev. c | page 10 of 16 theory of operation offset nulling the input offset voltage of the ad841 is very low for a high speed op amp, but if additional nulling is required, the circuit shown in figure 28 can be used. figure 28 . offset nulling ( p dip pinout) input considerations an input resistor (r in in figure 25 ) is recommended in circuits where the input to the ad841 is subjected to transient or continuous o verload voltages exceeding the 6 v maximum differential limit. this resistor provides protection for the input transistors by limiting the maximum current that can be forced into the input. for high performance circuits it is recommended that a resistor (r b in figure 22 and figure 25 ) be used to reduce bias current errors by matching the impedance at each input. t he output voltage error caused by the offset current is more than an order of magnitude less than the error present if the bias current error is not removed. ad841 settling time figure 29 and figure 31 show the settling performance of the ad841 in the test circuit shown in figure 30. settling time is defined as t he interval of time from the applic ation of an ideal step function input until the closed - loop amplifier output has entered and remains within a specified error band. this definition encompasses the major components, which comprise settling time. they include ? propagation delay through the amplifier ? slewing time to approach the final output value ? the time of recovery from the overload associated with slewing ? linear settling to within the specified error band expressed in these terms, the measurement of settling time is obviously a challeng e and needs to be done accurately to assure the user that the amplifier is worth consideration for the application. figure 29 . ad841 0.01% settling time figure 30 . settling time test circuit measurement of the 0.01% settling in 110 ns was accomplished by amplifying the error signal from a false summing junction with a very high speed proprietary hybrid error amplifier specially designed t o enable testing of small settling errors. the devic e under test was driving a 500 load. the input to the error amp is clamped to avoid possible problems associated with the overdrive recovery of the oscilloscope input amplifier. the error amp gains the error from the false summing junction by 10, and it contains a gain vernier to fine trim the gain. 11 12 3 4 5 10 ? + ad841 +v s 6 ?v s 2.2f 0.1f r l input output ? ? 1 1340-028 100 90 10 0% 10mv 5v 20ns output error: 0.02%/div output: 5v/div 1 1340-029 ddd5109 flat-top pulse generator 11 6 4 5 10 ? + ad841 +15v ?15v 2.2f 0.1f 2.2f 0.1f ? ? ? n? n? n? n? error amp (10) tek 7a13 tek 7603 oscilloscope tek 7a18 hp6263 fet probe tek p6201 1 1340-030
data sheet ad841 rev. c | page 11 of 16 figure 31 shows the long - term stability of the settling charac - te ristics of the ad841 output after a 10 v step. there is no evidence of settling tails after the initial transient recovery time. the use of a junction isolated process, together with careful layout, avoids these problems by minimizing the effects of transistor isolation capacitance discharge and thermally induced shifts in circuit operating points. these problems do not occur even under high output current cond itions. figure 31 . ad841 settling demonstrating no settling tails grounding and bypass ing in designing practical circuits with the ad841 , the user must remember that whenever high frequencies are involved, some special precautions are in order. circuits must be built with short interconnect leads. large ground planes should be us ed whenever possible to provide a low resistance, low inductance circuit path, as well as minimizing the effects of high frequency coupling. avoid s ockets because the increased interlead capacitance can degrade bandwidth. feedback resistors should be of lo w enough value to assure that the time constant formed with the circuit capacitances will not limit the amplifier performance. resistor values of less than 5 k are recommended. if a larger resistor must be used, a small (<10 pf) feedback capacitor in para llel with the feed - back resistor, r f , may be used to compensate for these stray capacitances and optimize the dynamic performance of the amplifier in the particular application. bypass p ower supply leads to ground as close as possible to the amplifier pi ns. a 2.2 f capacitor in parallel with a 0.1 f ceramic disk capacitor is recommended. capacitive load driv ing ability like all wideband amplifiers, the ad841 is sensitive to capaci - tive loading. the ad841 is designed to drive capacitive loads of up to 20 pf without degradation of its rated performance. capacitive loads of greater than 20 pf will decrease the dynamic performance of the part although instability should not occur unless the load exceeds 100 pf (for a unity - gain follower). a resistor in series with the output can be used to decouple larger capacitive loads. figure 32 shows a typical configuration for driving a large capacitive load. the 51 output resistor effectively isolates the high frequency feedback from the load and stabilizes the circuit. low frequency feedback is returned to the am plifier summing junction via the low - pass filter formed by the 51 resistor and the load capacitance, c l . figure 32 . circuit for driving a large capacitive load 100 90 10 0% 500ns output error: 0.02%/div output: 5v/div 1 1340-031 11 6 4 5 10 ? + ad841 +v s ?v s 2.2f 0.1f 2.2f 0.1f 499? 1k? 15pf 1k? input 51? c l r l v out 1 1340-032
ad841 data sheet rev. c | page 12 of 16 terminated line driv er the ad841 functions very well as a high speed line driver of either terminated or unterminated cables. figure 33 shows the ad841 driving a doubly terminated cable in a follower config - uration. the ad841 maint ains a typical slew rate of 300 v/ s, which means it can drive a 10 v, 4.7 mhz signal or a 3 v, 15.9 mhz signal. the termination resistor, r t , (when equal to the characteristic impedance of the cable) minimizes reflections from the far end of the cable. a back - termination resistor , r bt , ( also equal to the char acteristic impedance of the cable) may be placed between the ad841 output and the cable to damp any stray signals caused by a mismatch between r t and the cables characteristic impedance. this resul t s in a cleaner signal, but because half the output voltage is dropped across r bt , the op amp must supply double the output signal required if there is no back termina - tion. therefore , the full power bandwidth is cut in half. if termination is not used, ca bles appear as capacitive loads. if this capacitive load is large, it should be decoupled from the ad841 by a resistor in series with the output (see figure 32). figure 33 . line driver configuration overdrive recovery figure 34 shows t he overdrive recovery capability of the ad841 . typical recovery time is 200 ns from negative overdrive and 700 ns from positive overdrive. figure 34 . overdrive recovery figure 35 . overdrive recovery test circuit 11 6 4 5 10 ? + ad841 +v s ?v s 2.2f 0.1f 2.2f 0.1f termination resistor for input signal r b 100? v in r bt (optional) r t v out 50? or 75? cable r t = r bt = cable characteristic impedance 1 1340-033 100 90 10 0% 10v 200ns 1v overdriven output: 10v/div input square wave: 1v/div 1 1340-034 11 6 4 5 10 ? + ad841 +v s ?v s 2.2f 0.1f 2.2f 0.1f output 1k? 50? hp3314a pulse generator or equivalent 1s 1v square wave input 1 1340-035
data sheet ad841 rev. c | page 13 of 16 outline dimensions figure 36 . 14 - lead pla stic dual in - line package [pdip] narrow body (n - 14) dimensions shown in inches and (millimeters) figure 37 . 14 - lead ceramic dual in - line package [cerdip] (q - 14) dimensions shown in inches and ( millimeters) compliant t o jedec s t andards ms-001 controlling dimensions are in inches; millimeter dimensions (in p arentheses) are rounded-off inch equi v alents for reference on l y and are not appropri a te for use in design. corner leads m a y be configured as whole or half leads. 070606- a 0.022 (0.56) 0.018 (0.46) 0.014 (0.36) 0.150 (3.81) 0.130 (3.30) 0. 1 10 (2.79) 0.070 (1.78) 0.050 (1.27) 0.045 (1.14) 14 1 7 8 0.100 (2.54) bsc 0.775 (19.69) 0.750 (19.05) 0.735 (18.67) 0.060 (1.52) max 0.430 (10.92) max 0.014 (0.36) 0.010 (0.25) 0.008 (0.20) 0.325 (8.26) 0.310 (7.87) 0.300 (7.62) 0.015 (0.38) gauge plane 0.210 (5.33) max se a ting plane 0.015 (0.38) min 0.005 (0.13) min 0.280 (7. 1 1) 0.250 (6.35) 0.240 (6.10) 0.195 (4.95) 0.130 (3.30) 0. 1 15 (2.92) controlling dimensions are in inches; millimeter dimensions (in parentheses) are rounded-off inch equivalents for reference only and are not appropriate for use in design. 0.310 (7.87) 0.220 (5.59) 0.005 (0.13) min 0.098 (2.49) max 0.100 (2.54) bsc 15 0 0.320 (8.13) 0.290 (7.37) 0.015 (0.38) 0.008 (0.20) seating plane 0.200 (5.08) max 0.785 (19.94) max 0.150 (3.81) min 0.200 (5.08) 0.125 (3.18) 0.023 (0.58) 0.014 (0.36) 0.070 (1.78) 0.030 (0.76) 0.060 (1.52) 0.015 (0.38) pin 1 1 7 8 14
ad841 data sheet rev. c | page 14 of 16 figure 38 . 20 - terminal ceramic leadless chip carrier [lcc] (e - 20 - 1) dim ensions shown in inches and (millimeters) ordering guide model 1 temperature range package description package option ad841jnz 0c to +70 c 14- lead plastic dual in - line package [pdip] n -14 AD841KNZ 0c to +70 c 14- lead plastic dual in - line package [pdip] n -14 ad841jchips die ad841schips die ad841se ? 55c to +125c 20- terminal ceramic leadless chip carrier [lcc] e -20-1 ad841se/883b ? 55c to +125c 20- terminal ceramic leadless chip carrier [lcc] e -20-1 ad841sq ? 55c to +125c 14- lead ceramic dual in - line package [cerdip] q -14 ad841sq/883b ? 55c to +125c 14- lead ceramic dual in - line package [cerdip] q -14 1 z = rohs compliant part. controlling dimensions are in inches; millimeter dimensions (in p arentheses) are rounded-off inch equi v alents for reference on l y and are not appropri a te for use in design. 1 20 4 9 8 13 19 14 3 18 bot t om view 0.028 (0.71) 0.022 (0.56) 45 ty p 0.015 (0.38) min 0.055 (1.40) 0.045 (1.14) 0.050 (1.27) bsc 0.075 (1.91) ref 0.0 1 1 (0.28) 0.007 (0.18) r ty p 0.095 (2.41) 0.075 (1.90) 0.100 (2.54) ref 0.200 (5.08) ref 0.150 (3.81) bsc 0.075 (1.91) ref 0.358 (9.09) 0.342 (8.69) sq 0.358 (9.09) max sq 0.100 (2.54) 0.064 (1.63) 0.088 (2.24) 0.054 (1.37) 022106- a
data sheet ad841 rev. c | page 15 of 16 notes
ad841 data sheet rev. c | page 16 of 16 notes ?2013 analog devices, inc. all rights reserved. trademarks and registered trademarks are the prop erty of their respective owners. d11340-0-2/13(c)

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