november 2004 revision 1 1/8 operating from v cc = 2.5v to 5.5v zero pop&clickless circuit 1.w output power @ vcc=5v, thd=1%, f=1khz, with 8 ? load ultra low consumption in standby mode (2a max.) 85db psrr @ 217hz 16 digital volume control steps two up and down volume control discrete pins gain range from -33db to + 12db integrated debouncing system ultra fast start up time: 15ms typ. dfn10 3x3 mm pitch 0.5 description at 3.3v, the ts4974 is a dual power audio amplifier capable of delivering 380mw of continuous rms ouput power into a 8 ? bridged- tied loads with 1% thd+n. an external standby mode control reduces the supply current to less than 2a. an internal over-temperature shutdown protection is provided. the ts4974 has been designed for high quality audio applications such as mobile phones and for minimizing the number of external components. the ts4974 features a 16 step digital volume control through two discrete control up and down pins. the start-up gain is internally fixed to -12db. an integrated debounce system prevents voltage pikes on up/down pins during volume control mode to be taken into account during a debounce time of 10ms (typ.). pin connections (top view) applications mobile phones (cellular / cordless) pdas laptop/notebook computers portable audio devices order codes ts4974iq - pinout ts4974iq dfn package 1 2 3 4 10 bypass vin- up / dvc vcc standby 5 9 8 7 6 down / dvc gnd vin+ vout- vout+ 1 2 3 4 10 bypass vin- up / dvc vcc standby standby 5 9 8 7 6 down / dvc gnd vin+ vout- vout+ part number temperature range package packaging marking TS4974IQT -40, +85c qfn tape & reel tba product preview ts4974 this is preliminary information on a new product now in development. details are subject to change without notice. 1w differential audio power amplifier with up/down digital volume control pins
ts4974 absolute maximum ratings 2/8 1 absolute maximum ratings table 2: operating conditions table 1: key parameters and their absolute maximum ratings symbol parameter value unit vcc supply voltage 1 1) all voltages values are measured with respect to the ground pin. 6v v i input voltage 2 2) the magnitude of input signal must never exceed v cc + 0.3v / g nd - 0.3v. g nd to v cc v t oper operating free air temperature range -40 to + 85 c t stg storage temperature -65 to +150 c t j maximum junction temperature 150 c r thja thermal resistance junction to ambient 3 3) device is protected in case of over temperature by a thermal shutdown active @ 150 c. 200 c/w pd power dissipation internally limited 4 4) exceeding the power derating curves during a long period, may involve abnormal operating condition. esd human body model 5 5) human body model, 100pf discharged through a 1.5kohm resistor, into pin to vcc device. 2kv esd machine model ( min value ) 200 v latch-up latch-up immunity 200 ma lead temperature (soldering, 10sec) 260 c symbol parameter value unit vcc supply voltage 2.5 to 5.5 v vstb standby voltage input : device on device off 1.5 v stb v cc gnd v stb 0.4 v vu/d volume control up/down voltage input: up/down mode on up/down mode off 0 v u/d 30% of v cc 40% of v cc v u/d v cc v rl load resistor 8 ? tsd thermal shutdown temperature 150 c r thja thermal resistance junction to ambient 1 80 c/w 1) with heat sink surface = 125mm 2 .
application information ts4974 3/8 1 application information operation mode the ts4974 is a fully differential power amplifier which enables better performances in terms of noise immunity and psrr. the ts4974 features a digital volume control with an internal gain range from -33db up to +12db, by steps of 3db. when the device is firstly biased, an initial gain of -12db is internally fixed. when standby mode is activated, the gain value is memorized and held until standby is released. the volume is controlled by means of two pins up and down on which the application of a vil voltage will activate the increase or decrease in gain. the ts4974 integrates a debouncing system which does not allow to take into account up or down pulse shorter than t debounce time. moreover an autorepeat function is implemented. when a continuous voltage is applied on up or down pin, the gain is continuously increased or decreased after a certain time called t autorepeat . the first period of each autorepeat sequence is longer ( x1.5t auto ) to avoid any parasitic activation. in this operational mode, t range time is necessary to cover the whole gain range of the device. figure 1: typical application schematics bias digital volume control gnd vcc up down 8 ? ts4974 cb 1f + 330nf + + 330nf out1 stby stdby bypass out2 differential input stage vin+ vin- cs + 1f bias digital volume control digital volume control gnd vcc up down 8 ? ts4974 cb 1f + 330nf + + 330nf out1 stby stdby bypass out2 differential input stage vin+ vin- cs + 1f cs + 1f
ts4974 electrical characteristics 4/8 2 electrical characteristics table 3: v cc = +5v, gnd = 0v, t amb = 25c (unless otherwise specified) symbol parameter min. typ. max. unit i cc supply current no input signal, no load 3.2 ma i standby standby current no input signal, vstdby = gnd, rl = 8 ? 300 2000 na voo output offset voltage no input signal, rl = 8 ?, floating inputs 520mv po output power thd = 1% max, f = 1khz, rl = 8 ? 0.8 1 w thd + n total harmonic distortion + noise po = 500mw rms, 20hz < f < 20khz, rl = 8 ?, 0db gain, cb=1f, cin=330nf 0.5 % psrr power supply rejection ratio 1 f = 217hz, rl = 8 ?, ) vripple = 200mvpp, input grounded, cb=1f, cin=330nf 1) dynamic measurements - 20*log(rms(vout)/rms(vripple)). vripple is an added sinus signal to vcc @ f = 217hz. 75 85 db cmrr common mode rejection ratio 2 f = 217hz, rl = 8 ?, vincm = 200mvpp, cb = 1f, cin=330nf 2) dynamic measurements - 20*log(rms(vout)/rms(vincm)). 45 61 db snr signal-to-noise ratio ( weighted a, 6db gain ) ( rl = 8 ?, thd + n 0.5%, 20hz < f < 20khz) 100 db gs start up gain -12 db g digital gain range -33 +12 db gain step size 3db gain accu- racy -1 +1 db twu wake-up time 15 ms v n output voltage noise f = 20hz to 20khz, rl = 8 ? unweighted weighted a 21 17 v rms zin differential input impedance 48 60 75 k ? t debounce debouncing time 10 ms t autorepeat time between volume changes 160 ms t range during autorepeat mode, necessary time to cover the whole gain range 2500 ms
electrical characteristics ts4974 5/8 table 4: v cc = +3.3v, gnd = 0v, t amb = 25 c (unless otherwise specified) symbol parameter min. typ. max. unit i cc supply current no input signal, no load 3.0 ma i standby standby current no input signal, vstdby = gnd, rl = 8 ? 230 2000 na voo output offset voltage no input signal, rl = 8 ?, floating inputs 520mv po output power thd = 1% max, f = 1khz, rl = 8 ? 300 380 mw thd + n total harmonic distortion + noise po = 250mw rms, 20hz < f < 20khz, rl = 8 ?, 0db gain, cb=1f, cin=330nf 0.5 % psrr power supply rejection ratio 1 f = 217hz, rl = 8 ?, ) vripple = 200mvpp, input grounded, cb=1f, cin=330nf 75 85 db cmrr common mode rejection ratio 2 f = 217hz, rl = 8 ?, vincm = 200mvpp, cb = 1f, cin=330nf 45 61 db snr signal-to-noise ratio ( weighted a, 6db gain ) ( rl = 8 ?, thd + n 0.5%, 20hz < f < 20khz) 100 db gs start up gain -12 db g digital gain range -33 +12 db gain step size 3db gain accu- racy -1 +1 db twu wake-up time 15 ms v n output voltage noise f = 20hz to 20khz, rl = 8 ? unweighted weighted a 21 17 v rms zin differential input impedance 48 60 75 k ? t debounce debouncing time 10 ms t autorepeat time between volume change 160 ms t range during autorepeat mode, necessary time to cover the whole gain range 2500 ms 1) dynamic measurements - 20*log(rms(vout)/rms(vripple)). vripple is an added sinus signal to vcc @ f = 217hz. 2) dynamic measurements - 20*log(rms(vout)/rms(vincm)).
ts4974 electrical characteristics 6/8 table 5: v cc = +2.6v, gnd = 0v, t amb = 25 c (unless otherwise specified) symbol parameter min. typ. max. unit i cc supply current no input signal, no load 2.8 ma i standby standby current no input signal, vstdby = gnd, rl = 8 ? 265 2000 na voo output offset voltage no input signal, rl = 8 ?, floating inputs 520mv po output power thd = 1% max, f = 1khz, rl = 8 ? 200 250 mw thd + n total harmonic distortion + noise po = 150mw rms, 20hz < f < 20khz, rl = 8 ?, 0db gain, cb=1f, cin=330nf 0.5 % psrr power supply rejection ratio 1 f = 217hz, rl = 8 ?, ) vripple = 200mvpp, input grounded, cb=1f, cin=330nf 75 85 db cmrr common mode rejection ratio 2 f = 217hz, rl = 8 ?, vincm = 200mvpp, cb = 1f, cin=330nf 45 61 db snr signal-to-noise ratio ( weighted a, 6db gain ) ( rl = 8 ?, thd + n 0.5%, 20hz < f < 20khz) 100 db gs start up gain -12 db g digital gain range -33 +12 db gain step size 3db gain accu- racy -1 +1 db twu wake-up time 15 ms v n output voltage noise f = 20hz to 20khz, rl = 8 ? unweighted weighted a 21 17 v rms zin differential input impedance 48 60 75 k ? t debounce debouncing time 10 ms t autorepeat time between volume change 160 ms t range during autorepeat mode, necessary time to cover the whole gain range 2500 ms 1) dynamic measurements - 20*log(rms(vout)/rms(vripple)). vripple is an added sinus signal to vcc @ f = 217hz. 2) dynamic measurements - 20*log(rms(vout)/rms(vincm)).
package mechanical data ts4974 7/8 3 package mechanical data 3.1 pinout (top view) 3.2 marking (top view) 3.3 dfn10 3x3 package ( all dimensions in mm ) balls are underneath 1 2 3 4 10 bypass vin- up / dvc vcc standby 5 9 8 7 6 down / dvc gnd vin+ vout- vout+ 1 2 3 4 10 bypass vin- up / dvc vcc standby standby 5 9 8 7 6 down / dvc gnd vin+ vout- vout+ logo : st part number : a74 date code : yww the dot is for marking pin 1 3.0 3.0 0.8 0.35 0.25 1 10 0.5 * the exposed pad is connected to the ground 3.0 3.0 0.8 0.35 0.25 1 10 0.5 * the exposed pad is connected to the ground
ts4974 revision history 8/8 4 revision history date revision description of changes 01 nov 2004 1 first release information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsibility for the co nsequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specifications mentioned in this publicati on are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectronics prod ucts are not authorized for use as critical components in life support devices or systems without express written approval of stmicroelectro nics. the st logo is a registered trademark of stmicroelectronics all other names are the property of their respective owners ? 2004 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - singapore - spain - sweden - switzerland - united kingdom - united states of america www.st.com
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