d1u54 p - w - 650 - 12 - hbxc series 54mm 1u f ront end ac - dc p o wer supply converter d1u54p - w - 650 - 12 - hbxc.a02 page 1 of 9 www.murata - ps.com/support ww w .murata - ps.com / en / 3d / acdc.htm l ww w .murata - ps.com / en / 3d / acdc.htm l ww w .murata - p s.com/en/3d/acdc.htm l ww w .murata - ps.com / en / 3d / acdc.htm l ww w .murata - p s.com/en/3d/acdc.htm l ww w .murata - ps.com / en / 3d / acdc.htm l product overview the d1u54 p - w - 650 - 12- h b x c series are very high ef?ciency 650 watt power factor cor rected front end supplies with a 12v main output and a 12v s tandby. a n active (analogue) current shar e characteristic i s provided to allow units to operat e in parallel. the power supply may be hot plugged; recover s from overtemperature faults, and ha s status leds on the front panel in addition to hardware signal logic and pmbus? status signals. the low pro?le 1u package and 2 1.4 w/cubic inch power density make them ideal for delivering reliable, ef?cient power to networking equipment , workstations, storage systems and other 12v distributed power architectures . ordering guide part number murata internal part number power output 90 to 264vac main output standby output air?ow d1u54p - w - 650 - 12- hb3 c m18 77 650w 12vdc 12vdc front to back d1u54p - w - 650 - 12- hb4 c m18 76 back to front features ? 650w output power ? 94% ef?ciency at 50% load ? 12v main output ? 12v standby output ? 1u height: ? 2.15" x 9.0" x 1.57" ? 54.5mm x 228.6mm x 40mm ? full digital control ? 21.4 watts per cubic inch density ? n+1 redundancy capable, including hot plugging ? active (analogue) current sharing on 12v main output; or ing fet ? overvoltage, overcurrent, overtemperature protection ? internal cooling fan (variable speed) ? pmbus?/i2c interface with status indicators ? rohs compliant ? two year warranty input characteristics parameter conditions min. nom. max. units input source voltage operating range 90 115/230 264 vac input source frequency 47 50/60 63 hz turn - on input voltage ramp up 74 84 vac turn - off input voltage ramp down 70 80 maximum current at vin = 100vac 650w 10 arms inrush current cold start between 0 to 200msec 25 apk power factor at 230vac, 100% load 0.96 at 230vac, 50% load 0.95 efficiency (excluding fan load) at 230vac, 20% load 90 % at 230vac, 50% load 94 at 230vac, 100% load 91 output voltage characteristics nominal output voltage parameter conditions min. typ. max. units 12v output set point accuracy 50% load; tamb =25c 11.96 12.00 12.04 vdc line and load regulation setpoint; temperature; line and load - 1.0% +1.0 % ripple voltage & noise 1, 2 20mhz bandwidth 120 mv p - p output current range 0 54.2 a load capacitance 500 4000 f 12vsb output set point accuracy 50% load; tamb = 25c 11.96 12.00 12.04 vdc line and load regulation setpoint; temperature; line and load 11.7 12.3 ripple voltage & noise 1 20mhz bandwidth 120 mv p - p output current 0 2 a 1 ripple and noise are measured with 0.1 f of ceramic capacitance and 10 f of tantalum capacitance on each of the power supply outputs. a short coaxial cable to the measurement scope input, is used. 2 measurements assume the use of the minimum load capacitance as specified for the main 12v output and a minimum load of 5%. below 5% loading the overall voltage deviation shall be within 500mv due t o zero load skip cycle mode of operation. available now at : www.murata - ps.com/en/3d/acdc.html t est certificate and test report for full details go to www.murata - ps.com/rohs
d1u54 p - w - 650 - 12 - hbxc series 54mm 1u f ront end ac - dc p o wer supply converter d1u54p - w - 650 - 12 - hbxc.a02 page 2 of 9 www.murata - ps.com/support output characteristics parameter conditions min. typ. max. units startup time ac ramp up note: following a turn off of the 12v main output (for any reason whatsoever) the output shall not be allowed to turn on again for 1sec (even if all necessary operating conditions are met). 3 s transient response main 12v, 50% load step, 1a/s di/dt 5 500 % s 12vsb, 50% load step, 1a/s di/dt current sharing accuracy (main 12v output) >10 % load ; (* percentage of f ull load) 5 * % hot swap transients 5 % holdup time ( total effective hold up - see timing waveforms ) full ac input source range; full load 1 2 ms environmental characteristics parameter conditions min. typ. max. units storage temperature range - 40 70 c operating temperature range 90v - 264vac , 650w - 5 50 operating humidity noncondensing ; +45c 5 90 % storage humidity 5 95 altitude (without derating at 40c) 3000 m shock 30g non - operating operational vibration sine sweep; 5 - 20 0hz, 2g; random vibration, 5 - 500hz, 1.11g mtbf (t arget ) per telcordia sr - 332 m1c1 @40c 576k hrs safety a pprovals can/csa c22.2 no 60950 - 1 - 07, am.1:2011 , am 2:2014 ansi/ ul 60950 - 1 - 2014 iec60950 - 1:2005 (2nd ed.) , a m 1:2009 + am 2:2013 en 60950- 1:2006+a11:2009 +a1:2010 +a12:2011 +a2:2013 bsmi cns14336 - 1 (099/09/30); cns13438 ((095/06/01) ccc gb 494 3.1 - 2011; gb9254 - 1 - 2008; gb17625, 1 - 2012 input fuse power supply has internal 12.5 a/250v fast blow fuse on the ac line input weight 1.63 lbs ( 0.741 kg) airflow; pressure vs. flow (pq) curves d1u54p - w - 650 - 12 - hb3c & d1u54p - w - 650 - 12 - hb4c orignal curve in excel spreadsheet at following location: m1845_airflow_meas_01 - 12- 2015.xlsx notes: 1. the above curves represent performance based upon the use of a 2 0 mm thickness fan . 2. curves recorded at room ambient (circa 2 5 c). 3. curves generated with intermal fan running at 100% duty cycle 0 50 100 150 200 250 0 2 4 6 8 10 back pressure (pa) psu airflow (cfm) d1u54 - w - 650- 12- hbxc p & q curve airflow front to back airflow back to front
d1u54 p - w - 650 - 12 - hbxc series 54mm 1u f ront end ac - dc p o wer supply converter d1u54p - w - 650 - 12 - hbxc.a02 page 3 of 9 www.murata - ps.com/support protection characteristics output parameter conditions min. typ. max. units overtemperature (intake) autorestart with 4c hysteresis for recovery (warning issued at 70 c) 75 c 12v overvoltage latching 13 .0 14 . 5 v overcurrent (target) the output shall shutdown when an overcurrent condition is detected. it will auto restart after 1sec; however if the overcurrent condition is redetected the output will once again shutdown. the output will once again re - start, however if the overcurrent condition persists it will latch of after the fi fth unsuccessful attempt. to reset the latch it will be necessary to toggle the ps_on_l signal (b4) or recycle the incoming ac source. 6 0 70 a 12 vsb overvoltage latching 1 3 .0 1 4. 5 v overcurrent the output shall shutdown when an overcurrent is detected. it will auto restart after 2sec; however if the overcurrent is re - detected the output will once again shutdown. this cycle will occur indefinitely while the overcurrent condition i 2.5 3.5 a isolation characteristics parameter conditions min. typ. max. units insulation safety rating input to output - reinforced 3000 vrms input to chassis - basic 1500 vrms isolation output to chassis 500 vdc emissions and immunity characteristic standard compliance input current harmonics iec/en 61000 - 3 - 2 complies voltage fluctuation and flicker iec/en 61000 - 3 - 3 complies conducted emissions fcc 47 cfr part 15 cispr 22/en55022 class a with 6db margin esd immunity iec/en 61000 - 4 - 2 level 4 criteria a radiated field immunity iec/en 61000 - 4 - 3 level 3 criteria b electrical fast transients/burst immunity iec/en 61000 - 4 - 4 level 3 criteria a surge immunity iec/en 61000 - 4 - 5 ? 6kv common mod e and differential mode, unit shall fail safely # . ? 4kv common mode and differential mode, unit shall survive; the output may shut down and recover automatically (criteria b) or re quire manual intervention (criteria c) # . ? 2kv common and differential mode, unit pass es criteria a (normal performance) * rf conducted immunity iec/en 61000 - 4 - 6 level 3 criteria a magnetic field immunity iec/en 61000 - 4 - 8 3 a/m criteria b voltage dips, interruptions iec/en 61000 - 4 - 11 230vin, 8 0% load, phase 0, dip 100% duration 10ms (a) 230vin, 50% load, phase 0, dip 100% duration 20ms (vsb:a, v1:b) 230vin, 100% load, phase 0, dip 100% duration > 20ms (vsb, v1:b) * impedance is 2 ohms for 2kv differential and common mode to comply with nebs gr - 1089 limits. maximum load capacitance is required for these tests. # tests above 2kv will be performed for information purposes to iec/en66100 - 4- 5 with 12ohm impedance, differential & common mode. status indicators led name led mode led state/operation description input ok solid green input voltage operating within normal specified range input ov/uv warning blinking green input voltage operating in: 1) overvoltage warning, or 2) undervoltage warning range input off or fault off input voltage operating: 1) above overvoltage range , or 2) below undervoltage range , or 3) not present output power good solid green main output and standby output enabled with no power supply warning or fault detected output standby blinking green standby output enabled with no power supply warning or fault detected output warning blinking amber power supply warning detected as per pmbus status_x reporting bytes ? output fault solid amber power supply fault detected as per pmbus status_x reporting
d1u54 p - w - 650 - 12 - hbxc series 54mm 1u f ront end ac - dc p o wer supply converter d1u54p - w - 650 - 12 - hbxc.a02 page 4 of 9 www.murata - ps.com/support bytes ? ? led fault/warning operation follows pmbus fault/warning reporting status flags but will not be 'sticky' ; (i.e . if the fault stimulus is removed , even though the actual fault/warning is still showing (still sticky and not cleared) , the relevant led will revert to normal (non - fault) operation. status and control signals signal name i/o description interface details input_ok (ac source) output the signal output is driven high when input source is available and within acceptable limits. the output is driven low to indicate loss of input power. there is a minimum of 1 ms pre - warning time before the signal i s driven low prior to the pwr_ok signal going low . the power supply must ensure that this interface signal provides accurate status when ac power is lost. pulled up internally via 10k to 3.3vdc. a logic high >2.0vdc a logic low <0.8vdc driven low by internal cmos buffer (open drain output). pw_ok (output ok) output the signal is asserted, driven high, by the power supply to indicate that all outputs are valid. if any of the outputs fail then this output will be hi - z or driven low. the output is driven low to indicate that the main output is outside of lower limit of regulation (11.4vdc). pulled up internally via 10k to 3.3vdc. a logic high >2.0vdc a logic low <0.8vdc driven low by internal cmos buffer (open drain output). smb_alert (fault/warning) output the signal output is driven low to indicate that the power supply has detected a warning or fault and is intended to alert the system. this output must be driven high when the power is operating correctly (within specified limits). the signal will revert to a high level when the warning/fau lt stimulus (that caused the alert) is removed. pulled up internally via 10k to 3.3vdc. a logic high >2.0vdc a logic low <0.8vdc driven low by internal cmos buffer (open drain output). present_l (power supply absent) output the signal is used to detect the presence (installed) of a psu by the host system. the signal is connected to psu logic sgnd within the power module. passive connection to +vsb_return. a logic low <0.8vdc ps_on (power supply enable/disable input this signal is pulled up internally to the internal housekeeping supply (within the power supply). the power supply main 12vdc output will be enabled when this signal is pulled low to +vsb_return. in the low state the signal input shall not source more t han 1ma of current. the 12vdc output will be disabled when the input is driven higher than 2.4v, or open circuited. cycling this signal shall clear latched fault conditions. pulled up internally via 10k to 3.3vdc. a logic high >2.0vdc a logic low <0.8vdc input is via cmos schmitt trigger buffer. ps_kill input this signal is used during hot swap to disable the main output during hot swap extraction. the input is pulled up internally to the internal housekeeping supply (within the power supply). the signal is provided on a short (lagging pin) and should be connected to +vsb_return. pulled up internally via 10k to 3.3vdc. a logic high >2.0vdc a logic low <0.8vdc input is via cmos schmitt trigger b ff addr (address select) input an analog ue input that is used to set the address of the internal slave devices (eeprom and microprocessor) used for digital communications. connection of a suitable resistor to +vsb_return, in conjunction with an internal resistor divider chain, will configure the r equired address. dc voltage between the limits of 0 and +3.3vdc. scl (serial clock) both a serial clock line compatible with pmbus tm power systems management protocol part 1 C general requirements rev 1.1. no additional internal capacitance is added that would affect the speed of the bus. the signal is provided with a series isolator device to disconnect the internal power supply bus in the event that the power module is unpowered, v il is 0.8v maximum v ol is 0.4v maximum when sinking 3ma v ih is 2.1v minimum sda (serial data) both a serial data line compatible with pmbus tm power systems management protocol part 1 C general requirements rev 1.1. the signal is provided with a series isolator device to disconnect the internal power supply bus in the event that the power module is unpowered, v il is 0.8v maximum v ol is 0.4v maximum when sinking 3ma v ih is 2.1v minimum v1_sense v1sense_rtn input remote sense connections intended to be connected at and sense the voltage at the point of load. the voltage sense will interact with the internal module regulation loop to compensate for voltage drops due to connection resistance between the output connector and the load. if remote sense compensation is not required then the voltage can be configured for local sense by: 1. v1_sense directly connected to power blades 6 to 10 (inclusive) 2. v1_sense_rtn directly connected to power blades 1 to 5 (inclusive) compensation for a up to 0.12 vdc total connection drop (output and return connections). ishare bi - directional analogue bus the current sharing signal is connected between sharing units (forming an ishare bus). it is an input and/or an output (bi - directional analog ue bus) as the voltage on the line controls the current share between sharing units. a power supply will respond to a change in this voltage but a power supply can also change the voltage depending on the load drawn from it. on a single unit the voltage on t he pin (and the common ishare bus would read 8vdc at 100% load (module capability). for two identical units sharing the same 100% load this would read 4vdc for perfect current sharing (i.e. 50% module load capability per unit). analogue voltage: + 8v maxim um; 10k to +12v_rtn
d1u54 p - w - 650 - 12 - hbxc series 54mm 1u f ront end ac - dc p o wer supply converter d1u54p - w - 650 - 12 - hbxc.a02 page 5 of 9 www.murata - ps.com/support timing specifications turn - on delay & output rise time: v 1 ps _on delay v1 rise time pw_ok delay ac_ok delay v1 power on delay vsb rise time vsb power on delay vsb vsb ac input ac input v1; 12v ps_on ac_ok ps_on ac_ok pw_ok pw_ok v1 ps_on delay power on delay; rise time and signaling v1; 12 v 1. the turn - on delay after application of ac input within the operating range shall as defined in the following tables. 2. the output rise times shall be measured from 10% of the nominal output to the lower limit of the regulation band as defined in the following tables . time min max vsb rise time 10 0 ms 2 00ms v1 rise time 20 ms 120 ms vsb power - on - delay 2 7 00ms v1 power - on - delay 3000ms v1 ps_on delay 100 ms 150 ms v1 pwok delay 100 ms 300 ms acok detect 3 00ms 2000 ms timing specifications turn - off (shutdown by ps_on) turn off fall time and signaling v1 ps_ off delay v1 falltime pwok delayoff ac input vsb v1; 12v ps_on ac_ok pw_ok turn - off timing min max notes v1 fall time - - must be monotonic v1 ps_off delay 0ms 5 ms pw_ok delay off 1.0 ms 1. note this characteristic is applicable for the main 12vdc output shutdown from ps_on pulled high.
d1u54 p - w - 650 - 12 - hbxc series 54mm 1u f ront end ac - dc p o wer supply converter d1u54p - w - 650 - 12 - hbxc.a02 page 6 of 9 www.murata - ps.com/support timing specifications power removal holdup power removed holdup , falltime and signaling vsb holdup vsb falltime v1 holdup v1 falltime pwok delayoff ac fail detect pwok hold up ac input vsb v1; 12v ps_on ac_ok pw_ok power removal timing min max notes vsb holdup 4 0ms - v1 holdup (effective total) 1 2 ms - full load ac fail detect - 4 0ms pwok delay off 1.0 ms full load pwok hold up 11.0 ms full load output connector & signal interface ; fci pn 10122460 - 005lf nb: with respect to signals 3 in c olumns 5, refers to the shortest level signal pin; the shortest pins are the last to make, first to break in the mating s equence.
d1u54 p - w - 650 - 12 - hbxc series 54mm 1u f ront end ac - dc p o wer supply converter d1u54p - w - 650 - 12 - hbxc.a02 page 7 of 9 www.murata - ps.com/support 6, 7, 8, 9, 10 v1 (+12vout) +12v main output 1, 2, 3, 4, 5 +12v rtn/pgnd +12v main output return a1 +vsb standby output b1 +vsb standby output c1 +vsb standby output d1 +vsb standby output e1 +vsb standby output a2 +vsb_return standby output return b2 +vsb_return standby output return c2 unused no end user connection d2 unused no end user connection e2 unused no end user connection a3 a ddr i 2 c address protocol selection ; (select address by appropriate pull down resistor C see table below) b3 unused no end user connection c3 sda i 2 c serial data line d3 v1_sense_r - ve remote sense return e3 v1_sense +ve remote sense a4 scl i 2 c serial clock line b4 ps_on_l remote on/off (enable/disable) c4 smb_alert alert signal to host system d4 unused no end user connection e4 a c_ok a c input source present & ok a5 ps_kill power supply kill; short pin b5 ishare active current share bus c5 pw_ok power ok; short pin d5 unused no end user connection e5 present_l power module present; short pin wirin mating connector part number description te connectivity 2 - 1926739 - 5 fci 10108888 - r10253sl f right angle right angle a ddr address selection addr pin (a3) resistor to gnd (k - ohm)* power supply main controller (serial communications slave address) power supply external eeprom (serial communications slave address) 0.82 0xb0 0xa0 2.7 0xb2 0xa2 5.6 0xb4 0xa4 8.2 0xb6 0xa6 15 0xb8 0xa8 27 0xba 0xaa 56 0xbc 0xac 180 0xbe 0xae * the resistor shall be +/ - 5% tolerance g diagram for output output connector pin assignments - d1u54 p - w - 650 - 12 - hbx c (power supply)fci pn 10122460 - 005lf pin signal name comments
d1u54 p - w - 650 - 12 - hbxc series 54mm 1u f ront end ac - dc p o wer supply converter d1u54p - w - 650 - 12 - hbxc.a02 page 8 of 9 www.murata - ps.com/support wiring diagram for output vsb load +12v load d1u54p d1u54p v1_sense (main output remote sense) v1_sense (main output remote sense) v1_sense_r v1_sense_r +12v main output return +12v main output return +12v main output +12v main output ishare ishare vsb vsb vsb_return vsb_return ps_on ps_on ps_kill ps_kill dotted lines show optional remote sense connections. optional remote sense lines can be attached to a load that is a distance away from the power supply to improve regulation at the load. fet, bjt, wire or switch (debounced) to turn on +12v main output e3 e3 6 -10 6-10 1 - 5 1 - 5 d3 d3 b5 b5 a1, b1, c1, d1, e1 a1, b1, c1, d1, e1 a2, b2 a2, b2 b4 b4 a5 a5 current share notes 1. main output: current sharing is achieved using the active current share method details.) 2. current sharing can be achieved with or without the remote (v_sense) connected to the common load. 3. +vsb outputs can be tied together for redundancy but total combined output power must not exceed the rated standby power. the +vsb output has an internal or ing mosfet for additional redundancy/internal short protection. 4. the current sharing pin b5 is connected between sharing units (forming an ishare bus). it is an input a nd/or an output (bi - directional analog ue bus) as the voltage on the line controls the current share between sharing units. a power supply will respond to a change in this voltage but a power su pply can also change the voltage depending on the load drawn fr om it. on a single unit the voltage on the pin (and the common ishare bus would read 8vdc at 100% load. for two units sharing the same load this would read 4vdc for perfect current sharing (i.e. 50% load per unit). 5. t he load for both the main 12v and the vs b rails at initial startup sh all not be allowed to exceed the capability of a single unit. the load can be increased after a delay of 3sec (minimum), to allow all sharing units to achieve steady state regulation. mechanical dimensions
d1u54 p - w - 650 - 12 - hbxc series 54mm 1u f ront end ac - dc p o wer supply converter d1u54p - w - 650 - 12 - hbxc.a02 page 9 of 9 www.murata - ps.com/support 1. ac input connector: iec 320 - c14 2. dimensions: 2.15" x 9.0" x 1.57" [54.5mm x 228.6mm x 40.0mm] 3. this drawing is a graphical representation of the product and may not show all fine details. 4. reference file: d1u54p - w - 650 - 12 - h bx c (m1876 - m1877)_drawing for product datasheet_20160119.pdf optional accessories description part number mps internal part number 12v d1u54p output connector card d1u54p - 12- conc 8407001- 1 application notes document number description link acan - 64 d1u54p output connector card http://power.murata.com/datasheet?/data/apnotes/acan - 64 .pdf acan - 59 d1u54p - x communication protocol http://power.murata.com/datasheet?/data/apnotes/acan - 59 .pdf murata power solutions, inc. 11 cabot boulevard, mans?eld, ma 02048 - 1151 u.s.a. iso 9001 and 14001 registered this product is subject to the following operating requirements and the life and safety critical application sales policy: refer to: http://www.murata - ps.com/requirements/ murata power solutions, inc. makes no representation that the use of its products in the circuits described herein, or the use of other technical inf ormation contained herein, will not infringe upon existing or future patent rights. the descriptions contained herein do not imply the granting of licenses to make, use, or sell equipment constructed in accordance therewith. speci?cations are subject to change without notice. ? 2016 murata power solutions, inc.
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