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december 2014 ? 2014 fairchild semiconductor corporation www.fairchildsemi.com FL7733AMX ? rev. 1. 2 fl7733a primary-side-regulated led driver with power factor correction fl7733a primary-side-regulat ed led driver with power factor correction features performance ? < 3 % total constant current tolerance over all conditions < 1% over universal line voltage variation < 1% from 50% to 100% load voltage variation < 1% with 20% magnetizing inductance variation ? primary-side regulation (psr) control for cost- effective solution without requiring input bulk capacitor and secondary feedback circuitry ? application input voltage range: 80 v ac - 308 v ac ? high pf of >0.9, and low thd of < 10% over universal line input range ? fast < 200 ms start-up (at 85 v ac ) using internal high-voltage startup with v dd regulation ? adaptive feedback loop control for startup without overshoot system protection ? led short / open protection ? output diode short protection ? sensing resistor short / open protection ? v dd over-voltage protection (ovp) ? v dd under-voltage lockout (uvlo) ? over-temperature protection (otp) ? all protections are auto restart (ar) ? cycle- by -cycle current limit applications ? low to mid power led lighting systems of 5 w to greater than 60 w compatible with analog dimming function description the fl7733a is a highly-integrated pwm controller with advanced primary-side regulation (psr) technique to minimize components in low - to -mid-power led lighting converters . using an innovative truecurrent? technology to provide tight tolerance constant-current output, th is led driver enables designs with constant current ( cc ) tolerance of less than 1% over the universal line voltage range to meet stringent led brightness requirements . by minimizing turn-on time fluctuation, high power factor and low thd over the universal line range are obtained in the fl7733a . an integrated high-voltage startup circuit implements fast startup and high system efficiency. during startup, adaptive feedback loop control anticipates the steady-state condition and sets initial feedback condition close to the steady state to ensure no overshoot or undershoot of led current. the fl7733a also provides powerful protections, such as led short / open, output diode short, sensing resistor short / open, and over-temperature for high system reliability. the fl7733a controller is available in an 8-pin small- outline package (sop). related product resources fl7733a product folder . ordering information part number operating temperature range package packing method fl7733a mx - 40 c to +125c 8-lead, small outline package (sop- 8) tape & reel
? 2014 fairchild semiconductor corporation www.fairchildsemi.com FL7733AMX ? rev. 1. 2 2 fl773 3a primary-side-regulated led driver with power factor correction application diagram ac input comi gnd vs hv cs gate vdd dc output 5 1 2 4 6 3 8 7 nc figure 1. typical application block diagram s r q 4 internal bias 6 vdd comi osc truecurrent? calculation gate driver 2 gate 1 cs v ref 5 vs 3 gnd 7 n.c + sawtooth generator v cs-cl s r q - + v ovp v dd good shutdown error amp. t dis detector current limit control eav 8 hv line compensator sample & hold vs ovp 3 v 0.3 v slp max. duty controller 0.1 v srsp ocp 1.35 v + + + 250 ms timer + + leb + eav otp slp ocp srsp vs ovp slp monitor v dd good srsp monitor + eai vdd ovp dcm controller figure 2. functional block diagram
? 2014 fairchild semiconductor corporation www.fairchildsemi.com FL7733AMX ? rev. 1. 2 3 fl773 3a primary-side-regulated led driver with power factor correction marking information figure 3. top mark pin configuration 34 1 2 cs gate gnd vdd hv nc vs comi 34 34 8 7 65 figure 4. pin configuration (top view) pin descriptions pin # name description 1 cs current sense . this pin connects a current-sense resistor to detect the mosfet c urrent for constant output current regulati on . 2 gate pwm signal output . this pin uses the internal totem-pole output driver to drive the power mosfet. 3 gnd ground 4 vdd power supply . ic operating current and mosfet driving current are supplied using this pin. 5 vs voltage sense . this pin detects the output voltage and discharge time informatio n for cc regulation . this pin is connected to the auxiliary winding of the trans former via a resistor divider. 6 comi constant current loop compensation . this pin is connected to a capacitor between comi and gnd for compensating the current loop gain. 7 nc no connect 8 hv high voltage . this pin is connected to the rectified input voltage via a resistor . 34 34 zxytt tm 7733a f : fairchild l ogo z: plant code x: 1-digit year c ode y: 1-digit week c ode tt: 2-digit die run code t: package type (m=sop) m: manufacture flow code
? 2014 fairchild semiconductor corporation www.fairchildsemi.com FL7733AMX ? rev. 1. 2 4 fl773 3a primary-side-regulated led driver with power factor correction absolute maximum ratings stresses exceeding the absolute maximum ratings may dama ge the device. the device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. in addition, extended exposure to stresses above the reco mmended operating conditions may affect device reliability . the absolute maximum ratings are stress ratings only. symbol parameter min. max. unit hv hv p in voltage 700 v v vdd dc supply voltage (1,2) 30 v v vs vs pin input voltage -0.3 6 .0 v v cs cs pin input voltage -0.3 6 .0 v v comi comi pin input voltage -0.3 6 .0 v v gate gate pin input voltage -0.3 30 .0 v p d power dissipation (t a 50 c) 633 mw t j maximum junction temperature 150 c t stg storage temperature range - 55 150 c t l lead temperature (soldering) 10 s ec onds 260 c notes: 1. stresses beyond those listed under absolute maximum ratings m ay cause permanent damage to the device. 2. all voltage values, except differential voltages, are given with res pect to gnd pin. thermal impedance t a =25c, unless otherwise specified. symbol parameter value unit ja junction- to -ambient thermal impedance 158 c /w jc junction- to -case thermal impedance 39 c /w note: 3. referenced the jedec recommended environment, jesd51-2, and test boa rd, jesd51-3, 1s1p with minimum land pattern. esd capability symbol parameter value unit esd human body model, ansi/esda/jedec js-001-2012 5 kv charged device model, jesd22-c101 2 note: 4. meets jedec standards jesd22-a114 and jesd 22-c101.
? 2014 fairchild semiconductor corporation www.fairchildsemi.com FL7733AMX ? rev. 1. 2 5 fl773 3a primary-side-regulated led driver with power factor correction electrical characteristics v dd =15 v, t j =-40 to +1 25 c, unless otherwise specified. currents are defined as positi ve into the device and negative out of device. symbol parameter conditions min. typ. max. unit v dd - on turn-on threshold voltage 14.5 16.0 17.5 v v dd -off turn-off threshold voltage 6.75 7.75 8.75 v i dd - op operating current c l =1 nf , f=f max- cc 3 4 5 ma i dd - st startup current v dd =v dd - on C 1.6 v 30 50 a v vdd- ov p v dd over-voltage protection level 23 24 25 v gate section v ol output voltage low t a =25c , v dd =20 v , i dd_gate =1 ma 1.5 v v oh output voltage high t a =25c , v dd =10 v, i dd =1 ma 5 v i source peak sourcing current (5) v dd =10 ~ 20 v - 60 ma i sink peak sinking current (5) v dd =10 ~ 20 v 180 ma t r rising time t a =25c , v dd =15 v , c load =1 nf 100 150 200 ns t f falling time t a =25c , v dd =15 v, c load =1 nf 20 60 100 ns v clamp output clamp voltage v dd = 20 v, v cs =0 v, v vs =0 v, v com =0 v 12 15 18 v hv startup section i hv supply current from hv pin t a =25c , v in =90 v ac , v dd =0 v 9 ma i hv - lc leakage current after startup 1 10 a t r-jfet jfet regulation time after startup (5) t a =25c 190 250 310 ms v jfet- hl jfet regulation high limit voltage 17.5 19 .0 20.5 v v jfet- ll jfet regulation low limit voltage 11.5 13 .0 14.5 v current-error-amplifier section g m transconductance (5) t a =25c 11 17 23 mho ? i comi-sink comi sink current t a =25c , v eai =2.55 v, v comi =5 v 12 18 24 a i comi-source | comi source current | t a = 25 c , v eai =0.45 v, v comi =0 v 12 18 24 a v comi-hgh comi high voltage v eai =0 v 4.7 v v comi-low comi low voltage v eai =5 v 0.1 v ? v comi_int.clp initial comi clamping voltage (5) 1. 2 v t comi_int.clp time for initial comi clamping (5) 15 ms continued on the following page
? 2014 fairchild semiconductor corporation www.fairchildsemi.com FL7733AMX ? rev. 1. 2 6 fl773 3a primary-side-regulated led driver with power factor correction electrical characteristics (continued) v dd =15 v, t j =-40 to +125c, unless otherwise specified. currents are defined as positive into the device and negative out of device. symbol parameter conditions min. typ. max. unit voltage-sense section t dis-bnk t dis blanking time of v s (5) 0.85 1.15 1.45 s i vs -bnk v s current for vs blanking - 75 - 90 - 105 a v vs -ovp v s level for output over-voltage protection 2.95 3.00 3.15 v v vs -low- cl - en v s threshold voltage to enable low current limit (5) 0.25 0.30 0.35 v v vs -high- cl -dis v s threshold voltage to disable low current limit (5) 0.54 0.60 0.66 v v vs -slp- th v s threshold voltage for output short-led protection 0.25 0.30 0.35 v t slp-bnk v s detection disable time after startup (5) t a =25c 15 ms current-sense section v rv reference voltage t a =25c 1 .4 85 1 .5 00 1 .5 15 v t leb leading-edge blanking time (5) 3 00 ns t min minimum on time in cc (5) v comi =0 v 500 ns t pd propagation delay to gate output 50 100 150 ns v cs -high- cl high current limit threshold 0.9 1.0 1.1 v v cs -low- cl low current limit threshold 0.16 0.20 0.24 v t low-cm low current mode operation time at startup (5) 20 ms v cs -srsp v cs threshold voltage for sensing resistor short protection 0.1 v v cs -ocp v cs threshold voltage for over- current protection t a =25c 1.20 1.35 1.50 v v cs / i vs relation of line compensation voltage and v s current (5) 21.5 v /a oscillator section f max- cc maximum frequency in cc t a =25c , v s =3.0 v 65 70 75 khz f min- cc minimum frequency in cc t a =25c , v s =0.3 v 23.0 26.5 30.0 khz t on -max maximum turn-on time t a =25c, f=f max- cc 11.0 13.0 15 .0 s over-temperature-protection section t otp threshold temperature for otp (5) 150 o c t otp-h ys restart junction temperature hysteresis (5) 10 o c note : 5. these parameters, although guaranteed by design, are not prod uction tested.
? 2014 fairchild semiconductor corporation www.fairchildsemi.com FL7733AMX ? rev. 1. 2 7 fl773 3a primary-side-regulated led driver with power factor correction typical performance characteristics 0.5 0.7 0.9 1.1 1.3 1.5 - 40 - 20 0 25 50 75 100 125 normalized temperature ( ) 0.5 0.7 0.9 1.1 1.3 1.5 - 40 - 20 0 25 50 75 100 125 normalized temperature ( ) figure 5. v dd - on vs. temperature figure 6. v dd -off vs. temperature 0.5 0.7 0.9 1.1 1.3 1.5 - 40 - 20 0 25 50 75 100 125 normalized temperature ( ) 0.5 0.7 0.9 1.1 1.3 1.5 - 40 - 20 0 25 50 75 100 125 normalized temperature ( ) figure 7. i dd - op vs. temperature figure 8. v dd -ovp vs. temperature 0.5 0.7 0.9 1.1 1.3 1.5 - 40 - 20 0 25 50 75 100 125 normalized temperature ( ) 0.5 0.7 0.9 1.1 1.3 1.5 - 40 - 20 0 25 50 75 100 125 normalized temperature ( ) figure 9. f max- cc vs. temperature figure 10. f min- cc vs. temperature
? 2014 fairchild semiconductor corporation www.fairchildsemi.com FL7733AMX ? rev. 1. 2 8 fl773 3a primary-side-regulated led driver with power factor correction typical performance characteristics (continued) 0.5 0.7 0.9 1.1 1.3 1.5 - 40 - 20 0 25 50 75 100 125 normalized temperature ( ) 0.5 0.7 0.9 1.1 1.3 1.5 - 40 - 20 0 25 50 75 100 125 normalized temperature ( ) figure 11. v vr vs. temperature figure 12. gm vs. temperature 0.5 0.7 0.9 1.1 1.3 1.5 - 40 - 20 0 25 50 75 100 125 normalized temperature ( ) 0.5 0.7 0.9 1.1 1.3 1.5 - 40 - 20 0 25 50 75 100 125 normalized temperature ( ) figure 13. i comi-source vs. temperature figure 14. i comi-sink vs. temperature 0.5 0.7 0.9 1.1 1.3 1.5 - 40 - 20 0 25 50 75 100 125 normalized temperature ( ) 0.5 0.7 0.9 1.1 1.3 1.5 - 40 - 20 0 25 50 75 100 125 normalized temperature ( ) figure 15. v vs -ovp vs. temperature figure 16. v cs -ocp vs. temperature
? 2014 fairchild semiconductor corporation www.fairchildsemi.com FL7733AMX ? rev. 1. 2 9 fl773 3a primary-side-regulated led driver with power factor correction functional description fl7733a is ac-dc pwm controller for led lighting applications. truecurrent ? technology regulate accurate constant led current independent of input voltage, output voltage, and magnetizing inductance variations. the dcm control in the oscillator reduces conduction loss and maintains dcm operation over a wide range of output voltage, which implements high power factor correction in a single-stage flyback or buck-boost topology. a variety of protections, such as led short / open protection, sensing resistor short / open protection, over-current protection, over- temperature protection, and cycle- by -cycle current limitation stabilize system operation and protect external components . startup at startup, an internal high-volta ge jfet supplies startup current and v dd capacitor charging current, as shown in figure 17. when v dd reaches 16 v, switching begins and the internal high-voltage jfet continues to supply v dd operating current for an initial 250 ms to maintain v dd voltage higher than v dd -off . as the output voltage increases, the auxiliary winding becomes the dominant v dd supply current source. 250 ms timer 16 v / 7.75 v 8 hv 4 vdd internal bias vs v dc 5 c vdd r vs1 r vs2 v dd good figure 17. startup block switching is controlled by current-mode for 20 ms after v dd - on . during current-mode switching with the flyback or buck-boost topology, output current is only determined by output voltage . therefore, the output voltage increases with constant slope, regardless of line voltage variation. short-led protection (slp) is enabled after the 15 ms slp blanking time so that the output voltage is higher than slp threshold voltage and successful startup is guaranteed without slp in normal condition. during current-mode switching, comi voltage, which determines turn-on time in voltage mode, is adjusted close to the steady state level . the comi capacitor is charged to 1.2 v for 15 ms and adjusted to a modulated level inversely proportional to v in peak value for 5 ms. turn-on time right after 20 ms startup time can be controlled close to steady state on time so that voltage mode is smoothly entered without led current overshoot or undershoot. i led time v comi 15 ms startup time 20 ms 1.0 v v cs 0.2 v v in v dd = v dd_on low line high line low line high line current mode voltage mode figure 18. startup sequence pfc and thd in the flyback or the buck-boost topology, constant turn- on time and constant frequency in discontinuous conduction mode (dcm) operation can achieve high pf and low thd, as shown in figure 19. constant turn-on time is maintained by the internal error amplifier and a large external comi capacitor (typically over 1 f) at comi pin. constant frequency and dcm operation are managed by dcm control. constant t on average input current secondary current peak envelope constant t off primary current peak envelope figure 19. power factor correction constant-current regulation the output current can be estimated using the peak drain current and inductor current discharge time because output current is the same as the average of the diode current in steady state. the peak value of the drain current is determined by the cs peak voltage detector. the inductor current discharge time (t dis ) is sensed by a t dis detector. with peak drain current, inductor current discharging time and operating switching period information, the truecurrent? calculation block estimates output current as follow s: s ps cs s dis o r n v t t i 1 2 1 ? ? ? ? ? 25 .0 ? ? cs s dis v t t s ps o r n i ? ? 125 .0
? 2014 fairchild semiconductor corporation www.fairchildsemi.com FL7733AMX ? rev. 1. 2 10 fl773 3a primary-side-regulated led driver with power factor correction where, n ps is the primary- to -secondary turn ratio and r s is a sensing resistor connected between the source terminal of the mosfet and ground. t dis i ds i d i pk = r s v cs i d.pk i o t on t s v o n s n a v f n s n a figure 20. key waveforms for primary-side regulation the output of the current calculation is compared with an internal precise voltage reference to generate an error voltage (v comi ), which determines the mosfets turn-on time in voltage-mode control. with this fairchilds innovative truecurrent? technology , constant-current output can be precisely controlled. although the output current is calculated with accurate method the output current at high input voltage may still be higher than that at low input voltage due to mosfet's turn off propagation delay caused by high qg . to maintain tight cc regulation over the entire input voltage range, a line compensation resistor of 100 ~ 500 ? can be inserted between the cs pin and the source terminal of the mosfet. the voltage across by compensation resistor is dependent on current flow out of the cs pin for mosfet turn-on and it is proportional to input voltage. dcm control as mentioned above, dcm should be guaranteed for high power factor in flyback topology. to maintain dcm across a wide range of output voltage, the switching frequency is linearly adjusted by the output voltage in linear frequency control in the whole vs range. output voltage is detected by the auxiliary winding and the resistive divider connected to the vs pin, as shown in figure 21. when the output voltage decreases, secondary diode conduction time is increased and the dcm control lengthens the switching period, which retains dcm operation over the wide output voltage range, as shown in figure 22. the frequency control lowers the primary rms current with better power efficiency in full-load condition. osc gate driver 2 gate cc control 5 vs v out s/h t dis detector dcm controller figure 21. dcm and bcm control lm nvo tdis lm vo n 4 3 tdis 3 4 lm vo n 5 3 tdis 3 5 t t 3 4 t 3 5 ipk ipk ipk t tdis ipk iavg ? ? ? ? ? ? t tdis ipk iavg ? ? ? ? 3/4 3/4 ? ? ? ? t tdis ipk iavg ? ?? ? 3/5 3/5 figure 22. primary and secondary current bcm control the end of secondary diode conduction time could possibly be behind the end of a switching period set by dcm control. in this case, the next switching cycle starts at the end of secondary diode conduction time since fl7733a doesnt allow ccm . consequently, the operation mode changes from dcm to boundary conduction mode (bcm) . analog dimming function analog dimming function can be implemented by controlling comi voltage which determines the turn- on time of main power mosfet. figure 23 shows an example analog dimming circuit for the fl7733a which uses a photo-coupler so the led current can be controlled by the dimming signal, a-dim, from the secondary side of the isolation transformer. a-dim signal (0 ~ v dc ) comi i comi c comi v dc figure 23. analog dimming control
? 2014 fairchild semiconductor corporation www.fairchildsemi.com FL7733AMX ? rev. 1. 2 11 fl773 3a primary-side-regulated led driver with power factor correction short-led protection (slp) in case of a short-led condition, the secondary diode is stressed by high current . when v s voltage is lower than 0. 3 v due to a short-led condition , the cycle- by -cycle current limit level changes to 0.2 v from 1.0 v and sl p is triggered if the v s voltage is less than 0.3 v for four (4) consecutive switching cycles. figure 24 and figure 25 show the slp block and operational waveforms during led-short condition. to set enough auto-restart time for system safety under protection conditions, v dd is maintained between 13 v and 19 v, which is higher than uvlo, for 250 ms after v dd - on . slp is disabled for an initial 15 ms to ensure successful startup in normal led condition. 15 ms timer 0.3 v s/h slp + - vs vdd 250 ms timer 16 v / 7.75 v v dd hv 5 + - slp is disabled for initial 15 ms 19 v / 13 v 4 8 v dd good figure 24. internal slp block led short 15 ms v dd off v dd-on gate 250 ms jfet regulation 19 v 13 v v dd v cs 0.2 v v in 15 ms figure 25. waveforms in short-led condition open-led protection fl7733a protects external components, such as output diode s and output capacitor s, during open-led condition. during switch turn-off, the auxiliary winding voltage is applied as the reflected output voltage. because the v dd and v s voltages have output voltage information through the auxiliary winding, the internal voltage comparators in the vdd and vs pins can trigger output over-voltage protection (ovp), as shown in figure 26 and figure 27. + - vdd v s-ovp s/h v s ovp vs eav 16 v / 7.75 v v dd 19 v / 13 v v dd-ovp v dd ovp + - 250 ms timer hv 8 v dd good 4 5 figure 26. internal ovp block v dd off v dd on gate 19 v 13 v v dd v out v dd-ovp led open eav 3 v ns na v dd-ovp x 250 ms jfet regulation figure 27. waveforms in led open condition sensing resistor short protection (srsp) in a sensing resistor short condition, the v cs level is almost zero and pulse- by -pulse current limit or ocp is not effective. the fl7733a is designed to provide sensing resistor short protection for both current and voltage mode operation. i f the v cs level is less than 0.1 v in the first switching cycle , the gate output is stopped by current-mode srsp. after 20 ms startup time , the gate is shut down by the voltage-mode srsp i f v cs level is less than 0.1 v at over 60% level of peak v in . under-voltage lockout (uvlo) the v dd turn-on and turn-off thresholds are fixed internally at 16 v and 7. 75 v, respectively. during startup, the v dd capacitor must be charged to 16 v through the high-voltage jfet to enable the fl7733a . the v dd capacitor continues to supply v dd until auxiliary power is delivere d from the auxiliary winding of the main transformer. v dd should remain higher than 7. 75 v during this startup process. therefore, the v dd capacitor must be adequate to keep v dd over the uvlo threshold until the auxiliary winding voltage is above 7.75 v.
? 2014 fairchild semiconductor corporation www.fairchildsemi.com FL7733AMX ? rev. 1. 2 12 fl773 3a primary-side-regulated led driver with power factor correction over-current protection (o c p) when an output diode or secondary winding are shorted, switch current with extremely high di/dt can flow through the mosfet even by minimum turn-on time. the fl7733a is designed to protect the system against this excessive current. when the cs voltage across the sensing resistor is higher than 1.35 v, the ocp comparator output shuts down gate switching . in a sensing resistor open condition, the sensing resistor voltage cant be detected and output current is not regulated properly. if the sensing resisto r is damaged open -circuit, the parasitic capacitor in the cs pin is charged by internal cs current sources. therefore, the v cs level is built up to the ocp threshold voltage and then switching is shut down immediately. over-temperature protection (otp) the temperature-sensing circuit shuts down pwm output if the junction temperature exceeds 1 50 c. the hysteresis temperature after otp triggering is 10c. pcb layout guidance pcb layout for a power converter i s as important as circuit design because pcb layout with high parasitic inductance or resistance can lead to severe switching noise with system instability. pcb should be designed to minimize switching noise into control signals . 1. the signal ground and power ground should be separated and connected only at one position (gnd pin) to avoid ground loop noise. the power ground path from the bridge diode to the sensing resistors should be short and wide. 2. gate-driving current path (gate C r gate C mosfet C r cs C gnd) must be as short as possible. 3. control pin components; such as c comi , c vs , and r vs2 ; should be placed close to the assigned pin and signal ground. 4. high-voltage traces related to the drain of mosfet and rcd snubber should be kept far way from control circuits to avoid unnecessary interference. 5. if a heat sink is used for the mosfet, connect this heat sink to power ground. 6. the auxiliary winding ground should be connected closer to the gnd pin than the control pin components ground. fl7733a ac input gnd gate vdd vs cs comi nc hv dc output r cs r gate c vdd c comi c vs r vs2 r vs1 1 2 3 4 5 power ground signal ground 6 figure 28. layout example

www. onsemi.com 1 on semiconductor and are trademarks of semiconductor components industries, llc dba on semiconductor or its subsidiaries i n the united states and/or other countries. on semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property . a listing of on semiconductors product/patent coverage may be accessed at www.onsemi.com/site/pdf/patent ? marking.pdf . on semiconductor reserves the right to make changes without further notice to any products herein. on semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does on semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. buyer is responsible for its products and applications using on semiconductor products, including compliance with all laws, reg ulations and safety requirements or standards, regardless of any support or applications information provided by on semiconductor. typical parameters which may be provided in on semiconductor data sheets and/or specifications can and do vary in dif ferent applications and actual performance may vary over time. all operating parameters, including typic als must be validated for each customer application by customers technical experts. on semiconductor does not convey any license under its patent rights nor the right s of others. on semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any fda class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. should buyer purchase or use on semicondu ctor products for any such unintended or unauthorized application, buyer shall indemnify and hold on semiconductor and its officers, employees, subsidiaries, affiliates, and distrib utors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that on semiconductor was negligent regarding the design or manufacture of the part. on semiconductor is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5817 ? 1050 www.onsemi.com literature fulfillment : literature distribution center for on semiconductor 19521 e. 32nd pkwy, aurora, colorado 80011 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your localsales representative ? semiconductor components industries, llc

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