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1/18 features 15a step-down regulator 4.5v to 5.5v low v in operation 5v to 22v wide single input voltage 3v to 22v operation with external 5v bias 0.6v adjustable output voltage proprietary constant on-time control no loop compensation required ceramic output capacitor stable operation programmable 70ns-1s on-time constant 200khz-1mhz frequency selectable ccm or ccm/dcm operation power-good flag with low impedance when power removed precision enable programmable soft-start 5mm x 6mm qfn package applications servers distributed power architecture point-of-load converters fpga, dsp and processor supplies base stations, switches/routers description the xr76117 is a synchronous step-down regulator combining the controller, drivers, bootstrap diode and mosfets in a single package for point-of-load supplies. the xr76117 has a load current rating of 15a. a wide 5v to 22v input voltage range allows for single supply operation from industry standard 5v, 12v and 19.6v rails. with a proprietary emulated current mode constant on-time (cot) control scheme, the xr76117 provides extremely fast line and load transient response using ceramic output capacitors. it require sno loop compensation, simplifying circuit implementation and reducing overall component count. the control loop also provides 0.1% load and 0.1% line regulation and maintains constant operating frequency. a selectable power saving mode, allows the user to operate in discontinuous mode (dcm) at light current loads thereby significantly increasing the converter efficiency. a host of protection features, including overcurrent, over temperature, overvoltage, short-circuit, open feedback detect and uvlo, helps achieve safe operation under abnormal operating conditions. the xr76117 is available in a rohs compliant, green/halogen-free space-saving 5mm x 6mm qfn package. typical application figure 1. typical application figure 2. efficiency enable v in c in power good r c vcc c ss r on r lim r ff c out c ff v out v out c bst l1 r1 r2 xr76117 en vin pvin pgood vcc ss ton agnd bst sw ilim fb fccm vsns pgnd r1 r2 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 0.0 5.0 10.0 5.0v 3.3v 2.5v 1.8v 1.5v 1.2v 1.0v 600khz 800khz ef?ciency (%) i out ( a ) 15.0 powerblox tm 15a synchronous step-down cot regulator xr 76117 rev1a
2/18 absolute maximum ratings these are stress ratings only and functional operation of the device at these ratings or any other above those indicated in the operation sections of the specifications below is not implied. stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. pv in , v in ......................................................................... -0.3v to 25v v cc .................................................................................. -0.3v to 6.0v bst ................................................................ -0.3v to 31v (1) bst-sw ............................................................. -0.3v to 6v sw, ilim ........................................................ -1v to 25v (1)(2) all other pins ......................................... -0.3v to v cc + 0.3v storage temperature .................................... -65c to 150c junction temperature ................................................. 150c power dissipation ...................................... internally limited lead temperature (soldering, 10 second) .................. 300c esd rating (hbm C human body model) ....................... 2kv esd rating (cdm C charged device model) .................. 1kv esd rating (mm C machine model) ............................. 200v operating conditions pv in ...................................................................... 3v to 22v v in ..................................................................... 4.5v to 22v v cc ................................................................... 4.5v to 5.5v sw, ilim .......................................................... -1v to 22v (2) pgood, ton, ss, en ................................. -0.3v to 5.5v (2) switching frequency ................................... 200khz-1mhz (3) junction temperature range (t j ) .................. -40c to 125c package power dissipation max at 25c ..................... 3.8w package thermal resistance ja ............................. 26c/w (4) notes: 1. no external voltage applied. 2. sw pins dc range is -1v, transient is -5v for less than 50ns. 3. recommended. 4. measured on exar evaluation board. electrical characteristics specifications are for operating junction temperature of t j = 25c only; limits applying over the full operating junction temperature range are denoted by a ?. typical values represent the most likely parametric norm at t j = 25c, and are provided for reference purposes only. unless otherwise indicated, v in = 12v, sw = agnd = pgnd = 0v, c vcc = 4.7uf. symbol parameter conditions ? min typ max units power supply characteristics v in input voltage range v cc regulating ? 5 12 22 v v cc tied to v in 4.5 5.0 5.5 i vin v in supply current not switching, v in = 12v, v fb = 0.7v ? 0.8 1.3 ma i vcc v cc quiescent current not switching, v cc = v in = 5v, v fb = 0.7v ? 0.8 1.3 ma i vin v in supply current f = 800khz, r on = 35.7k, v fb = 0.58v 17 ma i off shutdown current enable = 0v, pv in = v in = 12v 1 a enable and undervoltage lock-out uvlo v ih_en en pin rising threshold ? 1.8 1.9 2.0 v v en_hys en pin hysteresis 60 mv v cc uvlo start threshold, rising edge ? 4.00 4.25 4.40 v v cc uvlo hysteresis ? 100 170 mv xr 76117 rev1a
3/18 electrical characteristics (continued) specifications are for operating junction temperature of t j = 25c only; limits applying over the full operating junction temperature range are denoted by a ?. typical values represent the most likely parametric norm at t j = 25c, and are provided for reference purposes only. unless otherwise indicated, v in = 12v, sw = agnd = pgnd = 0v, c vcc = 4.7uf. symbol parameter conditions ? min typ max units reference voltage v ref reference voltage v in = 5v - 22v, v cc regulating 0.597 0.600 0.603 v v in = 4.5v - 5.5v, v cc tied to v in 0.596 0.600 0.604 v v in = 5v - 22v, v cc regulating v in = 4.5v - 5.5v, v cc tied to v in ? 0.594 0.600 0.606 v dc load regulation ccm operation, closed loop, applies to any c out 0.1 % dc line regulation 0.1 % programmable constant on-time on-time 1 r on = 5.90k?, v in = 12v ? 170 200 230 ns f corresponding to on-time 1 v out = 1.0v 360 415 490 khz on-time 2 r on = 16.2k?, v in = 12v ? 425 500 575 ns f corresponding to on-time 2 v out = 3.3v 478 550 647 khz on-time 3 r on = 3.01k?, v in = 12v ? 90 110 135 ns minimum off-time ? 250 350 ns diode emulation mode zero crossing threshold dc value measured during test -2 mv soft-start i ss_charge charge current ? -14 -10 -6 a i ss_discharge discharge current fault present ? 1 3 ma v cc linear regulator v cc output voltage v in = 6v to 22v, i load = 0 to 30ma ? 4.8 5.0 5.2 v v in = 5v, r on = 16.2k?, f sw = 678khz ? 4.6 4.8 power good output power good threshold -10 -7.5 -5 % power good hysteresis 1 4 % power good minimum i sink = 1ma 0.2 v power good, unpowered i sink = 1ma 0.5 v power good assertion delay, fb rising 2 ms power good de-assertion delay, fb falling 65 s xr 76117 rev1a
4/18 electrical characteristics (continued) specifications are for operating junction temperature of t j = 25c only; limits applying over the full operating junction temperature range are denoted by a ?. typical values represent the most likely parametric norm at t j = 25c, and are provided for reference purposes only. unless otherwise indicated, v in = 12v, sw = agnd = pgnd = 0v, c vcc = 4.7uf. symbol parameter conditions ? min typ max units mode control (fccm) fccm mode logic high threshold fccm rising ? 2.4 v fccm mode logic low threshold fccm falling ? 0.4 v input leakage current 100 na open feedback/ovp detect (vsns) ovp trip high threshold vsns rising. specified as % of v ref ? 115 120 125 % ovp trip low threshold vsns falling. specified as % of v ref ? 115 % ovp comparator delay vsns rising ? 0.5 1 3.5 s delay to turn off power stage from an overvoltage event vsns rising ? 3.5 s protection: ocp, otp, short-circuit hiccup timeout 110 ms i lim /r ds 6.30 7.15 8.00 a/m? i lim current temperature coefficient 0.4 %/c i lim comparator offset -4.7 0 4.7 mv i lim comparator offset ? -8.0 0 8.0 mv current limit blanking 100 ns thermal shutdown threshold rising temperature 138 c thermal hysteresis 15 c feedback pin short-circuit threshold percent of v ref , short circuit is active. after pgood asserts high. ? 50 60 70 % output power stage high-side mosfet r ds(on) i ds = 2a 7.7 10 m? low-side mosfet r ds(on) i ds = 2a 7.0 10 m? maximum output current ? 15 a xr 76117 rev1a
5/18 pin configuration pin functions pin number pin name type description 1 fb analog feedback input to feedback comparator. 2 fccm input forcing this pin logic level high forces ccm operation. 3 agnd analog signal ground for control circuitry. connect to agnd pad with a short trace. 4 5 ton analog constant on-time programming pin. connect with a resistor to agnd. 6 ilim analog overcurrent protection programming. connect with a resistor to sw. 7 pgood output, open drain power-good output. open drain to agnd. low z when ic unpowered. 8 vsns analog sense pin for output ovp and open fb. 9 vin analog supply input for the regulators ldo. normally connected to pv in . 10 vcc analog the output of regulators ldo. it requires a 4.7f v cc bypass capacitor. for operation using a 5v rail, vcc should be tied to vin. 11 pgnd power ground of the power stage. internally connected to source of the low-side mosfet. 12 sw power switch node. internally it connects source of the high-side mosfet to drain of the low-side mosfet. 13 pvin power input voltage for power stage. internally connected to drain of the high-side mosfet. 14 bst analog high-side driver supply pin. connect a 0.1f bootstrap capacitor between bst and sw. 15 en input precision enable pin. pulling this pin above 2v will enable the regulator. 16 ss analog soft-start pin. connect an external capacitor between ss and agnd to program the soft- start rate based on the 10a internal source current. 17 agnd pad analog signal ground for control circuitry. bottom view vsns vin vcc 17 agnd 1 2 3 4 5 6 fb fccm agnd agnd ton ilim pgood 7 8 9 10 bst en ss 14 15 16 13 12 11 pgnd pvin sw top view vcc vin vsns 17 agnd 1 2 3 4 5 6 fb fccm agnd agnd ton ilim pgood 7 10 9 8 bst en ss 14 15 16 13 12 11 pgnd pvin sw xr 76117 rev1a
6/18 typical performance characteristics efficiency and package thermal derating unless otherwise specified: t ambient = 25c, no airflow, f = 800khz. efficiency data includes inductor losses, schematic from the application information section of this datasheet. figure 3. efficiency, v in = 12v figure 4. efficiency, v in = 5v 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 0.1 1.0 10.0 600khz 5.0v dcm 3.3v dcm 2.5v dcm 1.8v dcm 1.5v dcm 1.2v dcm 1.0v dcm 5.0v ccm 3.3v ccm 2.5v ccm 1.8v ccm 1.5v ccm 1.2v ccm 1.0v ccm i out (a) ef?ciency (%) 0.36h (1.0v, 1.2v, 1.5v) 0.56h (1.8v, 2.5v) 1h (3.3v, 5.0v) 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 0.1 1.0 10.0 0.36h (1.0v, 1.2v, 1.5v) 0.56h (1.8v, 2.5v) 1h (3.3v) 0.36h (1.0v, 1.2v, 1.5v) 0.56h (1.8v, 2.5v) 1h (3.3v) i out (a) ef?ciency (%) 600khz 0.36h (1.0v, 1.2v, 1.5v) 0.56h (1.8v, 2.5v) 1h (3.3v) 3.3v dcm 3.3v ccm 2.5v dcm 2.5v ccm 1.8v dcm 1.8v ccm 1.5v dcm 1.5v ccm 1.2v dcm 1.2v ccm 1.0v dcm 1.0v ccm figure 5. maximum t ambient vs. i out , v in = 12v, no airflow figure 6.maximum t ambient vs. i out , v in = 5v, no airflow 30 40 50 60 70 80 90 100 110 120 130 3 5 7 9 11 13 15 5.0v, ccm, 600khz 2.5v, ccm, 800khz 1.0v, ccm, 800khz t ambient (oc) i out (a) 30 40 50 60 70 80 90 100 110 120 130 3.3v, ccm, 600khz 1.8v, ccm, 800khz 1.0v, ccm, 800khz 3 5 7 9 11 13 15 t ambient (oc) i out (a) xr 76117 rev1a
7/18 typical performance characteristics (continued) all data taken at v in = 12v, v out = 1.8v, f = 800khz, t a = 25c, no airflow, forced ccm. (unless otherwise specified). schematic from the applications information section of this datasheet. v in en i out v out 4ms/div v in en i out v out 4ms/div figure 9. power-up, i out = 15a figure 10. power-up, i out = 0a sw v out ac-coupled 20mhz i out 28mvp-p sw v out ac-coupled 20mhz i out 23mvp-p figure 7. steady state, i out = 15a figure 8. steady state, dcm, i out = 0a sw v out ac-coupled 20mhz i out 90mv -66mv di/dt = 2.5a/s 20s/div sw v out ac-coupled 20mhz i out 90mv -66mv di/dt = 2.5a/s 20s/div figure 11. load transient, forced ccm, 0a to 7.5a figure 12. load transient, dcm, 2a to 9.5a xr 76117 rev1a
8/18 typical performance characteristics (continued) all data taken at v in = 12v, v out = 1.8v, f = 800khz, t a = 25c, no airflow, forced ccm. (unless otherwise specified). schematic from the applications information section of this datasheet. i out 40ms/div v out pre-bias = 1.2v pgood v out 1ms/div figure 15. power-up with pre-bias voltage, i out = 0a figure 16. short-circuit recovery, i out = 15a en v out i out pgood 4ms/div sw v out ac-coupled 20mhz i out 90mv -66mv di/dt = 2.5a/s 20s/div figure 13. load transient, dcm or forced ccm, 7.5a to 15a figure 14. enable functionality, v in = 12v xr 76117 rev1a
9/18 typical performance characteristics (continued) all data taken at v in = 12v, v out = 1.8v, f = 800khz, t a = 25c, no airflow, forced ccm. (unless otherwise specified). schematic from the applications information section of this datasheet. figure 17. load regulation figure 18. line regulation i out (a) 1.750 1.760 1.770 1.780 1.790 1.800 1.810 1.820 1.830 1.840 1.850 0 2 4 6 8 10 12 14 15 v out (v) 1.750 1.760 1.770 1.780 1.790 1.800 1.810 1.820 1.830 1.840 1.850 4 6 8 10 12 14 16 18 20 22 v in (v) v out (v) figure 19. t on vs. r on figure 20. t on vs. v in , r on = 5.9k? r on (k) t on (ns) 0 100 200 300 400 500 600 700 800 900 1, 000 0 5 10 15 20 25 35 30 c al cu l at e d t y p i cal 100 150 200 250 300 350 400 450 4 6 8 10 12 14 16 18 20 22 v in (v) t on (ns) c al cu l at e d t y p i cal figure 21. frequency vs. i out figure 22. frequency vs. v in i out (a) f (khz) 0 2 4 6 8 10 12 14 15 0 100 200 300 400 500 600 700 800 900 v in (v) f (khz) 0 100 200 300 400 500 600 700 800 900 4 6 8 10 12 14 16 18 20 22 xr 76117 rev1a
10/18 typical performance characteristics (continued) all data taken at v in = 12v, v out = 1.8v, f = 800khz, t a = 25c, no airflow, forced ccm. (unless otherwise specified). schematic from the applications information section of this datasheet. figure 23. i ocp vs. r lim 0 5 10 15 20 25 1.5 2.0 2.5 3.0 3.5 r lim (k) i ocp (a) c al cu l at e d worst case t y p i cal figure 24. v ref vs. temperature figure 25. t on vs. temperature, r on = 5.9k 590 595 600 605 610 -40 -20 0 20 40 60 80 100 120 t j (c) v ref (mv) t j (?c) t on (ns) 100 150 200 250 300 -40 -20 0 20 40 60 80 100 120 xr 76117 rev1a
11/18 vcc vin pgood ss vsns fccm en ilim ton agnd pgnd sw pvin bst fb xr76117 power good ldo cot control loop delay pgnd sw ovp zc 4.25v v cc uvlo v cc 0.555v 0.6v v h = 1.2 x v ref v l = 1.15 x v ref fb 0.36v v cc sccomp 1.9v en level shift and non overlap control hiccup thermal shutdown pgnd 10a i lim hs drv ls drv v cc v cc enabling switching figure 26. functional block diagram functional block diagram xr 76117 rev1a
12/18 applications information detailed operation the xr76117 uses a synchronous step-down proprietary emulated current-mode constant on-time (cot) control scheme. the on-time, which is programmed via r on , is inversely proportional to v in and maintains a nearly constant frequency. the emulated current-mode control allows the use of ceramic output capacitors. each switching cycle begins with the high-side (switching) fet turning on for a preprogrammed time. at the end of the on-time, the high-side fet is turned off and the low-side (synchronous) fet is turned on for a preset minimum time (250ns nominal). this parameter is termed the minimum off-time. after the minimum off-time the voltage at the feedback pin fb is compared to an internal voltage ramp at the feedback comparator. when v fb drops below the ramp voltage, the high-side fet is turned on and the cycle repeats. this voltage ramp constitutes an emulated current ramp and allows for the use of ceramic capacitors, in addition to other capacitor types, for output filtering. enable the enable input provides precise control for startup. where bus voltage is well regulated, the enable input can be derived from this voltage with a suitable resistor divider. this ensures that xr76117 does not turn on until bus voltage reaches the desired level. therefore the enable feature allows implementation of undervoltage lockout for the bus voltage pv in . simple sequencing can be implemented by using the pgood signal as the enable input of a succeeding xr76117. sequencing can also be achieved by using an external signal to control the enable pin. selecting the forced ccm mode a voltage higher than 2.4v at the fccm pin forces the xr76117 to operate in continuous conduction mode (ccm). note that discontinuous conduction mode (dcm) is always on during soft-start. dcm will persist following soft-start until a sufficient load is applied to transition the regulator to ccm. magnitude of the load required to transition to ccm is i l /2, where i l is peak-to-peak inductor current ripple. once the regulator transitions to ccm it will continue operating in ccm regardless of the load magnitude. selecting the dcm/ccm mode the dcm will always be available if a voltage less than 0.4v is applied to the fccm pin. the xr76117 will operate in either dcm or ccm depending on the load magnitude. at light loads dcm significantly increases efficiency as seen in figures 3 and 4. a preload of 10ma is recommended for dcm operation. this helps improve voltage regulation when external load is less then 10ma and may reduce voltage ripple. programming the on-time the on-time t on is programmed via resistor r on according to following equation: v in [t on ? (2.5 10 -8 )] r on = 3.45 10 -10 v out t on = v in x 1.06 x f x eff. r on = (3.45 10 -10 ) ? [(2.5 10 -8 ) x v in ] v out 1.06 x f x eff. r lim = + 0.16k (i ocp + (0.5 ? il)) i lim r ds r1 = r2 x v out 0.6 ? 1 c ss = t ss x 10a 0.6v c ff = 1 2 x x r1 x 5 x f lc f lc = 1 2 x x l x c out r ff = 1 2 x x f x c ff a graph of t on versus r on , using the above equation, is compared to typical test data in figure 19. the graph shows that calculated data matches typical test data within 3%. the t on corresponding to a particular set of operating conditions can be calculated based on empirical data from: v in [t on ? (2.5 10 -8 )] r on = 3.45 10 -10 v out t on = v in x 1.06 x f x eff. r on = (3.45 10 -10 ) ? [(2.5 10 -8 ) x v in ] v out 1.06 x f x eff. r lim = + 0.16k (i ocp + (0.5 ? il)) i lim r ds r1 = r2 x v out 0.6 ? 1 c ss = t ss x 10a 0.6v c ff = 1 2 x x r1 x 5 x f lc f lc = 1 2 x x l x c out r ff = 1 2 x x f x c ff where: q f is the desired switching frequency at nominal i out . q eff. is the converter efficiency corresponding to nominal i out . substituting for t on in the first equation we get: v in [t on ? (2.5 10 -8 )] r on = 3.45 10 -10 v out t on = v in x 1.06 x f x eff. r on = (3.45 10 -10 ) ? [(2.5 10 -8 ) x v in ] v out 1.06 x f x eff. r lim = + 0.16k (i ocp + (0.5 ? il)) i lim r ds r1 = r2 x v out 0.6 ? 1 c ss = t ss x 10a 0.6v c ff = 1 2 x x r1 x 5 x f lc f lc = 1 2 x x l x c out r ff = 1 2 x x f x c ff now r on can be calculated in terms of operating conditions v in , v out , f and efficiency using the above equation. at v in = 12v, f = 800khz, i out = 15a and using the efficiency numbers from figure 3 we get the following r on : v out (v) eff. (%) f (khz) r on (k) 5.0 94 600 23.37 3.3 92 600 15.48 2.5 89 800 8.73 1.8 86 800 6.28 1.5 84 800 5.23 1.2 82 800 4.13 1.0 80 800 3.40 r on for common output voltages, v in = 12v, i out = 15a xr 76117 rev1a
13/18 applications information (continued) overcurrent protection (ocp) if the load current exceeds the programmed overcurrent threshold i ocp for four consecutive switching cycles, the regulator enters the hiccup mode of operation. in hiccup mode the mosfet gates are turned off for 110ms (hiccup timeout). following the hiccup timeout a soft-start is attempted. if ocp persists, hiccup timeout will repeat. the regulator will remain in hiccup mode until load current is reduced below the programmed i ocp . in order to program overcurrent protection use the following equation: v in [t on ? (2.5 10 -8 )] r on = 3.45 10 -10 v out t on = v in x 1.06 x f x eff. r on = (3.45 10 -10 ) ? [(2.5 10 -8 ) x v in ] v out 1.06 x f x eff. r lim = + 0.16k (i ocp + (0.5 ? il)) i lim r ds r1 = r2 x v out 0.6 ? 1 c ss = t ss x 10a 0.6v c ff = 1 2 x x r1 x 5 x f lc f lc = 1 2 x x l x c out r ff = 1 2 x x f x c ff where: q r lim is resistor value in k? for programming i ocp q i ocp is the overcurrent value to be programmed q i l is the peak-to-peak inductor current ripple q i lim /r ds is the minimum value of the parameter specified in the tabulated data q i lim /r ds = 6.3ua/m? q 0.16k? accounts for ocp comparator offset the above equation is for worst-case analysis and safeguards against premature ocp. typical value of i ocp , for a given r lim , will be higher than that predicted by the above equation. graph of calculated i ocp vs. r lim is compared to typical i ocp in figure 23. short-circuit protection (scp) if the output voltage drops below 60% of its programmed value (i.e., fb drops below 0.36v), the regulator will enter hiccup mode. hiccup mode will persist until short-circuit is removed. the scp circuit becomes active at the end of soft-start. hiccup mode and short-circuit recovery waveform is shown in figure 16. over temperature protection (otp) otp triggers at a nominal controller temperature of 138c. the gates of the switching fet and the synchronous fet are turned off. when controller temperature cools down to 123c, soft-start is initiated and regular operation resumes. overvoltage protection (ovp) the output ovp function detects an overvoltage condition on v out of the regulator. ovp is achieved by comparing the voltage at vsns pin to an ovp threshold voltage set at 1.2 x v ref . when vsns voltage exceeds the ovp threshold, an internal overvoltage signal asserts after 1us (typical). this ovp signal latches off the high-side fet, turns on the low-side fet and also asserts pgood low. the low-side fet remains on to discharge the output capacitor until vsns voltage drops below 1.15 x v ref . then low-side fet turns off to prevent complete discharge of v out . the high-side and low-side fets remain latched off until v in or en is recycled. in order to use this feature, connect vsns to v out with a resistor divider as shown in the application circuit. use the same resistor divider value that was used for programming v out . programming the output voltage use a voltage divider as shown in figure 1 to program the output voltage v out . v in [t on ? (2.5 10 -8 )] r on = 3.45 10 -10 v out t on = v in x 1.06 x f x eff. r on = (3.45 10 -10 ) ? [(2.5 10 -8 ) x v in ] v out 1.06 x f x eff. r lim = + 0.16k (i ocp + (0.5 ? il)) i lim r ds r1 = r2 x v out 0.6 ? 1 c ss = t ss x 10a 0.6v c ff = 1 2 x x r1 x 5 x f lc f lc = 1 2 x x l x c out r ff = 1 2 x x f x c ff the recommended value for r2 is 2k?. programming the soft-start place a capacitor c ss between the ss and agnd pins to program the soft-start. in order to program a soft-start time of t ss , calculate the required capacitance c ss from the following equation: v in [t on ? (2.5 10 -8 )] r on = 3.45 10 -10 v out t on = v in x 1.06 x f x eff. r on = (3.45 10 -10 ) ? [(2.5 10 -8 ) x v in ] v out 1.06 x f x eff. r lim = + 0.16k (i ocp + (0.5 ? il)) i lim r ds r1 = r2 x v out 0.6 ? 1 c ss = t ss x 10a 0.6v c ff = 1 2 x x r1 x 5 x f lc f lc = 1 2 x x l x c out r ff = 1 2 x x f x c ff pre-bias startup xr76117 has the capability to startup into a pre-charged output. typical pre-bias startup waveforms are shown in figure 15. maximum allowable voltage ripple at fb pin the steady-state voltage ripple at feedback pin fb (v fb , ripple ) must not exceed 50mv in order for the regulator to function correctly. if v fb , ripple is larger than 50mv then c out and/or l should be increased as necessary in order to keep the v fb , ripple below 50mv. xr 76117 rev1a
14/18 applications information (continued) feed-forward capacitor (c ff ) the feed-forward capacitor c ff is used to set the necessary phase margin when using ceramic output capacitors. calculate c ff from the following equation: v in [t on ? (2.5 10 -8 )] r on = 3.45 10 -10 v out t on = v in x 1.06 x f x eff. r on = (3.45 10 -10 ) ? [(2.5 10 -8 ) x v in ] v out 1.06 x f x eff. r lim = + 0.16k (i ocp + (0.5 ? il)) i lim r ds r1 = r2 x v out 0.6 ? 1 c ss = t ss x 10a 0.6v c ff = 1 2 x x r1 x 5 x f lc f lc = 1 2 x x l x c out r ff = 1 2 x x f x c ff where f lc , the output filter double-pole frequency is calculated from: v in [t on ? (2.5 10 -8 )] r on = 3.45 10 -10 v out t on = v in x 1.06 x f x eff. r on = (3.45 10 -10 ) ? [(2.5 10 -8 ) x v in ] v out 1.06 x f x eff. r lim = + 0.16k (i ocp + (0.5 ? il)) i lim r ds r1 = r2 x v out 0.6 ? 1 c ss = t ss x 10a 0.6v c ff = 1 2 x x r1 x 5 x f lc f lc = 1 2 x x l x c out r ff = 1 2 x x f x c ff you must use manufacturers dc derating curves to determine the effective capacitance corresponding to v out . a load step test (and/or a loop frequency response test) should be performed and if necessary c ff can be adjusted in order to get a critically damped transient load response. in applications where output voltage ripple is less than about 3mv, such as when a large number of ceramic c out are paralleled, it is necessary to use ripple injection from across the inductor. the circuit and corresponding calculations are explained in the exar design note. feed-forward resistor (r ff ) r ff is required when c ff is used. r ff , in conjunction with c ff , functions similar to a high frequency pole and adds gain margin to the frequency response. calculate r ff from: v in [t on ? (2.5 10 -8 )] r on = 3.45 10 -10 v out t on = v in x 1.06 x f x eff. r on = (3.45 10 -10 ) ? [(2.5 10 -8 ) x v in ] v out 1.06 x f x eff. r lim = + 0.16k (i ocp + (0.5 ? il)) i lim r ds r1 = r2 x v out 0.6 ? 1 c ss = t ss x 10a 0.6v c ff = 1 2 x x r1 x 5 x f lc f lc = 1 2 x x l x c out r ff = 1 2 x x f x c ff where f is the switching frequency. if r ff is greater than 0.1xr1, then instead of c ff /r ff , use ripple injection circuit as described in exar design note. thermal design proper thermal design is critical in controlling device temperatures and in achieving robust designs. there are a number of factors that affect the thermal performance. one key factor is the temperature rise of the devices in the package, which is a function of the thermal resistances of the devices inside the package and the power being dissipated. the thermal resistance of the xr76117 is specified in the operating ratings section of this datasheet. the t ja thermal resistance specification is based on the xr76117 evaluation board operating without forced airflow. since the actual board design in the final application will be different, the thermal resistances in the final design may be different from those specified. the package thermal derating curves are shown in figures 5 and 6. these correspond to input voltage of 12v and 5v, respectively. xr 76117 rev1a
15/18 applications information figure 27. application circuit schematic fb r2 2k r1 4.04k r ff 0.4k c ff 470pf cbst ren2 3.83k ren1 10k v in 0.1f fb fccm agnd agnd ton ilim pgood 1 2 3 4 5 6 7 17 16 15 14 13 8 9 10 11 vsense vin vcc pgnd epad_agnd ss en bst pvin fb v cc r on 6.19k rpgood 10k r lim 3.16k sw v cc c ss 47nf 12 sw sw v out l1, ihlp-4040dz-01 0.36h at 31.5a, 1.3m ohm 2 x 0.1f 4 x 0.1f 3 x 100f/6.3v/x6t/1206 4 x 22f/25v/x6t/1206 800khz, 1.8v, 0-15a v in c in 0.1f c vcc 4.7f v cc v out rsens1 4.04k rsens2 2k v in = 12v xr76117 xr 76117 rev1a
16/18 package description figure 28. package description (1 of 2) all dimensions are in mm and angles in degrees. xr 76117 rev1a
17/18 package description (continued) figure 28. package description (2 of 2) all dimensions are in mm and angles in degrees. xr 76117 rev1a
www.exar.com 18/18 tel.: +1 (510) 668-7000 fax: +1 (510) 668-7001 email: powertechsupport@exar.com ordering information part number operating temperature range environmental rating package packaging quantity marking xr76117el-f -40c t j 125c rohs-compliant halogen free 5mm x 6mm qfn bulk xr76117el yywwf xxxxxxxx xr76117eltr-f 3k/tape and reel XR76117EVB xr76117 evaluation board note: yy = year, ww = work week, f = halogen free, xxxxxxxx = lot number. revision history revision date description 1a july 2016 initial release xr 76117 exar corporation reserves the right to make changes to the products contained in this publication in order to improve design, performance or reliability. exar corporation conveys no license under any patent or other right and makes no representation that the circuits are free of patent infringement. while the information in this publication has been carefully checked, no responsibility, however, is assumed for inaccuracies. exar corporation does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. products are not authorized for use in such applications unless exar corporation receives, in writing, assurances to its satisfaction that: (a) the risk of injury or damage has been minimized; (b) the user assumes all such risks; (c) potential liability of exar corporation is adequately protected under the circumstances. reproduction, in part or whole, without the prior written consent of exar corporation is prohibited. exar, xr and the xr logo are registered trademarks of exar corporation. all other trademarks are the property of their respective owners. ?2016 exar corporation xr76117_ds_071416 rev1a 48760 kato road fremont, ca 94538 usa

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