clock page 1 of 3 raltron electronics corp. 10651 n.w. 19 th st miami, florida 33172 u.s.a. phone: (305) 593-6033 fax: (305) 594-3973 e-mail: sales@raltron.com web: http://www.raltron.com CLP: pll lvds series: ultra hf clock oscillator, lvds, +3.3 vdc description: a crystal controlled, high frequency, highly stable oscillator, adhering to low voltage differential signaling (lvds) standards. the output can be tri-stated to facilitate testing or combined multiple clocks. the device is contained in a sub-miniature, very low profile, leadless ceramic smd package with 6 gold contact pads. this miniature oscillator is ideal for today's automated assembly environments. applications and features: infiniband; fiber channel; sata; 10gbe; network processors; soho routing; switches; common frequencies: 150 mhz; 156.25 mhz; 155.52 mhz; 161.1328 mhz; 212.5mhz; 312.5mhz +3.3 vdc lvds frequency range from 750khz to 800 mhz pll multiplication (f>25mhz) miniature ceramic smd package available on tape and reel lead free and rohs compliant absolute maximum ratings: parameter symbol value unit operating temperature range ta -40?+85 c storage temperature range t(stg) -55?+90 c supply voltage vcc +4.6 vdc maximum input voltage vi vss-0.5?vcc+0.5 vdc maximum output voltage vo vss-0.5?vcc+0.5 vdc electrical parameters: parameter symbol test conditions *1 value unit nominal frequency fo 0.75~ 800.00** mhz supply voltage vcc +3.3 5% vdc supply current is 80.0 max ma output logic type lvds load connected between out and complementary out 100 ? voh output logic high 1.43 typ, 1.6 max vdc vol output logic low 0.9 min, 1.10 typ vdc vod differential output 247 min, 330 typ, 454 max mv differential output error 50 max mv vos offset voltage 1.125 min, 1.25 typ, 1.375 max vdc output voltage levels os offset error 25 max mvdc duty cycle dc measured at 50% of vcc 40/60 to 60/40 or 45/55 to 55/45 % rise / fall time tr / tf measured at 20/80% and 80/20% vcc levels 0.7 typ 1.0 max *2 ns fo=155.52mhz 2.6 typ** integrated phase tji rms, fj = 12 khz?20 mhz 5 fo=622.08mhz 2.5 typ** ps fo=155.52mhz. 4 typ ** random period jitter rj using wavecrest analyzer 4 fo=622.08mhz 6 typ ** ps fo=155.52mhz. 30 typ** jitter j acumm. peak to peak jitter tp-p using wavecrest analyzer *4 fo=622.08mhz 40 typ** ps phase noise ( ? f) typ. @155.52mhz 6 ? f= 10 hz ? f= 100 hz ? f= 1 khz ? f= 10 khz ? f =100 khz ? f= 1m hz ? f= 10m hz ? f> 20m hz -60 -90 -120 -125 -121 -121 -140 -145 dbc/hz dbc/hz dbc/hz dbc/hz dbc/hz dbc/hz overall frequency stability ? f/fc op. temp., aging, load, supply and cal. variations 20, 25, 50, or 100 max *3 ppm enable high option; pin 1 output enabled output disabled en dis high voltage or no connect ground 0.7 ? vcc min 0.3 ? vcc max vdc vdc enable low option; pin 1 output disabled output enabled dis en high voltage ground or no connect 0.7 ? vcc min 0.3 ? vcc max vdc vdc
clock page 2 of 3 raltron electronics corp. 10651 n.w. 19 th st miami, florida 33172 u.s.a. phone: (305) 593-6033 fax: (305) 594-3973 e-mail: sales@raltron.com web: http://www.raltron.com 123 4 5 6 . 1 9 7 . 0 0 8 .276 .008 7.0 0.2 5 . 0 0 . 2 indicates pin 1. .079 max. 2.00 max. .200 .100 5.08 2.54 . 1 5 0 3 . 8 1 .055 1.40 typ. . 0 5 0 1 . 2 7 .079 typ. 2.00 typ. .100 2.54 .071 1.80 solder pattern 2.20 .087 *1 test conditions unless stated otherwise: nominal vcc, nominal load, +25 3 c *2 frequency dependent *3 not all stabilities available with all temperature ranges?please consult factory for availability * 4 measured with wavecrest sia-3000a 10,000, cycles no filtering *5 calculated from agilent 5500 phase noise measurements *6 measured with agilent 5500 part numbering system: series symmetry temperature range (c) frequency stability (overall) frequency (mhz) enable/disable CLP: uhf +3.3vdc clock with lvds comp. output a: 40/60 to 60/40% t: 45/55 to 55/45% r: 0?+50 s: 0?+70 u: -20?+70 v: -40?+85** k: 20 ppm** i: 25 ppm h: 50 ppm j: 100 ppm 0.75?800.000 enable high ? standard (omit suffix) el; enable low example: -155.520 clock oscillator, 7x5mm package, +3.3 vdc supply voltage, lvds output, standard symmetry, 0?+70 c operating temperature range, 50 ppm total frequency stability, 155.520 mhz ** 20ppm stability may not be available at all combinations, please consult the factory for any custom requirements. mechanical parameters: outline tolerance: 0.006? / 0.15mm (unless otherwise specified) pin functions: [1] enable/ disable [2] no connect [3] case ground [4] output [5] comp. output [6] supply voltage marking: CLPash 155.52 ral d/c *0.01 f external by-pass filter is recommended as seen on solder pattern.
clock page 3 of 3 raltron electronics corp. 10651 n.w. 19 th st miami, florida 33172 u.s.a. phone: (305) 593-6033 fax: (305) 594-3973 e-mail: sales@raltron.com web: http://www.raltron.com reflow profile: **rohs compliant**
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