dual output digital multi-phase controller ir3566a www.irf.com | ? 2013 international rectifier | product brief | october 1, 2013 | v3. 04 1 features ? dual output 6+1 phase pwm controller ? fully supports amd? svi1 & svi2 with dual ocp and intel? vr12 ? pvi and svi gpu vr modes ? overclocking & gaming mode ? switching frequency from 200khz to 2mhz per phase ? ir efficiency shaping features including dynamic phase control and automatic power state switching ? programmable 1-phase operation for light loads and active diode emulation for very light loads ? ir adaptive transient algorithm (ata) on both loops minimizes output bulk capacitors and system cost ? auto-phase detection with auto-compensation ? per-loop fault protection: ovp, uvp, ocp, otp ? i2c/smbus/pmbus system interface for telemetry of temperature, voltage, current & power for both loops ? multiple time programming (mtp) with integrated charge pump for easy custom configuration ? compatible with ir atl and 3.3v tri-state drivers ? +3.3v supply voltage; -40c to 85c ambient operation ? pb -free, rohs, 6x6 mm , 48 -pin, 0.4mm pitch qfn ordering information description the ir3566a is a dual-loop digital multi-phase buck controller designed for cpu voltage regulation and is fully compliant with amd? svi1 & svi2 and intel ? vr12 specifications. the ir3566a includes ir s efficiency shaping technology to deliver exceptional efficiency at minimum cost across the entire load range. ir variable gate drive optimizes the mosfet gate drive voltage based on real-time load current. ir s dynamic phase control adds/drops active phases based upon load current and can be configured to enter 1-phase operation and diode emulation mode automatically or by command. irs unique adaptive transient algorithm (ata), based on proprietary non-linear digital pwm algorithms, minimizes output bulk capacitors and multiple time programmable (mtp) storage saves pins and enables a small package size. device configuration and fault parameters are easily defined using the ir digital power design center (dpdc) gui and stored in on- chip mtp. t he ir3566a provides extensive ovp, uvp, ocp and otp fault protection and includes thermistor based temperature sensing with vrhot signal . the ir3566a includes numerous features like register diagnostics for fast design cycles and platform differentiation, simplifying vrd design and enabling fastest time- to - market (ttm) with set - and - forget methodology. applications ? amd? svi1 & svi2, intel? vr12 based systems ? servers and high end desktop cpu vrs ? high performance graphics processor base part number package type standard pack orderable part number form quantity ir3566a qfn 6 mm x 6 mm tape and reel 3000 ir3566amxxyytrp 1 ir3566a qfn 6 mm x 6 mm tape and reel 3000 IR3566AMTRPBF ir3566a qfn 6 mm x 6 mm tray 4900 ir3566amtypbf notes : 1. customer specific configuration file, where xx = cu stomer id and yy = configuration file (codes assigne d by ir marketing). downloaded from: http:///
dual output digital multi-phase controller ir3566a www.irf.com | ? 2013 international rectifier | product brief | october 1, 2013 | v3. 04 2 ordering information ir3566am ? ? ? ? ? ? ? ? ? 2 3 2 1 2 4 2 2 pwm1_l2 vrtn rcsm vsen vrdy1 rcsp tsen1 pwm3 v18a rres vcc pwm2 pwm1 rcsm_l2 rcsp_l2 en_l2/inmode/pwrok vrdy2 vrtn_l2 vsen_l2 1 2 7 8 5 6 3 4 1 0 9 3 4 3 3 2 8 2 7 3 0 2 9 3 2 3 1 2 5 2 6 4 9 gnd i r 3 5 6 6 a 4 8 p i n 6 x 6 q f n t o p v i e w 1 2 1 6 1 4 1 9 1 3 1 7 1 5 2 0 1 8 1 1 4 7 4 3 4 5 4 0 4 6 4 2 4 4 3 9 4 1 4 8 vrhot_crit# vinsen en addr_prot sm_dio sm_clk irtn1 isen1 sv_alert#/svt sv_addr/vddio sm_alert# 3 6 3 5 pwm4 3 8 3 7 irtn1_l2 isen1_l2 pwm5 pwm6 vgd/tsen2/ vauxsen irtn6 isen6 sv_clk/ vidsel1 sv_dio/ vidsel0 irtn2 isen2 irtn3 isen3 irtn4 isen4 irtn5 isen5 figure 1 : ir3566a pin diagram enlarged p/pbf C lead free tr C tape & reel / ty - tray yy C configuration file id xx C customer id package type (qfn) downloaded from: http:///
dual output digital multi-phase controller ir3566a www.irf.com | ? 2013 international rectifier | product brief | october 1, 2013 | v3. 04 3 typical application diagram +3.3v v_cpu_l1 ir3566a vinsen pwm4 pwm1_l2 pwm3 pwm2 pwm1 isen1_l2 vrdy1 vsen vcc rres v18a vrtn irtn3 isen4 irtn1 rcsp irtn2 rcsm isen3 isen2 isen1 irtn4 +12v main lo a d rcs ccs r series r series r th r vin_ 1 r vin _ 2 irtn1_l2 en_l2/inmode/pwrok tsen1 r th 2 gnd hvcc logate higate vcc gnd pwm lvcc 12v v boot switch v_vgd vgd/ vauxsen optional variable gate drive circuit v_cpu_l2 l o a d vr_hot_icrit# sm_clk sm_dio i2c or smbus vv rcsp_l2 rcsm_l2 rcs ccs r series r series r th vsen_l2 vrtn_l2 sv_dio sv_clk vv to/from cpu pwm5 isen5 irtn5 pwm6 isen6 irtn6 sm_alert# v addr_prot 3. 3v hvcc logate higate vcc gnd pwm lvcc v boot switch v v_vgd hvcc logate higate vcc gnd pwm lvcc 5v v boot switch v v_vgd hvcc logate higate vcc gnd pwm lvcc v boot switch v hvcc logate higate vcc gnd pwm lvcc v boot switch v hvcc logate higate vcc gnd pwm lvcc v boot switch v chl8515 unused phases sv_alert#/svt vrdy2 en 5v v_vgd v_vgd 5v v_vgd 12v 5v 12v chl8515 chl8515 chl8515 chl8515 chl8515 12v 12v 5v 12v 5v v r vin_ 1 r vin _ 2 +5v aux optional 5v sense sv_addr/vddio figure 2 : dual-loop vr using ir3566a controller and chl8515 mosf et drivers in 4+1 configuration downloaded from: http:///
dual output digital multi-phase controller ir3566a www.irf.com | ? 2013 international rectifier | product brief | october 1, 2013 | v3. 04 4 data and specifications subject to change without notice. this product will be designed and qualified for the consumer market. qualification standards can be found on irs web site . ir world headquarters : 233 kansas st., el segundo, california 90245, usa te l: (310) 252-7105 tac fax: (310) 252-7903 visit us at www.irf.com for sales contact information . www.irf.com downloaded from: http:///
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